[ACTIVITY] 13th Apr - 17th April.

=== Progress === * Get TSAN building for Aarch64 on 42-bit VMA systems. (4/10) (-pie mode only) Expected Passes: 253 Expected Failures : 2 Unsupported Tests : 1 Unexpected Failures: 13 The failures are categorized into three types. (1) setjmp and longjmp implementation in assembly n

[ACTIVITY] 30th March - 03rd April.

4 day work week (03-Apr good Friday) (2/10) * ASAN 32bit allocator failures on amd-01 (4/10) Completed analyzing failures. Sent a patch to Address sanitizes community for review. Applied patch to latest LLVM trunk and ran tests. found one failure. But it was due to the test case assuming that re

[ACTIVITY] 23rd - 27th March.

* ASAN/TSAN run on 42 bit VA Aarch64 (TCWG-634) (6/10) Sent a patch that enables ASAN tests with 64 bit allocator on amd-01 (AMD Seattle). All ASAN test passes in LLVM. But on juno platform 39 bit VA does not have enough memory to map hence we need to stay on 32 bit allocator. Discussed

[ACTIVITY] 16th - 20th March

ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (6/10) * Juno does not have space for kernel allocator map demanded by ASAN, So we need to remain on 32 bit allocators only. * amd-01 went offline. So moved to internal machine in AMD. Debugging LLVM test failures in G

[ACTIVITY] 9 - 13th March

* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (3/10) Tried various allocator sizes in juno, still fails. On amd-01, Debugging LLVM test failures in gdb. * Emails, meetings. (2/10) * Linaro 1-1 with christophe. status call. * AMD meetings/event, 1-1 with AMD man

[ACTIVITY] 2nd - 6th March

* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocator (TCWG-634) (5/10) * Bug 869 (2/10) * Bug 1266(1/10) * Emails, meetings. (2/10) * Linaro 1-1 with christophe. status call. * AMD meetings/event, 1-1 with AMD manager, status meeting. * GCC mailing list. == Plan == * TSAN/ASAN sup

[ACTIVITY] 23 - 27 Feb 2015

* TSAN support for Aarch64 (5/10) TCWG-642 Discussed on making -pie for -fsanitize=thread as default in GCC. Learnt that LLVM sanitizers now support both -pie and non -pie mode. Discussed the same issue with sanitizer's group. They asked me to do -pie foraarch64 as first versi

[ACTIVITY] 16 - 19 Feb 2015

* TSAN support for Aarch64 (5/10) Fixed some kernel size issues in my local working tree. (TCWG-581) . GCC does not default to -fPIE or -pie. Ran into address layout issues when I used -fsanitize=thread. Some test cases passed with the mapping I used for 42 bit VA when -pie and -fPIE are add

[ACTIVITY] 9 - 13 Feb 2015

* TSAN support for Aarch64 (3/10) Working on memory map layout for TSAN in Aarch64 (TCWG-581) . Experimenting switching on 64 bit allocator as default. * Bug 869 - Analyzing tree dumps on how VECT_CONVERT_EXPR works (2/10) * Emails, meetings. (3/10) * Linaro remote hack sessions. *

[ACTIVITY] 26 - 30 January 2015

* TSAN support for Aarch64 (5/10) Working on memory map layout for TSAN in Aarch64 (TCWG-581) . * Emails, meetings. (3/10) * 1-1 with maxim, linaro status call. * internal AMD meetings, 1-1 with AMD manager. * GCC mailing list. Leave on 26-Jan-2014 (India Holiday) (2/10) Planned

[ACTIVITY] 19 - 23 January 2015

* TSAN support for Aarch64 (5/10) Up streamed make file changes for building non x86_targets (TCWG-579). Working on memory map layout for TSAN in Aarch64 (TCWG-581) . * Fix Bug 863(Linaro)/ 63949(FSF) (2/10). Tested patches and fixed few aarch64 regressions. got feedback that approach is

[ACTIVITY] 12 Jan - 16 Jan 2015

= Progress == * TSAN support for Aarch64 (2/10) * Fix Bug 863(Linaro)/ 63949(FSF) (3/10) * Emails, meetings. (3/10) 1-1 with maxim,christophe. Leave on 15-Jan-2014 (2/10) == Plan == * TSAN support for Aarch64. * Fix Linaro Bug 863 ___ linaro-to

[ACTIVITY] 29 Dec 2014- 2 Jan 2015

= Progress == * TSAN support for Aarch64 (3/10) * Fix Bug 863(Linaro)/ 63949(FSF) (3/10) * Emails, meetings. (2/10) 1-1 with maxim. Leave on 31-Dec-2014 == Plan == * TSAN support for Aarch64. * Fix Linaro Bug 863 ___ linaro-toolchain mailing li

[ACTIVITY] 8- 12 December 2014

= Progress == * TSAN support for Aarch64 (6/10) Working on writing Aarch64 specific "internal_clone" function. * Emails, linaro/AMD status meetings. (4/10) 1-1 with maxim, Christophe. == Plan == * TSAN support for Aarch64. * Fix Linaro Bug 863 AMD internal event on 18th (full day)

[ACTIVITY] 1- 5 December 2014

= Progress == * TSAN support for Aarch64 (6/10) * Emails, linaro/AMD status meetings. (4/10) 1-1 with maxim, Christophe. == Plan == * TSAN support for Aarch64. * Fix Linaro Bug 863 ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.or

[ACTIVITY] 24 - 28 November 2014

Back from Vacation 24, 26, 27 and 28 November. (8/10) = Progress == * TSAN support for Aarch64 (1/10) * Emails, linaro and AMD status meetings. (1/10) 1-1 with maxim == Plan == * TSAN support for Aarch64. * Fix Linaro Bug 863 * catchup emails and other discussions

[ACTIVITY] 10 - 14 November 2014

= Progress == * TSAN support for Aarch64 (4/10) * Fix Linaro Bug 863,869 - reproduced them. Working on fixing 863 (1/10) * Misc [3/10] Emails, linaro and AMD status meetings. 1-1 with inline mangers (Mev, Ryan). 1-1 with christophe. * 11/11/2014 Leave (2/10) The task on "Debug and und

[ACTIVITY] 3 - 7 November 2014

= Progress == * TCWG-544 - Investigate core mark performance with both at -O3 with LTO + PGO (6/10) Different IPA inline decisions happening between Linaro and trunk. No major differences in other IPA passes. Trunk Inlines crcu32 and not inlines crcu16. Inlining crcu16 decreases instruction count

[ACTIVITY] 27 - 31 October 2014

= Progress == * TCWG-544 - Investigate core mark performance with both at -O3 with LTO + PGO (6/10) * Misc [3/10] emails, linaro and AMD meetings and 1-1 with inline manger. 1-1 with christophe. * Tried to reproduce Bug 63653 (1/10) == Plan == * Continue core mark performance with both at -

[ACTIVITY] 20 - 24 October 2014

= Progress == * Short week was in vacation (22-24 October) * Updated perf profile numbers for instruction count and documented my analysis for Linaro compiler's O3 + LTO comparison on Aarch64 vs X86_64 (TCWG-544) (2/10) * Misc [2/10] emails, AMD meetings and 1-1 with inline manger. 1-1 with c

[ACTIVITY] 13 October 2014 to 17 October 2014.

= Progress == * Core mark benchmark and report for PGO and PGO + LTO (TCWG-544) (6/10) Going by CPU cycles adding LTO gains in x86 and degrades in Aarch64 . Looked at hot functions and examining assembly the code generation seems to be same. X86_64 does alignment of code. Also branch misses decrea

[ACTIVITY] 6 October 2014 to 10 October 2014.

= Progress == * Core mark benchmark and report for PGO and PGO + LTO (4/10) More profiling and collected numbers and reported. JIRA card TCWG-181 updated. Adding LTO gains in x86 and degrades in Aarch64 . * Addressed machine bring up issues, debugged and installed necessary packages for both

[ACTIVITY] 29 September - 3 October 2014

= Progress == * Core mark benchmark and report for PGO and PGO + LTO (2/10) Collected benchmark scores and report sent internally. Adding PGO benefits coremark. LTO seems to hurt. More runs and profiling next week. Tired few experiments with -funroll-all-loops and seems to benefit. * Misc [2/

[Activity] 22 - 26

== Progress == * Connect recovery [6/10] Very short week short week travel back from connect 22nd - 23rd travel. 25th - sick leave. * Backport - Bug 676 - CSE did not optimize the redundant cmp instruction on aarch64 [2/10]. Checked the issue by building latest trunk, linaro branch and b

[ACTIVITY] 1-5 September 2014

== Progress == * TCWG-181 - Bench marking core mark with LTO (2/10) Measured -O3 -flto vs -O3 on Aarch64 machine with Linaro GCC and Trunk FSF GCC on Aarch64 and X86_64. Performance in both cases seems to be same level. Planning to remeasure in trunk now. * TCWG-531 Fix invalid use of vector

[ACTIVITY] 25th - 29th August 2014

== Progress == * TCWG-181 - Bench marking core mark with LTO (2/10) Measuring -O3 -flto vs -O3 on Aarch64 machine with Linaro GCC and Trunk FSF GCC. * TCWG-520 ICE in linaro compiler for ARMv7 target (4/10). Completed fixing. patch tested on schroot. Backported revision from trunk using gerrit

[ACTIVITY] 18th - 22nd August 2014

== Progress == * TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (4/10) Completed. Patch that sets same tune parameters solves the bootstrap compare errors in Branch. Closed the JIRA cards. There are still LTO IR streaming issues in trunk which needs to tracked down and fixed a

[ACTIVITY] 8th - 14th August 2014

== Progress == * TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10) Analyzed tree dumps between stage2 and stage3 compilers. Noted that extra gimple declarations in stage2 compiler. Also inline minimum parameters in gimple.c.048i.inline were different. Richard Beiner found

[ACTIVITY] 4 August - 8 August 2014

== Progress == * TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10) Tried to recompile object files that showed differences in GCC trunk on amd64 machine.It turned out that GCC make system always builds LTO files in “gcc” directory and uses prev-gcc/xg++ to build them. No d

[ACTIVITY] 28 July - 1 August 2014

== Progress == * TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (4/10) * TCWG-181 Rerun coremark with LTO on latest trunk and Linaro compilers. (1/10). * Others (3/10) * Upstream patch review. * Prepared and sent notes on cauldron. * 1-1 Meeting Christophe. * Misc and

[Activity] 19-25 JULY 2014

== Progress == * Attend GNU Cauldron. * TCWG Sprint (8/10) - Participated in Discussions about TCWG/GNU tools. - Partcipated in Discussions with ARM mainatiners. - Discussed about Connect plans. - LLVM status. - Attend Backport Demo by Yvan / some Bug fix Activity. * Friday of

[ACTIVITY] 07-11 JULY 2014

== Progress == * Recovered from flu on leave 7th and 8th July (4/10) =LTO bootstrap -tcwg180 (2/10)= Git bisect experiments shows bootstrap compare errors apprearing and disappearing at trunk at different revisons. Alteast 3 revisons LTO bootstrap passes r210740 2488876068f541a341472c3aeedadccc25

[ACTIVITY] 16 - 20 June

== Progress == * TCWG-418 : Bug fix Reload spill failure (3/10) Bench marked coremark – no degradations with patch. CPU2000 runs – Workedon running them as native in chromebook. Issues with space. * TCWG-181 : LTO enablement (3/10) GCC 4.9 FSF no ICE . Linaro 14.07 release has ICE.

[ACTIVITY] 9- 13 June 2014

= Progress == * Went to UK VISA office and submitted application and bio metrics (2/10) * Tried Installing chrubuntu on chromebook. But failed and later found that SD card issue. Given SD card back in office for replacement. Installed crouton and other packages for building gcc and testing gcc te

[ACTIVITY] 2- 7 June 2014

= Progress == * LTO experiments (3/10) Tested with various compiler revisions and in native X86 machines. Compare errors in gcc 4.9 Linaro 14.05 version. Aarch64, LTO bootstrap passes in trunk. On FSF GCC 4.9 branch encountering ICE. Opened PRs in GCC Bugzilla. * Misc (2/10) - 1-1 meetings

[ACTIVITY] 19- 23 May 2014

== Progress == * Reload - IRA bug fix (3/10) Not able to reproduce in trunk, r210538 masks the bug again :( Discussed with maxim on extending the macro ,Likely spilled class for thumb2. Decided that it will lead to performance regressions. Conservative fix is to allow the pattern for ARM target alo

[ACTIVITY] 12 - 16 May 2014

== Progress == * Reload - IRA bug fix (5/10) - In thumb2 mode, we get a pattern "*ior_scc_scc" for the third argument expression by the combiner pass. - Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 . - The class object this pointer is passed in r0. r7 is used for s

[ACTIVITY] 5 - 9 May 2014

== Progress == * Reload - IRA bug fix (5/10) - Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second a gets register r6, but third a not able to reuse r6 or r1 and spill failure. - Debugging the IRA dumps and reload dumps - Getting Maxim help * TCWG-180 (3/10) - GCC bootstrap fai

[ACTIVITY] 28th April - 2nd May 2014

== Progress == Bug fix PR60617 (3/10) Triage the bug, looks like trunk r209897 fixes the issue. LTO- AArch64 (TCWG-180) (2/10) * Went though LTO documentation on GCC wiki. * Cross compiling SPEC2006 benchmarks with LTO. * Attend internal AMD meeting/Work(2/10). Misc (1/10) * Maxim 1-1 discussio

[ACTIVITY] April 21-25 2014

== Progress == PGO - AArch64 (TCWG-179) (4/10) * Completed SPEC2006 runs ( -O3 + PGO) in chroot + qemu-arm64-saucy with Linaro branch(4.9). * Perlbench train run failed, issue with qemu. * DealII train runs failed due to system libstdc++.so.6 not compatible with GCC 4.9. Changing the LD_LIBRAR

[ACTIVITY] April 14-18 2014

== Progress == PGO - AArch64 (TCWG-179) (4/10) * Completed SPEC runs -O3 -mcpu=cortex-a57 in chroot + qemu arm64-saucy with Linarorelease source (4.8) march 2014. * Built Linaro 4.9 GCC branch based tool chain under chroot + qemu arm64-saucy * Created a PGO config file for aarch64 as a peak

[Activity] 7 - 11 Apr 2014

PGO - AArch64 (TCWG-179) (4/10) * Installed QEMU user static for aarch64 and use them from chroot environment in ubuntiu 13.10 * Tried installing chroot + qemu arm64-saucy in another ubuntu 12.04 machine. Issue with binfmts. looks to be corrupted. * Bootstrap GCC with PGO with --enable-languages=

[Activity] 31 March - 04 Apr 2014

4 day week 31-Oct local holiday Bug fix (2/10) * Looking at a register allocation issue with ARMv7 hard float issue. (3/10) Tried changing machine description pattern same as trunk in gcc 4.8 branch. Issue does not occur with trunk and reason is arm64 moved to lra. turning off lra bug occurs.

[Activity] March 17-21 (2014)

== Progress == Machine descriptions for stack smashing in Aarch64 - TCWG-23 (5/10) * Completed building QEMU for Aarch64 on Ubuntu 13.10. Ran regression tests on it. * Submitted patches for libssp as per Marcus suggestions and got it approved. PGO support for Aarch64 -TCWG- 179 (2/10) * Instal

[Activity] March 10-14 (2014)

== Progress == * Went through few Linaro Connect - LCA14 slides and videos . * Restarted upstream discussions on writing machine descriptions for stack smashing. Working on submitting patches again as per Marcus suggestions. * Installed "CPU2006" in foundation model running open embedded image

[Activity] 27 Jan - 31 Jan 2014

== Progress == * Investigate "PGO" for Aarch64 (3/10). Bootstap testing aarch64 with PGO for GCC.Stage 2, feedback profile in progress. Tested a small test case for -fbranch-probabilities, works same as x86_64. Working on checking the "gcda" files generated and profile runs for coremark. * Cbuild

[Activity] 20 Jan - 24 Jan 2014

== Progress == * Libc probes support for Aarch64 (2/10). Wrote a small patch for setjmp and longjmp LIBC probe. Requested "will newton" to test them . * Investigate "PGO" for Aarch64 (3/10). Bootstap testing GCC with PGO for GCC. Stage 2, feedback profile in progress. Ran coremark on foundation

[Activity] 13 Jan - 17 Jan 2014

== Progress == * Libc probes support for Aarch64. Testing the patch for "libc" probes support to "__longjump". Native compiling in openemebedded. Obtained a Linaro open embedded image with system tap enabled. Getting Assembler Error during "malloc" module linking in "glibc" configured with --enabl

[Activity] 06 Jan - 10 Jan 2014

== Progress == * Libc probes support for Aarch64. Posted patch for "libc" probes support to "__longjump". Worked on review comments from Maintainers. Upstream discussions in progress. Working on testing "glibc" by using --enable-systemtap. * Experimented with "Cbuildv2" native building. == Plan

[Activity] 30 DEC-03 Jan 2013

== Progress == * Pointer mangling Aarch64 glibc. Worked on review comments from Maintainer. Rebased and posted the patch. Upstream completed and closed the card. https://cards.linaro.org/browse/TCWG-373 * Experimented with Cbuildv2 native building. == Plan == - Continue Cbuildv2. - Invest

[Activity] 23-27 DEC 2013

== Progress == * Pointer mangling Aarch64 glibc. Posted patch on pointer mangling. Worked on review comments from maintainer. Tested on V8 foundation model. == Plan == - Continue working on review comments for Pointer Guard support in Aarch64 glibc, - Continue Cbuildv2. - Investigate PGO

Binutils fails to build

Hi All, I am getting a weird error while building binutils from http://cbuild.validation.linaro.org/snapshots/Latest/binutils-linaro-2.23.2-2013.06.tar.bz2 GCC version gcc version 4.8.1 (Ubuntu/Linaro 4.8.1-10ubuntu9) Ubuntu 13.10 Steps: 1) /work/sources/binutils/configure --target=aarch64-unk

[Activity] 16-19 DEC 2013

== Progress == * Libssp GCC patch Replied to Marcus comments on libssp machine description support for stack protect and test. Analyzed other ports implementations on clearing register that loaded canary value. Waiting for his feedback. * Pointer mangling Aarch64 glibc. Investigated mangling supp

[Activity] 09-13 DEC 2013

== Progress == - Libssp GCC (4/10) - Rebased GCC source and added patch for stack protect and test based on global stack guard. Discussing with Marcus on generic stack protect set and test versus machine descriptions. Discussed with ARM and Glibc Maintainers, Dropped my

"[ACTIVITY] 2-06 Dec 2013"

== Progress == - libssp gcc Initiated mails for upstream discussion on supporting global and TLS based libssp ABI for Aarch64. Now waiting for feedback from ARM maintainers. - Built few benchmarks with Linaro tool chain binaries. Faced some openmp failures, compiler disabled for libgomp. Lookin

[ACTIVITY] 23-27 Nov 2013

== Progress == - libssp gcc Posted RFC V2 patch to community. Updated comments from Richard and wating for some feed backs. - Libssp glibc - Sent out a patch for stack_chk_guard in Aarch64 along with TLS stack guard support. == Plan == - post RFC patches for glibc and gcc libssp - explore on

[ACTIVITY] 18-22 Nov 2013

== Progress == - libssp gcc - Posted RFC patch to community. Addressing gcc/glibc compatibility issues. - libssp glibc - Working on exporting stack_chk_guard in Aarch64 along with TLS stack guard support. == Plan == - post RFC patches (version 2) for glibc and gcc libssp ___

[ACTIVITY] 4 November - 8 November 2013

Worked from AMD Austin. == Progress == * TLS based libssp support. Solved segmentation faults in clone and fork tests regressing from the patch I wrote. Ran glibc tests. Two tests still fail, tst-cancel-17.c and tst-memqueue8.c. They both use pthread_cancel and with my patch they time out. De

[ACTIVITY] 14 October - 18 October 2013

Very short week was on leave 14th and 16th October (India Holidays). == Progress == * libssp glibc Glibc tests are Segmenting at dl_close_worker, when I set pointer guard. Debuging shows segfaults while expanding THREAD_GSCOPE_WAIT. My assumption is thread pointer points to TCB and after allocat

[ACTIVITY] 28 September -1 October 2013

== Progress == * libssp Updated review comments given by glibc maintainer and rerun tests. There are some test failures, suspecting issue in using ALIGN_UP/DOWN macro. Debugging them. * gprof support for aarch64 Upstreamed patches to GCC and backported to Linaro 4.8 branch. Closed the cards fo

[ACTIVITY] 23-27 September 2013

Short week (Tuesday and Wednesday went to US consulate Chennai for VISA interview and document processing). == Progress == * gprof support for aarch64 Re-based and tested. Asked permission for upstreaming in trunk. Gibc patches are upstreamed. Thanks to Marcus. * Aarch64 Boot strap failure. Tri

[ACTIVITY] 16 -20 September 2013

== Progress == * gprof mcount support in glibc Tested the patch and posted in libcports. * Fix signal handler issue in glibc for profiling Found issue with time profiling. Time profiling is obtained by setting up SIG_PROF interrupt and kernal calls signal handler with interrupted pc addres

[ACTIVITY] 2 - 6 September 2013

== Progress == * Libssp support for AArch64 TCWG 23: NFS mounted from build system into the model and ran cross eglibc tests for a fresh SVN checkout. Had some failures. Looking at library missing issues. * Backports Completed backports and merge requests. Yvan helping out to commit 201411. == Pl

[ACTIVITY] 26 -30 August 2013

== Progress == * Libssp support for AArch64 TCWG 23: My approach to Cross testing eglibc from host failed since it needs the build directories to be shared. Mounting the image in build system and building eglic will not help as the changes will not be reflected, in the image booted in V8 model dya

[ACTIVITY] 19 - 23 August 2013

== Progress == 3 day week 21 August unwell and 23-August leave. * Libssp support for AArch64 TCWG 23: Sent RFC patch for review. http://sourceware.org/ml/libc-ports/2013-08/msg00044.html workign on cross testing eglibc from host. * Backport 201406 to linaro branch. Waiting for review. ==

Re: [ACTIVITY] 12 - 16 August 2013

most ready to submit the patches for ILP32 out for review on the > binutils, glibc, gcc, and kernel lists. > > > Thanks, > Andrew > > -- > *From:* linaro-toolchain-boun...@lists.linaro.org < > linaro-toolchain-boun...@lists.linaro.org> on b

[ACTIVITY] 12 - 16 August 2013

== Progress == * Libssp support for AArch64 TCWG 23: Understood the TCB datastructure. Sent a mail to the internal team on the changes needed and where to put stack gaurd slot in TCB. Got some comments from Matt. Worked on the changes in eglibc. Tested a simple stack smashing program in V8

[ACTIVITY] 05 - 08 August 2013

== Progress == * Libssp support for AArch64 TCWG 23: Patch was tested for aarch64-none-elf and passed. Sent for internal review. Looking at supporting stack guard in glibc. Understanding TCB data structure and looking at ports on how they initialize the stack guard in th TCB. * TCWG-20 gprof

[ACTIVITY] 29 July - 01 August 2013

== Progress == * Libssp support for AArch64 TCWG 23: Basic support is enabled by default when frame is made to grow downwards. Wrote machine descriptions for stack_protect_set and stack_protect_test to override this default behavior. Testing the patch internally. Plan is to emit inst

[ACTIVITY] 22-26 July2013

== Progress == * Libssp support for AArch64 TCWG 23 Discussed with Matt and decided to assume "glibc" will export canary guard variable in TCB, for aarch64. It will export it as global variable for 32 bit. Working on top of Christophe patch that make frame grows downward. * Look at builtin retur

[ACTIVITY] 15-19 July2013

== Progress == Was on vacation most of the week Mon - Wed leave (Thursday half day). * Libssp support for AArch64 TCWG 23 Restarted the work. Looked at how X86 GCC generated code. Looking at per thread support for libssp and compiler support. == Plan == * Continue Libssp support for AArch64 TC

[ACTIVITY] 24-28 June 2013

Most of Last week spent on internal AMD work. == Progress == * AArch64 LTO and PGO support. LTO run for coremark and ran coremark on V8 model with and without the patch. Ran perf on the model against the both the coremark binaries. For non LTO, retired instructions seems to be less than the LTO on

[ACTIVITY] 17-21 June 2013

== Progress == * AArch64 LTO and PGO support. Tweaked make file to run coremark on V8/openembedded model Experimenting with PGO runs for coremark. * AAarch64 testing Set up Cross build and test in V8 model for GCC testsuites on one of workstation in lab. Completed g++ testsuite with V8 model for g

[ACTIVITY] 10-14 June 2013

== Progress == * libssp support for AArch64 Libssp support needed AArch64 frame to grow downward. But it is currently defined as growing upward. This work is currently in hold. Needed frame layout changes before restarting. Waiting for feedback from Matt. * AAarch64 testing Drilling down Boot str

[ACTIVITY] 03-07 June 2013

== Progress == * AARCH64 testing Drilling down Boot strap failure with GCC 4.9 trunk on open embedded image with V8 model Sent the steps to reproduce boot strap failure in the model to team. Renoto suggestion to add libgcc_eh.a explicilty is not working well at all places. Trying few other options

Re: GCC bootstrap build error with openembedded/v8 model

roject.org/wiki/UnderstandingDSOLinkChange > > cheers, > --renato > > > On 3 June 2013 12:45, Venkataramanan Kumar > wrote: >> >> Hi all, >> >> I am facing build error, when I try to bootstrap GCC trunk for native >> aarch64-unknown-linux-gnu configuration

GCC bootstrap build error with openembedded/v8 model

Hi all, I am facing build error, when I try to bootstrap GCC trunk for native aarch64-unknown-linux-gnu configuration in openemedded/V8 model. Linker error occurs while building stage 1 GCC. (Snip) /usr/lib/gcc/aarch64-oe-linux/4.7.3/../../../../aarch64-oe-linux/bin/ld: gcov: hidden symbol `__de

[ACTIVITY] 27-31 May 2013

== Progress == Very short week (monday and wednesday off). * AARCH64 testing Got boot strap failure with GCC 4.9 trunk on open embedded image with glibc changes. Retired with latest openembedded image on V8 model Noted down the steps to reproduce boot strap failure in the model for broadcasting.

[ACTIVITY] 21-24 May 2013

== Progress == 4 day week was ill on Friday. * AARCH64 gprof –c option support. Completed and submitted patch in binutils and got it upstreamed. http://sourceware.org/ml/binutils/2013-05/msg00265.html http://sourceware.org/ml/binutils/2013-05/msg00264.html The committer has changed the logic a

[ACTIVITY] 13 May - 17 May 2013

== Progress == * AARCH64 - gprof support. Completed gprof -c support for aarch64. Got reviewed internally by Matt and Will. Patch yet to be posted. Waiting for some feedback on copyright message. *Testing GCC bootstrap and regression suite. Created a large image with help of Bero. Bootstrap fai

[ACTIVITY] 6 May - 12 May 2013

== Progress == * AARCH64 - gprof support. Submitted GCC patches to generate profile call. Also applied the review comments from Marcus and tested patches for aarch64-none-elf. http://gcc.gnu.org/ml/gcc-patches/2013-05/msg00597.html * Setup a Ubuntu machine at Office. Ran GCC testsuite wit

[ACTIVITY] 29 APR - 3 May 2013

== Progress == * AARCH64 - gprof support. Make GCC generate profile information (Completed). Defined macros in GCC to enable frame return address and insert profile call. Changed glibc to use generic gprof calls. Now gmon.out is generated when run in openembedded on V8 model. Used PROFILE_

[ACTIVITY] 22-26 April 2013

== Progress == * AARCH64 - Gprof support. Make GCC generate profile information (On-going). Defined hook and macros in GCC to emit "mcount" instrumented calls. Looked at ARM implementation and veener code in glibc which implements mcount. Discussed with Matt, and decided to use generic "mcount"

[ACTIVITY] 15-19 April 2013

== Progress == Very short week, was doing some AMD internal tasks and attend local meetings. * gprof support work for Aarch64. Not much progress this week. Working on GCC side to support gprof for Aarch64. == Plan == * Continue gprof support work for Aarch64

[ACTIVITY] 8-12 April 2013

== Progress == * gc sections tests Completed upstream of g-c section patches after updating review comments. Closed the card associated with the work. http://cards.linaro.org/browse/TCWG-27 * gprof support work for Aarch64 Read gprof internal documents from sourceware.org. Working on GCC side to s

[ACTIVITY] 1 - 5 Apr 2013

== Progress == * gc sections tests Completed adding gc-section test cases. 1. TLS and GOT tests. http://sourceware.org/ml/binutils/2013-03/msg00273.html 2. PLT tests. http://sourceware.org/ml/binutils/2013-03/msg00273.html * Evaluate gprof work. There is one function hook "find_call" which is mach

[ACTIVITY] 25-29 March 2013

== Progress == - Very short work week. I was on leave last Wednesday and Thursday (27th and 28th). - Posted patch for gc-section tests for TLS and got related relocs. - Discussing with Marcus on patch I wrote for gc section tests on PLT related relocs. == Plan == - Post patch for gc section tests

[ACTIVITY] 18-22 March 2013

== Progress == - Looking at TLS relocs and coming up with test cases for garbage collecting them. - Patch for missedout testcases in gc section is up streamed. Thanks to Marcus. == Plan == - Complete gc section test cases for TLS relocs. - Understand and evaluate gprof support work for Aarch64 Mi

[ACTIVITY] 11-15 March 2013

== Progress == - Closed the blue print for gc-sections implementation since the patch got upstreamed. - Opened new blue print for adding more test coverage to gc-sections tests. - Submitted a patch to enable missed out gc-sections test cases from ld-elf group. - Wrote gc-sections test cases for few

[ACTIVITY] 19-22 Feb 2013

== Progress == * Implementing GC sections support in binutils. Tested the patch for enabling gc section. "make ld-check" now passes after setting compiler in the PATH. Used the patched binutils source and built GCC for aarch64-none-elf. Ran gcc tests on V8 foundation model. Submitted the

[ACTIVITY] 11-15 Feb 2013

== Progress == * Implementing GC sections support in binutils Wrote a patch to update some AARCH64 GOT and PLT symbol ref counts while sweeping sections. During "make ld-check" some tests are not running. Checking the issue. Discussed with Matt and decided to use default gc_mark hook. Most

[ACTIVITY] 4-8 Feb 2013

== Progress == * Implementing GC sections support in bintuils Looking at aarch64 relocations to consider while sweeping. * Cbuild experiments to test gcc svn aarch64 4.7 branch. Connection problems to the cbuild machines are solved now. Thanks to Matt. Spawned the build. Misc -- * Atten

[ACTIVITY] 28 January - 1 February 2013

== Progress == * Backport Tested and backported patch written to CSE optmize compares. http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00015.html Ran GCC regression suite with ARMV8 foundation model for aarch64-none-elf * Implementing GC sections support in bintuils Had a quick look at chang