[ACTIVITY] Week 20

2013-05-17 Thread Renato Golin
== Progress == * 3.3 Release - Bootstrapping, testing, fixing bugs, etc. - RC1 released on Tuesday http://people.linaro.org/~rengolin/llvm/ - Fix for C11 atomics on Linux http://llvm.org/bugs/show_bug.cgi?id=15429 - Fix for zero extend vector bug in test-suite http://llvm.org/bugs/sho

[ACTIVITY] Week 20

2013-05-17 Thread Will Newton
== Progress == * Finished porting ld-ifunc tests to AArch64. * Requested a relocation number for R_AARCH64_IRELATIVE. * Tested AArch64 ifunc code natively to run generic ifunc tests. * Investigated gdb bug #1175525 and submitted workaround patch to gdb-patches. * Started DeveloperTools and Library

[ACTIVITY] 13-17 May 2013

2013-05-17 Thread Christophe Lyon
== Progress == * Disable-peeling: analyzed regression on one bench. * Libsanitizer/aarch64: - porting will require more effort than aarch32. - some syscalls are not supported by aarch64 - libsanitizer expects frame to grow downwards (true on aarch32, false on aarch64) * PGO/LTO bug reported b

[ACTIVITY] report week 20

2013-05-17 Thread Peter Maydell
Progress: * VIRT-49, VIRT-50 [cp15 migration, reset] ** last bits of patch cleanup complete; realised I could test KVM migration without any timer or vgic patches; did so and sent first version of patches out to qemu-devel * VIRT-55: ** started to draft basic notes on what we want to te

Re: hot spot on the vsub.f32 instruction

2013-05-17 Thread Renato Golin
On 17 May 2013 14:45, Mans Rullgard wrote: > I suppose those who have a need for this information already know > how to interpret those values. Translating the ARM IDs to model > names would be rather trivial. > Great! Do I hear someone volunteering to implement that in the Kernel? ;) cheers,

Re: hot spot on the vsub.f32 instruction

2013-05-17 Thread Mans Rullgard
On 17 May 2013 14:26, Peter Maydell wrote: > On 17 May 2013 14:03, Mans Rullgard wrote: >> On 17 May 2013 13:30, Renato Golin wrote: >>> Why don't we print full information like Intel? >> >> The part you snipped: >> CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x

Re: hot spot on the vsub.f32 instruction

2013-05-17 Thread Peter Maydell
On 17 May 2013 14:03, Mans Rullgard wrote: > On 17 May 2013 13:30, Renato Golin wrote: >> Why don't we print full information like Intel? > > The part you snipped: > >>> CPU implementer : 0x41 >>> CPU architecture: 7 >>> CPU variant : 0x0 >>> CPU part : 0xc05 >>> CPU revision : 1 > > Th

Re: hot spot on the vsub.f32 instruction

2013-05-17 Thread Mans Rullgard
On 17 May 2013 13:30, Renato Golin wrote: > On 17 May 2013 08:18, YongQin Liu wrote: >> > * What platform are you testing on? >> The device I am testing on is an SP8810 device. here is the content of the >> cpuinfo > > I believe that's a Cortex-A5. > >> root@android:/ # cat /proc/cpuinfo >> Proce

Re: hot spot on the vsub.f32 instruction

2013-05-17 Thread Renato Golin
On 17 May 2013 08:18, YongQin Liu wrote: > I Compiled it with the android-ndk-r8d with the attached build_native.sh > script. > That's a gcc 4.7 right? > * What platform are you testing on? > The device I am testing on is an SP8810 device. here is the content of the > cpuinfo > I believe that