On 21/02/13 15:54, Yvan Roux wrote:
Hi,
in the example below I want to explicitly generate a "store exclusive
pair" instruction with an asm statement:
typedef struct {
long unsigned int v1;
long unsigned int v2;
} mtype;
int main () {
mtype val[2] ;
val[0].v1 = 1234;
val[0]
> So stxp %w0, %2, %3, %1 in your inline asm or look out for how this is
> printed in the equivalent sync pattern. I'd look in iterators.md for some of
> the attributes to confirm this.
Hey, thanks Ramana that's it :)
just one more thing, there is a special internal constraint "Ump" on
memory a
> -Original Message-
> From: linaro-toolchain-boun...@lists.linaro.org [mailto:linaro-
> toolchain-boun...@lists.linaro.org] On Behalf Of Yvan Roux
> Sent: 21 February 2013 15:54
> To: linaro-toolchain@lists.linaro.org
> Subject: AArch64 asm statement question
>
> Hi,
>
> in the example b
Hi,
in the example below I want to explicitly generate a "store exclusive
pair" instruction with an asm statement:
typedef struct {
long unsigned int v1;
long unsigned int v2;
} mtype;
int main () {
mtype val[2] ;
val[0].v1 = 1234;
val[0].v2 = 5678;
int status;
do {
__asm
The Linaro Toolchain Working Group announce the 2013.02-01 Linaro GCC 4.7
release. This is a respin of the 2013.02 release because of an issue with
multiarch for x32 and kfreebsd builds in the previous one.
Please find the original 2013.02 announcement below.
The Linaro Toolchain Working Group is
