[ACTIVITY] weekly status

2011-02-25 Thread Ken Werner
Hi, == Investigate developer tools == * Finished latrace investigation. == PandaBoard == * The defective PandaBoard that was sent back in December is now repaired and on my desk again. It doesn't show the behaviour of #708883 and works flawlessly so far. :) == libunwind == * Did some debugg

Re: Representing interleaving and lane load/stores at the tree level

2011-02-25 Thread Richard Sandiford
Richard Sandiford writes: > __builtin_store_lanes (VECTORS : array N of vector M of X) > returns array N*M of X > maps to vstN > in practice, the argument would be populated by assignments of the form: > vectorX = ARRAY_REF er, of course, I meant: ARRAY_REF =

[ACTIVITY] 2011-02-25

2011-02-25 Thread David Gilbert
== ffi == * Sent variadic patch for libffi to libffi-discuss * Worked through some suggestions from Chung-Lin, need to do some rework == string routines == * memchr & strchr patch sent for inclusion in ubuntu packages * tried sqlite's benchmarks - they don't spend too much time in the C li

[ACTIVITY] report week 08

2011-02-25 Thread Peter Maydell
RAG: Red: Amber: Green: Current Milestones: | Planned| Estimate | Actual | qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 || Historical Milestones: finish virtio-system | 2010-08-27 | postponed || finish testing PCI p

[ACTIVITY] Feb 21 - Feb 25

2011-02-25 Thread Ulrich Weigand
== GDB == * Worked with Will Deacon and the Linaro kernel team to make sure HW watchpoint and Versatile Express errata fixes are included in the upcoming Linaro kernel release. * Committed GDB HW watchpoint patches to mainline, and backport to Linaro GDB. This completes work on the

[ACTIVITY] Weekly status

2011-02-25 Thread Richard Sandiford
== This week == * Looked at the poor code generated for Neon load/store intrinsics. Looked into the history behind the treatment of VFP registers by CANNOT_CHANGE_MODE_CLASS. Peter confirmed that the restrictions apply only to VFPv1. Wrote a patch to improve the code, which partly overla

Representing interleaving and lane load/stores at the tree level

2011-02-25 Thread Richard Sandiford
I've been spending this week playing around with various representations of the v{ld,st}{1,2,3,4}{,_lane} operations. I agree with Ira that the best representation would be to use built-in functions. One concern in the original discussion was that the optimisers might move the original MEM_REFs a