Re: Using inline NEON code

2010-12-02 Thread The Rasterman
On Fri, 3 Dec 2010 10:49:29 +1300 Michael Hope said: > Hi there. Currently you can't use NEON instructions in inline > assembly if the compiler is set to -mfpu=vfp such as Ubuntu's > -mfpu=vfpv3-d16. Trying code like this: > > int main() > { >asm("veor d1, d2, d3"); >return 0; > } > >

Using inline NEON code

2010-12-02 Thread Michael Hope
Hi there. Currently you can't use NEON instructions in inline assembly if the compiler is set to -mfpu=vfp such as Ubuntu's -mfpu=vfpv3-d16. Trying code like this: int main() { asm("veor d1, d2, d3"); return 0; } gives an error message like: test.s: Assembler messages: test.s:29: Error:

[ACTIVITY] Nov 29 - Dec 2

2010-12-02 Thread Ira Rosen
- Continued looking into NEON special loads and stores. - Benchmarks: concentrated on EEMBC Telecom: - autcor gets vectorized - viterbi, besides strided data accesses, needs to sink conditional stores to allow if-conversion and make the main loop vectorizable. Since the potential here is 4x,

Re: [gnu-arm-releases] Re: [PATCH, WIP] NEON quadword vectors in big-endian mode (#10061, #7306)

2010-12-02 Thread Daniel Jacobowitz
On Thu, Dec 02, 2010 at 10:54:32AM +0200, Ira Rosen wrote: > On 1 December 2010 17:57, Daniel Jacobowitz wrote: > > On Wed, Dec 01, 2010 at 11:16:16AM +0200, Ira Rosen wrote: > >> The meaning of the builtin (or maybe a new tree code would be better?) > >> is that the elements of v0, v1 and v2 are

Re: [PATCH, WIP] NEON quadword vectors in big-endian mode (#10061, #7306)

2010-12-02 Thread Joseph S. Myers
On Tue, 30 Nov 2010, Julian Brown wrote: > * defaults.h (VECTOR_ELEMENTS_BIG_ENDIAN): Define. Apart from the point that new target macros should be hooks, the *very first* thing to do with any new macro or hook is to write the .texi documentation, which appears to be missing from this patch

Re: [gnu-arm-releases] Re: [PATCH, WIP] NEON quadword vectors in big-endian mode (#10061, #7306)

2010-12-02 Thread Nathan Froyd
On Wed, Dec 01, 2010 at 11:24:01AM +, Julian Brown wrote: > > PowerPC also has load/store multiple, but I guess they are generated > > in the same phase as for ARM. Maybe there are other architectures that > > do that allocate contiguous register but earlier? > > I don't know about other archi

Re: [gnu-arm-releases] Re: [PATCH, WIP] NEON quadword vectors in big-endian mode (#10061, #7306)

2010-12-02 Thread Daniel Jacobowitz
On Wed, Dec 01, 2010 at 11:16:16AM +0200, Ira Rosen wrote: > The meaning of the builtin (or maybe a new tree code would be better?) > is that the elements of v0, v1 and v2 are deinterleaved. I wanted the > MEM_REFs, since we actually have three data accesses here, and > something (builtin or tree c

Re: [gnu-arm-releases] Re: [PATCH, WIP] NEON quadword vectors in big-endian mode (#10061, #7306)

2010-12-02 Thread Ira Rosen
On 1 December 2010 17:57, Daniel Jacobowitz wrote: > On Wed, Dec 01, 2010 at 11:16:16AM +0200, Ira Rosen wrote: >> The meaning of the builtin (or maybe a new tree code would be better?) >> is that the elements of v0, v1 and v2 are deinterleaved. I wanted the >> MEM_REFs, since we actually have thr