This series is for review comments only and is not tested.
This series added a helper to be able to initialise writeback connector
in a way where drivers can send their own connector and encoder.
Signed-off-by: Suraj Kandpal
Suraj Kandpal (4):
drm/writeback: Add function that takes preallocate
DIV_ROUND_CLOSEST_ULL uses do_div(), which expects a 32-bit divisor.
When passing a 64-bit constant like CURVE2_MULTIPLIER, the value is
silently truncated to u32, potentially leading to incorrect results
on large divisors.
Replace DIV_ROUND_CLOSEST_ULL with div64_u64(), which correctly
handles fu
On 6/12/2025 5:30 PM, Gustavo Sousa wrote:
Quoting Ankit Nautiyal (2025-06-12 04:53:30-03:00)
As per Wa_16025573575 for PTL, set the GPIO masks bit before starting
bit-bashing and maintain value through the bit-bashing sequence.
After bit-bashing sequence is done, clear the GPIO masks bits.
S
Initialize writeback connector initialising the virtual encoder
and intel connector. We also allocate memory for drm_writeback_connector
but not the drm_connector within it due to a constraint
we need all connectors to be an intel_connector.
The writeback_format arrays is used to tell the user whic
Add some preliminary definitions like, output type and transcoder
related to the writeback functionality.
Signed-off-by: Suraj Kandpal
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 3b54a62c290a..ae474cbeb791 100644
--- a/drivers/g
Add writeback registers to its own file.
Signed-off-by: Suraj Kandpal
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
new file mode 100644
index ..dd872b6f8103
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel
Write a function that takes a preallocated drm_connector instead of
using the one allocated inside the drm writeback connector init
function.
Signed-off-by: Suraj Kandpal
diff --git a/drivers/gpu/drm/drm_writeback.c b/drivers/gpu/drm/drm_writeback.c
index edbeab88ff2b..0d287ab9bded 100644
--- a/
== Series Details ==
Series: Add WildCat Lake support (rev2)
URL : https://patchwork.freedesktop.org/series/150101/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M] drivers/gpu/drm/xe/xe_wa.o
In file inc
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 11, 2025 9:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org
> Subject: [PATCH 9/9] drm/i915/dmc: Do not enable the pipe DMC on TGL when
> PSR is possible
>
> From:
> -Original Message-
> From: Intel-xe On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 11, 2025 9:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org
> Subject: [PATCH 8/9] drm/i915/dmc: Pass crtc_state to intel_dmc_{enable,
> disable}_pipe()
>
> From: V
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 11, 2025 9:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org
> Subject: [PATCH 7/9] drm/i915/dmc: Assert DMC is loaded harder
>
> From: Ville Syrjälä
>
> Currentl
From: Matt Roper
Media version 30.02 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.
-v2: Extend the range in existing WA entry (Bala)
-v3: Revert v2, Do not extend the range for the time being(Matt)
Signed-off-by: Matt Roper :q
Signed-off-by:
From: Matt Roper
Graphics version 30.03 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.
-v2: Merge and extend the WA onto existing entry (Bala)
-v3: Revert v2's feedback changes and keep entry saparate (Matt).
Signed-off-by: Matt Roper
Signed-
wa_16023981245 need to be extended for display version 30.02
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Sai Teja Pottumuttu
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_
WCL added a c10 phy connected to port B. PTL code is currently
restricting c10 to phy_a only.
PTL doesn't have a PHY connected to PORT B; as such,there will
never be a case where PTL uses PHY B.
WCL uses PORT A and B with the C10 PHY.Reusing the condition
for WCL and extending it for PORT B should
Enable Wildcat Lake by adding PCI IDs and add the initial support GT, Media
and Display workarounds.
-v5: Resolved conflict and address the few feedbacks.
Dnyaneshwar Bhadane (3):
drm/i915/xe3lpd: Extend DMC load path for display version 30.02
drm/i915/wcl: C10 phy connected to port A and B
From: Matt Roper
Introduce wildcat lake device Id.
Wildcat Lake uses slightly different graphics and media IP versions
than Panther Lake, but can still be treated as PTL for general driver
flows.
Bspec: 73951
Signed-off-by: Matt Roper
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Tejas Upadh
Display version 30.02 should be treated the same as other Xe3 IP.
So exteding DMC load path the condition for it.
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Sai Teja Pottumuttu
---
drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Matt Atwood
Display version 30.02 has a lower max cdclk rate than 30.00.
Bspec: 68861
Signed-off-by: Matt Atwood
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --gi
From: Matt Atwood
Bandwidth parameters for WCL have been updated with respect to
previous display releases. Encode them into xe3lpd_3002_sa_info and use
that new struct.
-v2: Resolve conflict to apply patch.
Bspec: 68859
Signed-off-by: Matt Atwood
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-b
From: Matt Roper
Display version 30.02 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.
Signed-off-by: Matt Roper
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
1 f
> -Original Message-
> From: Intel-xe On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 11, 2025 9:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org
> Subject: [PATCH 5/9] drm/i915/dmc: Reload pipe DMC state on TGL when
> enabling pipe A
I guess its app
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 11, 2025 9:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org
> Subject: [PATCH 4/9] drm/i915/dmc: Extract dmc_load_program()
>
> From: Ville Syrjälä
>
> We'll be
On Thu, Jun 12, 2025 at 03:54:51PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 12.06.25 um 15:29 schrieb Imre Deak:
> > Hi,
> >
> > On Tue, Jun 10, 2025 at 06:42:04PM +0300, Imre Deak wrote:
> > > Hi Maxim, Thomas, Maarten,
> > >
> > > could you please ack merging this patchset via drm-intel?
>
On Tue, Jun 10, 2025 at 05:42:26PM +0100, Tvrtko Ursulin wrote:
Xe can free some of the data pointed to by the dma-fences it exports. Most
notably the timeline name can get freed if userspace closes the associated
submit queue. At the same time the fence could have been exported to a
third party
> -Original Message-
> From: Patchwork
> Sent: Wednesday, June 11, 2025 10:15 PM
> To: Bhadane, Dnyaneshwar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BUILD: failure for Add WildCat Lake support
>
> == Series Details ==
>
> Series: Add WildCat Lake support
> URL : http
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, June 12, 2025 10:00 PM
> To: Pottumuttu, Sai Teja
> Cc: Bhadane, Dnyaneshwar ; intel-
> x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP vers
== Series Details ==
Series: drm/i915/plane: file and function renames (rev3)
URL : https://patchwork.freedesktop.org/series/147416/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16692 -> Patchwork_147416v3
Summary
---
== Series Details ==
Series: drm/i915/dsb: DSB fixed and flip queue prep work
URL : https://patchwork.freedesktop.org/series/150172/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16692 -> Patchwork_150172v1
Summary
---
Hi Dave, Simona
Two fixes for 6.16-rc2.
Thanks,
Thomas
drm-xe-fixes-2025-06-12:
Driver Changes:
- Fix regression disallowing 64K SVM migration (Maarten)
- Use a bounce buffer for WA BB (Lucas)
The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:
Linux 6.16-rc1 (2025-0
On Thu, Jun 12, 2025 at 12:20:05PM +0530, Pottumuttu, Sai Teja wrote:
> On 11-06-2025 19:14, Dnyaneshwar Bhadane wrote:
> > From: Matt Roper
> >
> > Graphics version 30.03 should be treated the same as other Xe3 IP, but
> > will have a slightly different set of workarounds.
> >
> > -v2: Merge an
== Series Details ==
Series: drm/i915/panel: make panel funcs static
URL : https://patchwork.freedesktop.org/series/150162/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16692 -> Patchwork_150162v1
Summary
---
**FAIL
== Series Details ==
Series: drm/i915/display: make all global state opaque
URL : https://patchwork.freedesktop.org/series/150158/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16692 -> Patchwork_150158v1
Summary
---
It's all atomic, no need to emphasize this.
v2: Also update Documentation/gpu/i915.rst (Gustavo)
Reviewed-by: Gustavo Sousa
Signed-off-by: Jani Nikula
---
Documentation/gpu/i915.rst | 4 ++--
drivers/gpu/drm/i915/Makefile | 4 ++--
== Series Details ==
Series: drm/i915/plane: file and function renames (rev2)
URL : https://patchwork.freedesktop.org/series/147416/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16692 -> Patchwork_147416v2
Summary
---
From: Ville Syrjälä
Pull the magic 20 usec DSB execution deadline into
intel_dsb_arm_exec_time_us(), and also add its counterpart
for the non-arming register write section. For the non-arming
part we'll just throw in a random 80 usec for now so the total
is 100usec. The total exec time will be ne
From: Ville Syrjälä
Current DSB hardware is apparently a bit borked and likes to signal
spurious GOSUB errors. We already have most for the workarounds for
this in place, but the last part is simply not enabling the corresponding
interrupt.
While at it polish up the w/a comments with the w/a num
From: Ville Syrjälä
When using the flip queue, due to the DMC vs. DSB register corruption
problem, we must not issue any register writes from the DSB after
unhalting the DMC. Currently we are doing just that by trying to
restore DSB_PMCTRL* back to a sane state from intel_dsb_finish().
Since the
From: Ville Syrjälä
If the free_post is not QW aligned we don't have to memset the
extra DW needed to make it so, as the only way that can happen
is via intel_dsb_reg_write_indexed() which already makes sure
the next DW is zeroed.
Not a big deal, but this is more consistent how all the other
stu
From: Ville Syrjälä
Since the introduction of DSB chaining we no longer need the
DEwake tricks in intel_dsb_commit().
I also need to relocate the DSB_PMCTRL* writes out of
intel_dsb_finish() (due to the flip queue DMC vs. DSB register
corruption issues), and it'll be a bit more straightforward i
From: Ville Syrjälä
The upcoming flip queue implementation will need to know the
DSB buffer head and size. Expose those outside intel_dsb.c.
Reviewed-by: Uma Shankar
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 9 +++--
drivers/gpu/drm/i915/display/intel_dsb
From: Ville Syrjälä
Some fixes and flip queue related prep work for the DSB.
Extracted from the larger flip queue series just to get a CI run
without the rest of the flip queue cruft possibly getting in the way.
Ville Syrjälä (6):
drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tai
Hi,
Here's the first drm-misc-next PR for 6.17.
Maxime
drm-misc-next-2025-06-12:
drm-misc-next for 6.17:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
- atomic-helpers: Tune the enable / disable sequence
- bridge: Add destroy hook
- color management: Add helpers for hardware gamma L
Hello!
Registration & Call for Proposals are open for XDC 2025, which will
take place at the TU Wien Kuppelsaal in Vienna, Austria on 29
September to 1 October.
https://xdc2025.x.org
As usual, the conference is free of charge and open to the general
public. If you plan on attending, pleas
Hi
Am 12.06.25 um 15:29 schrieb Imre Deak:
Hi,
On Tue, Jun 10, 2025 at 06:42:04PM +0300, Imre Deak wrote:
Hi Maxim, Thomas, Maarten,
could you please ack merging this patchset via drm-intel?
any objection to merge the patchset via drm-intel? If not, could
someone ack it?
Sorry for missing
Hi,
On Tue, Jun 10, 2025 at 06:42:04PM +0300, Imre Deak wrote:
> Hi Maxim, Thomas, Maarten,
>
> could you please ack merging this patchset via drm-intel?
any objection to merge the patchset via drm-intel? If not, could
someone ack it?
Patches 1-4 could be also merged to drm-misc-next instead, b
Quoting Jani Nikula (2025-06-12 09:46:17-03:00)
>The drm panel funcs should be static, fix it.
>
>Fixes: 3fdd5bfbd638 ("drm/i915/panel: register drm_panel and call
>prepare/unprepare for ICL+ DSI")
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel
Add intel_bw_pmdemand_needs_update() helper to avoid looking at struct
intel_bw_state internals outside of intel_bw.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c | 14 ++
drivers/gpu/drm/i915/display/intel_bw.h | 2 ++
drivers/gpu/drm/i915/dis
Hide all the structs that "derive" from struct intel_global_state inside
their respective implementation files.
Jani Nikula (16):
drm/i915/wm: abstract intel_dbuf_pmdemand_needs_update()
drm/i915/wm: add more accessors to dbuf state
drm/i915/wm: make struct intel_dbuf_state opaque type
drm
The drm panel funcs should be static, fix it.
Fixes: 3fdd5bfbd638 ("drm/i915/panel: register drm_panel and call
prepare/unprepare for ICL+ DSI")
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_panel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
Quoting Jani Nikula (2025-06-12 08:37:10-03:00)
>Align with all the other atomic check functions.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
> drivers/gpu/drm/i915/disp
> Subject: Re: [PATCH v6 01/11] mtd: core: always create master device
>
> - Ursprüngliche Mail -
> > Von: "Alexander Usyskin"
> > In general, it is fine for me - we have parent mtd initialized and
> > participating
> > in power management.
> >
> > I can't see how to bend idr_alloc to al
Add intel_dbuf_pmdemand_needs_update() helper to avoid looking at struct
intel_dbuf_state internals outside of skl_watermark.c.
With this, we can also move to_intel_dbuf_state(),
intel_atomic_get_old_dbuf_state(), and intel_atomic_get_new_dbuf_state()
inside skl_watermark.c.
Signed-off-by: Jani N
Quoting Jani Nikula (2025-06-12 08:37:11-03:00)
>Rename to follow filename based naming.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_plane.c | 4 ++--
> drivers/gpu/drm/i915/display/i
Quoting Jani Nikula (2025-06-12 08:37:08-03:00)
>Align with intel_plane_check_src_coordinates(). The "atomic" is
>superfluous.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 8
> drivers/gpu/drm/i915/display/intel_cu
Quoting Jani Nikula (2025-06-12 08:37:07-03:00)
>It's all atomic, no need to emphasize this.
>
>Signed-off-by: Jani Nikula
I think we should also update the kernel-doc directives in
Documentation/gpu/i915.rst. With that addressed,
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/Makefile
Prefer only looking at struct intel_bw_state internals inside
intel_bw.c. To that effect, move intel_can_enable_sagv() there, and
rename to intel_bw_can_enable_sagv() to have consistent naming.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c | 22 ++--
Quoting Jani Nikula (2025-06-12 08:37:09-03:00)
>intel_plane_atomic_check() isn't used outside of intel_plane.c. Make it
>static. While at it, rename to vacate the name for subsequent changes.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_pla
With all the code touching struct intel_cdclk_state moved inside
intel_cdclk.c, we move the struct definition there too, and make the
type opaque. This nicely reduces includes from intel_cdclk.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 36 +++
Add intel_cdclk_actual() and intel_cdclk_actual_voltage_level() helpers
to avoid looking at struct intel_cdclk_state internals outside of
intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 10 ++
drivers/gpu/drm/i915/display/intel_cdclk.h|
Add intel_cdclk_pmdemand_needs_update() helper to avoid looking at
struct intel_cdclk_state internals outside of intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 15 +++
drivers/gpu/drm/i915/display/intel_cdclk.h| 1 +
drivers/gpu/drm
Add intel_cdclk_read_hw() function to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
intel_cdclk_init_hw() would be a better name, but we already have that.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 12
drive
Add intel_cdclk_force_min_cdclk() helper to avoid modifying struct
intel_cdclk_state internals outside of intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +
drivers/gpu/drm/i915/display/intel_cdcl
Prefer only looking at struct intel_bw_state internals inside
intel_bw.c. To that effect, move icl_sagv_{pre,post}_plane_update()
there.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c | 68 +++-
drivers/gpu/drm/i915/display/intel_bw.h | 4 +-
dr
Add intel_cdclk_logical() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/hsw_ips.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +
drivers/gpu/drm/i915/display/intel_cdclk.h
Add intel_cdclk_bw_min_cdclk() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c| 4 ++--
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +
drivers/gpu/drm/i915/display/intel_cdcl
Add intel_cdclk_min_cdclk() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 4 ++--
drivers/gpu/drm/i915/display/intel_cdclk.c| 5 +
drivers/gpu/drm/i915/display
With all the code touching struct intel_bw_state moved inside
intel_bw.c, we move the struct definition there too, and make the type
opaque. to_intel_bw_state() needs to be turned into a proper
function. All of this nicely reduces includes from intel_bw.h.
Signed-off-by: Jani Nikula
---
drivers/
Add intel_bw_qgv_point_peakbw() helper to avoid looking at struct
intel_bw_state internals outside of intel_bw.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c | 5 +
drivers/gpu/drm/i915/display/intel_bw.h | 1 +
drivers/gpu/drm/i915/display/intel_pmdema
With all the code touching struct intel_dbuf_state moved inside
skl_watermark.c, we move the struct definition there too, and make the
type opaque. This nicely reduces includes from skl_watermark.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/skl_watermark.c | 12
dr
Add intel_dbuf_num_enabled_slices() and intel_dbuf_num_active_pipes()
helpers to avoid looking at struct intel_dbuf_state internals outside of
skl_watermark.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_pmdemand.c | 6 +++---
drivers/gpu/drm/i915/display/skl_watermark.c
Quoting Ankit Nautiyal (2025-06-12 04:53:30-03:00)
>As per Wa_16025573575 for PTL, set the GPIO masks bit before starting
>bit-bashing and maintain value through the bit-bashing sequence.
>After bit-bashing sequence is done, clear the GPIO masks bits.
>
>Signed-off-by: Ankit Nautiyal
>---
> driver
Align with all the other atomic check functions.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_plane.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --
Hi Dave, Simona,
Here's a pull request for v6.16-rc2, especially the EPROBE_DEFER one seems
serious,
I've had the same loop when converting xe/i915 audio to use EPROBE_DEFER. :)
Best regards!
~Maarten
drm-misc-fixes-2025-06-12:
drm-misc-fixes for v6.16-rc2:
- Fix infinite EPROBE_DEFER loop in v
On Thursday, 12 June 2025 13:30:42 CEST Andi Shyti wrote:
> Hi Janusz,
>
> On Thu, Jun 12, 2025 at 11:45:46AM +0200, Janusz Krzysztofik wrote:
> > On Thursday, 12 June 2025 11:35:31 CEST Jani Nikula wrote:
> > > On Thu, 12 Jun 2025, Janusz Krzysztofik
> > > wrote:
> > > > On Wednesday, 11 June 2
It's all atomic, no need to emphasize this.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 4 ++--
drivers/gpu/drm/i915/display/i9xx_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 2 +-
drivers/gpu/drm
Rebase and resend of [1].
BR,
Jani.
[1] https://lore.kernel.org/r/cover.1744129283.git.jani.nik...@intel.com
Jani Nikula (5):
drm/i915/plane: rename intel_atomic_plane.[ch] to intel_plane.[ch]
drm/i915/plane: drop atomic from intel_atomic_plane_check_clipping()
drm/i915/plane: make intel_p
> -Original Message-
> From: Murthy, Arun R
> Sent: Thursday, June 12, 2025 4:43 PM
> To: Kandpal, Suraj ;
> nouv...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K
> Subject: RE: [PATC
Rename to follow filename based naming.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_plane.c | 4 ++--
drivers/gpu/drm/i915/display/intel_plane.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git
intel_plane_atomic_check() isn't used outside of intel_plane.c. Make it
static. While at it, rename to vacate the name for subsequent changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_plane.c | 6 +++---
drivers/gpu/drm/i915/display/intel_plane.h | 2 --
2 files changed,
Align with intel_plane_check_src_coordinates(). The "atomic" is
superfluous.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 8
drivers/gpu/drm/i915/display/intel_cursor.c| 8
drivers/gpu/drm/i915/display/intel_plane.c | 8
Hi Janusz,
On Thu, Jun 12, 2025 at 11:45:46AM +0200, Janusz Krzysztofik wrote:
> On Thursday, 12 June 2025 11:35:31 CEST Jani Nikula wrote:
> > On Thu, 12 Jun 2025, Janusz Krzysztofik
> > wrote:
> > > On Wednesday, 11 June 2025 22:54:40 CEST Andi Shyti wrote:
> > >> Hi Nitin,
> > >>
> > >> On W
> > > -Original Message-
> > > From: Kandpal, Suraj
> > > Sent: Monday, April 14, 2025 9:46 AM
> > > To: nouv...@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
> > > intel- x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > > Cc: Nautiyal, Ankit K ; Murthy, Arun R
> >
On 12/06/2025 09:30, Tzung-Bi Shih wrote:
i915_pmu.c may fail to build with GCOV and AutoFDO enabled.
../drivers/gpu/drm/i915/i915_pmu.c:116:3: error: call to
'__compiletime_assert_487' declared with 'error' attribute: BUILD_BUG_ON failed:
bit > BITS_PER_TYPE(typeof_member(struct i915_pmu, e
== Series Details ==
Series: drm/i915/pmu: Fix build error with GCOV and AutoFDO enabled (rev2)
URL : https://patchwork.freedesktop.org/series/149617/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16688 -> Patchwork_149617v2
> -Original Message-
> From: Murthy, Arun R
> Sent: Thursday, June 12, 2025 11:45 AM
> To: Kandpal, Suraj ;
> nouv...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K
> Subject: RE: [PAT
> Subject: Re: [PATCH v6 01/11] mtd: core: always create master device
>
> Hello,
>
> On 11/06/2025 at 10:52:36 GMT, "Usyskin, Alexander"
> wrote:
>
> >> Subject: Re: [PATCH v6 01/11] mtd: core: always create master device
> >>
> >> - Ursprüngliche Mail -
> >> > Von: "Miquel Raynal"
>
On Wednesday, 11 June 2025 22:54:40 CEST Andi Shyti wrote:
> Hi Nitin,
>
> On Wed, Jun 11, 2025 at 03:45:30PM +, Gote, Nitin R wrote:
> > [...]
> > > Subject: [PATCH] drm/i915/ring_submission: Fix timeline left held on VMA
> > > alloc
> > > error
> > >
> >
> > Generally, it's preferred to us
== Series Details ==
Series: drm/i915: Add drm_panic support (rev9)
URL : https://patchwork.freedesktop.org/series/141935/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16688 -> Patchwork_141935v9
Summary
---
**SUCCE
On Thursday, 12 June 2025 11:35:31 CEST Jani Nikula wrote:
> On Thu, 12 Jun 2025, Janusz Krzysztofik
> wrote:
> > On Wednesday, 11 June 2025 22:54:40 CEST Andi Shyti wrote:
> >> Hi Nitin,
> >>
> >> On Wed, Jun 11, 2025 at 03:45:30PM +, Gote, Nitin R wrote:
> >> > [...]
> >> > > Subject: [PAT
== Series Details ==
Series: drm/i915/gmbus: Add Wa_16025573575 for PTL for bit-bashing
URL : https://patchwork.freedesktop.org/series/150137/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16688 -> Patchwork_150137v1
Summar
On Thu, 12 Jun 2025, Janusz Krzysztofik
wrote:
> On Wednesday, 11 June 2025 22:54:40 CEST Andi Shyti wrote:
>> Hi Nitin,
>>
>> On Wed, Jun 11, 2025 at 03:45:30PM +, Gote, Nitin R wrote:
>> > [...]
>> > > Subject: [PATCH] drm/i915/ring_submission: Fix timeline left held on VMA
>> > > alloc
>
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, April 14, 2025 9:46 AM
> To: nouv...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Murthy, Arun R
> ; Kandpal, Suraj
> Subje
i915_pmu.c may fail to build with GCOV and AutoFDO enabled.
../drivers/gpu/drm/i915/i915_pmu.c:116:3: error: call to
'__compiletime_assert_487' declared with 'error' attribute: BUILD_BUG_ON
failed: bit > BITS_PER_TYPE(typeof_member(struct i915_pmu, enable)) - 1
116 | BUILD_BUG_
The vaddr of the fbdev framebuffer is private to the struct
intel_fbdev, so this function is needed to access it for drm_panic.
Also the struct i915_vma is different between i915 and xe, so it
requires a few functions to access fbdev->vma->iomap.
Signed-off-by: Jocelyn Falempe
---
v2:
* Add int
When the panic handler is called, configure the psr to send the full
framebuffer to the monitor, otherwise the panic screen is only
partially visible.
Signed-off-by: Jocelyn Falempe
---
v8:
* Added in v8
.../gpu/drm/i915/display/intel_atomic_plane.c | 7 +++
drivers/gpu/drm/i915/display/
On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements 4-Tiling support, to still be able to draw
the panic screen.
Signed-off-by: Jocelyn Falempe
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 20 +++
1 file changed, 20 i
On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements Y-Tiling support, to still be able to draw
the panic screen.
Signed-off-by: Jocelyn Falempe
---
v8:
* Pass the tiling function to intel_bo_panic_setup()
.../gpu/drm/i915/display/intel_a
drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.
This assumes that the alignment restriction is always smaller in
linear than in tiled.
It also assumes that the linear framebuffer size is alw
This adds drm_panic support for a wide range of Intel GPU. I've
tested it only on 4 laptops, Haswell (with 128MB of eDRAM),
Comet Lake, Raptor Lake, and Lunar Lake.
For hardware using DPT, it's not possible to disable tiling, as you
will need to reconfigure the way the GPU is accessing the
framebuf
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