== Series Details ==
Series: drm/i915/bios: Workaround broken video BIOS in LG Gram 2021 (rev4)
URL : https://patchwork.freedesktop.org/series/99052/
State : failure
== Summary ==
Address 'hjl.to...@gmail.com' is not on the allowlist!
Exception occurred during validation, bailing out!
LG Gram 2021 laptop 17Z95P-K.ADE9U1 OpRegion has
FW size: 0x2200
VBT size: 0x2000
BDB offset: 0x30
BDB size: 0x216e
Add intel_init_opregion_quirks to use FW size as VBT size on LG Gram
17Z95P-K.ADE9U1 and update intel_bios_is_valid_vbt to use FW size,
instead of VBT size if the quirk is applied,
== Series Details ==
Series: drm/i915/vdsc: Use the DSC config tables for DSI panels (rev4)
URL : https://patchwork.freedesktop.org/series/145561/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16199 -> Patchwork_145561v4
Su
Hi,
> Am 27.02.25 um 13:52 schrieb Andi Shyti:
> > Hi Nitin,
> >
> > On Wed, Feb 26, 2025 at 09:25:34PM +0530, Nitin Gote wrote:
> >> Give the scheduler a chance to breath by calling cond_resched() as
> >> some of the loops may take some time on old machines (like
> >> apl/bsw/pnv), and so catch
Some DSI panel vendors end up hardcoding PPS params because of which
it does not listen to the params sent from the source. We use the
default config tables for DSI panels when using DSC 1.1 rather than
calculate our own rc parameters.
--v2
-Use intel_crtc_has_type [Jani]
--v3
-Add Signed-off-by
> Subject: Re: [PATCH] drm/i915/vdsc: Use the DSC config tables for DSI panels
>
>
> On 2/27/2025 4:56 PM, Suraj Kandpal wrote:
> > Some DSI panel vendors end up hardcoding PPS params because of which
> > it does not listen to the params sent from the source. We use the
> > default config tables
On 2/27/2025 4:56 PM, Suraj Kandpal wrote:
Some DSI panel vendors end up hardcoding PPS params because of which
it does not listen to the params sent from the source. We use the
default config tables for DSI panels when using DSC 1.1 rather than
calculate our own rc parameters.
--v2
-Use intel
== Series Details ==
Series: drm/i915/dp: Implement POST_LT_ADJ_REQ (rev2)
URL : https://patchwork.freedesktop.org/series/145348/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, February 28, 2025 12:18 AM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/i915/vdsc: intel_display conversions
>
> On Thu, 27 Feb 2025, "Kandpal, Suraj" wrote
> From mboxrd@z Thu Jan 1 00:00:00 1970
> Return-Path: mailto:intel-xe-boun...@lists.freedesktop.org
> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on
> aws-us-west-2-korg-lkml-1.web.codeaurora.org
> Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177])
>
== Series Details ==
Series: Improve type-safety on POWER_DOMAIN_*() macros (rev4)
URL : https://patchwork.freedesktop.org/series/144726/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16198 -> Patchwork_144726v4
Summary
---
== Series Details ==
Series: Improve type-safety on POWER_DOMAIN_*() macros (rev4)
URL : https://patchwork.freedesktop.org/series/144726/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/audio: Extend Wa_14020863754 to Xe3_LPD (rev2)
URL : https://patchwork.freedesktop.org/series/145492/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16198 -> Patchwork_145492v2
Summary
-
== Series Details ==
Series: drm/i915/dp: Implement POST_LT_ADJ_REQ (rev2)
URL : https://patchwork.freedesktop.org/series/145348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16198 -> Patchwork_145348v2
Summary
---
== Series Details ==
Series: drm/i915/dp: Implement POST_LT_ADJ_REQ (rev2)
URL : https://patchwork.freedesktop.org/series/145348/
State : warning
== Summary ==
Error: dim checkpatch failed
bfa49de32de7 drm/dp: Add definitions for POST_LT_ADJ training sequence
d287aa6407ca drm/dp: Add POST_LT_A
On Thu, Feb 27, 2025 at 05:28:18PM -0300, Gustavo Sousa wrote:
> Workaround Wa_14020863754 also applies to Xe3_LPD. Update
> needs_wa_14020863754() accordingly.
>
> Signed-off-by: Gustavo Sousa
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_audio.c | 3 ++-
> 1 file change
On Thu, Feb 27, 2025 at 05:28:17PM -0300, Gustavo Sousa wrote:
> Wa_14020863754 applies to the display IP, so we should be checking on
> display IP version instead of platform. So, let's replace
> display->platform.battlemage with the proper IP version check (14.01 for
> Xe2_HPD).
>
> Furthermore,
In the hope of contributing to type safety in our code, let's ensure
that the type returned by the POWER_DOMAIN_*() macros is always of type
enum intel_display_power_domain.
v2:
- Remove accidental +1 in definition of POWER_DOMAIN_PIPE(). (Jani)
Cc: Jani Nikula
Reviewed-by: Ville Syrjälä
Sign
== Series Details ==
Series: drm/i915/xe3lpd: Map POWER_DOMAIN_AUDIO_PLAYBACK to DC_off
URL : https://patchwork.freedesktop.org/series/145593/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16197 -> Patchwork_145593v1
Summar
On Thu, Feb 27, 2025 at 04:31:28PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/26/2025 8:41 PM, Ville Syrjälä wrote:
> > On Mon, Feb 24, 2025 at 11:47:15AM +0530, Ankit Nautiyal wrote:
> >> For fixed refresh rate use fixed timings for all platforms that support
> >> VRR. For this add checks to avoid
enum
> intel_display_power_domain
>
> drivers/gpu/drm/i915/display/intel_display_power.h | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>---
>base-commit: 6badede10d92c242241bd7bf59a5488b5eba5aa7
>change-id: 20250227-improve-type-safey-power-domain-macros-8bf2a14f43f9
>
>Best regards,
>--
>Gustavo Sousa
>
: 20250227-improve-type-safey-power-domain-macros-8bf2a14f43f9
Best regards,
--
Gustavo Sousa
Although we have comments in intel_display_limits.h saying that the
code expects PIPE_A and TRANSCODER_A to be zero, it doesn't hurt to add
them as explicit base values for calculating the power domain offset in
POWER_DOMAIN_*() macros.
On the plus side, we have that this:
* Fixes a warning repo
From: Ville Syrjälä
Add the bit definitions needed for POST_LT_ADJ sequence.
v2: DP_POST_LT_ADJ_REQ_IN_PROGRESS is bit 1 not 5 (Jani)
Signed-off-by: Ville Syrjälä
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm
Wa_14020863754 applies to the display IP, so we should be checking on
display IP version instead of platform. So, let's replace
display->platform.battlemage with the proper IP version check (14.01 for
Xe2_HPD).
Furthermore, for workarounds, we should be checking on full IP versions
to avoid applyi
This is v2 of the series to extend Wa_14020863754 to Xe3_LPD.
The initial version was just a single patch. Now this is a 2-patch
series, where the first patch converts needs_wa_14020863754() to always
check IP versions.
Signed-off-by: Gustavo Sousa
---
Changes in v2:
- Add a patch convert needs_
Workaround Wa_14020863754 also applies to Xe3_LPD. Update
needs_wa_14020863754() accordingly.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_audio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gp
In Xe3_LPD, display audio has the core audio logic located in PG0 and
per-transcoder logic in the same power well that provides power for the
transcoder [1].
For stuff like audio device enumeration, we need to ensure that PG0 is
turned on. For playback, we additionally need the transcoder's power
On Wed, 26 Feb 2025, Ville Syrjälä wrote:
> On Wed, Feb 26, 2025 at 12:01:06PM +0200, Jani Nikula wrote:
>> Move pfit code to intel_pfit.c, convert to struct intel_display, split
>> out pfit registers to a separate file, etc.
>>
>> Jani Nikula (5):
>> drm/i915/pfit: rename intel_panel_fitting()
On Thu, 27 Feb 2025, "Kandpal, Suraj" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Thursday, February 27, 2025 5:47 PM
>> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
>> intel-gfx@lists.freedesktop.org
>> Cc: Kandpal, Suraj
>> Subject: Re: [PATCH] drm/i915/vdsc: in
== Series Details ==
Series: drm/xe/display: Program double buffered LUT registers (rev4)
URL : https://patchwork.freedesktop.org/series/142437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16195 -> Patchwork_142437v4
Summ
== Series Details ==
Series: drm/xe/display: Program double buffered LUT registers (rev4)
URL : https://patchwork.freedesktop.org/series/142437/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, 26 Feb 2025 at 21:29, Borah, Chaitanya Kumar
wrote:
>
> Hello Bartosz,
>
> Hope you are doing well. I am Chaitanya from the linux graphics team in Intel.
>
> This mail is regarding a regression we are seeing in our CI runs[1] on
> linux-next repository.
>
> Since the version next-20250225
Hi Dave and Sima,
Here goes our only i915 fix for this round.
Thanks,
Rodrigo.
drm-intel-fixes-2025-02-27:
- Fix encoder HW state readout for DP UHBR MST (Imre)
The following changes since commit d082ecbc71e9e0bf49883ee4afd435a77a5101b6:
Linux 6.14-rc4 (2025-02-23 12:32:57 -0800)
are availab
Hi Dave and Sima,
Here goes our xe fixes for this round.
Thanks,
Rodrigo.
drm-xe-fixes-2025-02-27:
uAPI:
- OA uapi fix (Umesh)
Driver:
- Userptr related fixes (Auld)
- Remove a duplicated register entry (Mingong)
- Scheduler related fix to prevent exec races when freeing it (Tejas)
The followin
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, February 27, 2025 5:47 PM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Kandpal, Suraj
> Subject: Re: [PATCH] drm/i915/vdsc: intel_display conversions
>
> On Thu, 27 Feb 2025,
Am 27.02.25 um 13:52 schrieb Andi Shyti:
> Hi Nitin,
>
> On Wed, Feb 26, 2025 at 09:25:34PM +0530, Nitin Gote wrote:
>> Give the scheduler a chance to breath by calling cond_resched()
>> as some of the loops may take some time on old machines (like apl/bsw/pnv),
>> and so catch the attention of the
Hi,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2025-02-27:
Fix a rounding error in vkms, a header fix for img, a connector status
fix for nouveau, and a NULL pointer dereference fix for deferred IO
drivers.
The following changes since commit 838c17fd077e611b12c78feb0feee1b30ed09b63
== Series Details ==
Series: drm/i915/vdsc: Use the DSC config tables for DSI panels (rev3)
URL : https://patchwork.freedesktop.org/series/145561/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16193 -> Patchwork_145561v3
Su
== Series Details ==
Series: drm/i915/vdsc: intel_display conversions
URL : https://patchwork.freedesktop.org/series/145570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16193 -> Patchwork_145570v1
Summary
---
**SUC
Hi Nitin,
On Wed, Feb 26, 2025 at 09:25:34PM +0530, Nitin Gote wrote:
> Give the scheduler a chance to breath by calling cond_resched()
> as some of the loops may take some time on old machines (like apl/bsw/pnv),
> and so catch the attention of the watchdogs.
>
> Closes: https://gitlab.freedeskt
On Tue, 25 Feb 2025, Chaitanya Kumar Borah
wrote:
> From PTL, LUT registers are made double buffered. With this change,
> we don't need to wait for vblank to program them. Start DSB1 for
> programming them without waiting for vblank.
>
> Signed-off-by: Chaitanya Kumar Borah
> ---
> drivers/gpu/
On Thu, 27 Feb 2025, Suraj Kandpal wrote:
> intel_display conversions for vdsc in an effort to move away
> from drm_i915_private.
> While at it use display->platform.xx.
Please update with
-#include "i915_drv.h"
+#include "i915_utils.h"
and you get
Reviewed-by: Jani Nikula
BR,
Jani.
>
>
Quoting Matt Roper (2025-02-26 19:26:13-03:00)
>On Wed, Feb 26, 2025 at 11:08:46AM -0300, Gustavo Sousa wrote:
>> Workaround Wa_14020863754 also applies to Xe3_LPD. Update
>> needs_wa_14020863754() accordingly.
>
>It looks like this might also be needed for Xe2_HPD (version 14.01) as well?
Yep, di
Some DSI panel vendors end up hardcoding PPS params because of which
it does not listen to the params sent from the source. We use the
default config tables for DSI panels when using DSC 1.1 rather than
calculate our own rc parameters.
--v2
-Use intel_crtc_has_type [Jani]
--v3
-Add Signed-off-by
intel_display conversions for vdsc in an effort to move away
from drm_i915_private.
While at it use display->platform.xx.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 180 +++---
1 file changed, 87 insertions(+), 93 deletions(-)
diff --git a/drive
== Series Details ==
Series: drm/i915/gvt: update MAINTAINERS
URL : https://patchwork.freedesktop.org/series/145558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16192 -> Patchwork_145558v1
Summary
---
**SUCCESS**
On 2/26/2025 8:41 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:15AM +0530, Ankit Nautiyal wrote:
For fixed refresh rate use fixed timings for all platforms that support
VRR. For this add checks to avoid computing and reading VRR for
platforms that do not support VRR.
For platforms th
> -Original Message-
> From: Bartosz Golaszewski
> Sent: Thursday, February 27, 2025 1:30 PM
> To: Borah, Chaitanya Kumar
> Cc: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org; Kurmi,
> Suresh Kumar ; Saarinen, Jani
> ; linux-g...@vger.kernel.org
> Subject: Re: Regressio
Some DSI panel vendors end up hardcoding PPS params because of which
it does not listen to the params sent from the source. We use the
default config tables for DSI panels when using DSC 1.1 rather than
calculate our own rc parameters.
--v2
-Use intel_crtc_has_type [Jani]
Closes: https://gitlab.f
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, February 27, 2025 4:13 PM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Shankar, Uma
> ; Tseng, William ;
> Kandpal, Suraj
> Subject: Re: [PATCH] drm/i915/vds
On 2/26/2025 9:34 PM, Ville Syrjälä wrote:
On Wed, Feb 26, 2025 at 05:06:34PM +0200, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:14AM +0530, Ankit Nautiyal wrote:
During modeset enable sequence, program the fixed timings, and turn on the
VRR Timing Generator (VRR TG) for platforms that
On Thu, 27 Feb 2025, Suraj Kandpal wrote:
> Some DSI panel vendors end up hardcoding PPS params because of which
> it does not listen to the params sent from the source. We use the
> default config tables for DSI panels when using DSC 1.1 rather than
> calculate our own rc parameters.
>
> Closes:
On 2/26/2025 8:36 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:14AM +0530, Ankit Nautiyal wrote:
During modeset enable sequence, program the fixed timings, and turn on the
VRR Timing Generator (VRR TG) for platforms that always use VRR TG.
For this intel_vrr_set_transcoder now alway
On 2/26/2025 7:31 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:11AM +0530, Ankit Nautiyal wrote:
LRR and Vmax can be computed only if VRR is supported and vrr.in_range
is set. Currently we proceed with vrr timings only for VRR supporting
panels and return otherwise. For using VRR TG
On 2/26/2025 8:44 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 07:17:59PM +0530, Nautiyal, Ankit K wrote:
On 2/24/2025 11:47 AM, Ankit Nautiyal wrote:
Do not program transcoder registers for VRR for the secondary pipe of
the joiner. Remove check to skip VRR for joiner case.
Missed to dro
On 2/26/2025 7:25 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:09AM +0530, Ankit Nautiyal wrote:
Wa_14015406119 is required for PSR1/2 while working with fixed refresh
rate with VRR timing generator.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c |
On Thu, 27 Feb 2025, "Kandpal, Suraj" wrote:
>> -Original Message-
>> From: Intel-xe On Behalf Of Jani
>> Nikula
>> Sent: Tuesday, February 25, 2025 10:19 PM
>> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
>> Cc: Nikula, Jani
>> Subject: [PATCH 00/12] drm/i915: str
On 2/26/2025 7:15 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:08AM +0530, Ankit Nautiyal wrote:
As per bspec 49268: Disable PSR before disabling VRR.
We don't currently allow the VRR+PSR combo anyway, but if/when
we get to it I guess we'll want this order.
Reviewed-by: Ville Syrjä
On 2/26/2025 7:00 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:06AM +0530, Ankit Nautiyal wrote:
Add support for using VRR Timing generator for HDMI panels.
Please provide actual justification for this. And some kind of
explanation what kind of timings this will give us and why.
Y
On 2/26/2025 8:30 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:13AM +0530, Ankit Nautiyal wrote:
To have Guardband/Pipeline_full reconfigured seamlessly, move the
guardband and pipeline_full checks out from the pure !fastset block in
intel_pipe_config_compare().
Update the intel_set_
Hi Krzysztof,
> Hi Nitin,
>
> [...]
> > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13650
> [...]
>
> > ENGINE_READ_FW(engine, RING_START));
> > + /*
> > +* Sometimes engine head failed to set to zero even after
> > writing
> in
On 2/26/2025 6:57 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:05AM +0530, Ankit Nautiyal wrote:
MSA Ignore Timing PAR enable is set in the DP sink when we enable variable
refresh rate.
Currently for link training we depend on flipline to decide whether we
want to ignore the msa tim
On Wed, 26 Feb 2025, Ville Syrjälä wrote:
> On Wed, Feb 26, 2025 at 03:56:26PM +0200, Jani Nikula wrote:
>> We create the stream encoders and attach connectors for each pipe we
>> have. As the number of pipes has increased, we've failed to update the
>> topology manager maximum number of payloads
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, February 25, 2025 9:00 PM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org; Syrjala, Ville
> Cc: Nautiyal, Ankit K ; Shankar, Uma
> ; Kahola, Mika
> Subject: RE: [PATCH 05/11] drm/i915/dp
> -Original Message-
> From: Intel-xe On Behalf Of Jani
> Nikula
> Sent: Tuesday, February 25, 2025 10:19 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [PATCH 00/12] drm/i915: struct intel_display conversions, part
> 2434235
>
>
On 2/26/2025 6:40 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:47:02AM +0530, Ankit Nautiyal wrote:
Since CMRR is now disabled, use the flag vrr.enable to tracks if vrr timing
generator is used with variable timings.
Avoid setting vrr.enable for CMRR and adjust readout to not set vrr.e
On 2/26/2025 6:29 PM, Ville Syrjälä wrote:
On Mon, Feb 24, 2025 at 11:46:59AM +0530, Ankit Nautiyal wrote:
Make helpers to compute vmin and vmax.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_vrr.c | 39 +++-
1 file changed, 31 insertions(+), 8 d
Some DSI panel vendors end up hardcoding PPS params because of which
it does not listen to the params sent from the source. We use the
default config tables for DSI panels when using DSC 1.1 rather than
calculate our own rc parameters.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issue
Hi Dave, Sima,
this is the weekly PR for drm-misc-next. It's very quiet: a few more
panels supported, some refactoring.
Best regards
Thomas
drm-misc-next-2025-02-27:
drm-misc-next for v6.15:
Cross-subsystem Changes:
bus:
- mhi: Avoid access to uninitialized field
Core Changes:
- Fix docmenta
Update GVT-g MAINTAINERS entry to reflect the current status of
maintenance and repositories.
Cc: Dave Airlie
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Simona Vetter
Cc: Tvrtko Ursulin
Cc: Zhenyu Wang
Cc: Zhi Wang
Signed-off-by: Jani Nikula
---
MAINTAINERS | 9 +++--
1 file changed, 3
Hi,
https://patchwork.freedesktop.org/series/145471/ - Re-reported.
i915.CI.BAT - Re-reported.
Thanks,
Ravali.
-Original Message-
From: I915-ci-infra On Behalf Of
Saarinen, Jani
Sent: 26 February 2025 17:38
To: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
i915-ci-in...@lists.freed
== Series Details ==
Series: drm/i915/pfit: panel fitter refactors
URL : https://patchwork.freedesktop.org/series/145471/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16183 -> Patchwork_145471v1
Summary
---
**SUCCES
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