> -Original Message-
> From: Intel-gfx On Behalf Of Jouni
> Högander
> Sent: 31 October 2024 13:40
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Hogander, Jouni
> Subject: [PATCH] drm/i915/psr: Disable Panel Replay as well if VRR is enabled
>
> Having Pane
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
Documentation/gpu/drm-mm:571:
/home/sfr/next/next/drivers/gpu/drm/scheduler/sched_main.c:1359: ERROR:
Unexpected indentation.
Introduced by commit
baf4afc58314 ("drm/sched: Improve teardown d
On 07-11-2024 17:02, Suraj Kandpal wrote:
Increase the latency programmed into PKG_C_LATENCY latency to be
a multiple of line time which is written into WM_LINETIME.
The commit subject prefix should be drm/i915/watermark (its i914 currently)
WA: 22020299601
Signed-off-by: Suraj Kandpal
---
== Series Details ==
Series: drm/i915: Potential boot oops fix and some cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141059/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15656 -> Patchwork_141059v2
Summar
== Series Details ==
Series: drm/i915: Potential boot oops fix and some cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141059/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/incl
== Series Details ==
Series: drm/i915: Potential boot oops fix and some cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141059/
State : warning
== Summary ==
Error: dim checkpatch failed
5e4f7ec4a2f4 drm/i915: Grab intel_display from the encoder to avoid potential
oopsies
0304a
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev4)
URL : https://patchwork.freedesktop.org/series/140886/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15654 -> Patchwork_140886v4
=
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev4)
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separ
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev4)
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim checkpatch failed
c148c2ea4196 drm/i915/display: identify discrete graphics
7cceb8432db
On Tue, Nov 05, 2024 at 07:17:53AM -0500, Usyskin, Alexander wrote:
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Monday, November 4, 2024 11:16 PM
> > To: Usyskin, Alexander
> > Cc: Gupta, Anshuman ; Deak, Imre
> > ; Miquel Raynal ;
> > Richard Weinberger ; Vignesh Raghavendra
Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c| 3 ++-
Convert HAS_HW_SAGV_WM() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
v2: Rebase
Reviewed-by: Vinod Govindapillai # v1
Reviewed-by: Rodrigo Vivi # v1
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c |
On Thu, Nov 07, 2024 at 04:48:22AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/hdcp: Handle HDCP Line Rekeying for HDCP 1.4 (rev4)
> URL : https://patchwork.freedesktop.org/series/140993/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_15648_ful
On Thu, Nov 07, 2024 at 07:58:08AM +0530, Suraj Kandpal wrote:
> TRANS_DDI_FUNC_CTL asks us to disable hdcp line rekeying when not in
> hdcp 2.2 and we are not using an hdmi transcoder and it need to be
> enabled when we are using an HDMI transcoder to enable HDCP 1.4.
> We use intel_de_rmw cycles
Convert intel_display_device_probe() to accept struct pci_dev * instead
of struct drm_i915_private *. Return struct intel_display * in
preparation of allocating the memory of it later.
Reviewed-by: Vinod Govindapillai
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_dev
On Thu, Nov 07, 2024 at 03:13:54PM +0200, Alexander Usyskin wrote:
> Check NVM access mode from GSC FW status registers
> and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Alexander Usyskin
> ---
> drivers/gpu/drm/i915/intel_nvm.c |
On Thu, Nov 07, 2024 at 03:13:53PM +0200, Alexander Usyskin wrote:
> Enable access to internal non-volatile memory on
> DGFX devices via a child device.
> The nvm child device is exposed via auxiliary bus.
Reviewed-by: Rodrigo Vivi
>
> CC: Rodrigo Vivi
> CC: Lucas De Marchi
> Co-developed-by:
On Thu, Nov 07, 2024 at 03:13:56PM +0200, Alexander Usyskin wrote:
> Check NVM access mode from GSC FW status registers
> and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Alexander Usyskin
> ---
> drivers/gpu/drm/xe/regs/xe_gsc_regs
Convert intel_display_device.[ch] to struct intel_display, including
callers, but excluding intel_display_device_probe() which will be
handled in follow-up.
v2: fix display->drm = display->drm goof-up
Reviewed-by: Vinod Govindapillai
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/
Identify mobile platforms separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_MOBILE() from display code.
v2: Make snb_display static (kernel test robot)
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani N
Convert HAS_ULTRAJOINER() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
All the feature check helpers now support (and some require) passing
struct intel_display. Rename the parameter to __display to reflect the
fact.
Reviewed-by: Vinod Govindapillai
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h | 114 +-
1 file change
Convert HAS_SAGV() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h | 3 +-
drivers/gpu/drm/i915/
Convert HAS_GMBUS_BURST_READ() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
driv
Convert HAS_IPS() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/hsw_ips.c | 4 +++-
drivers/gpu/drm
Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
v2: Rebase
Reviewed-by: Vinod Govindapillai # v1
Reviewed-by: Rodrigo Vivi # v1
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h
Identify discrete graphics separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_DGFX() from display code.
Start grouping platform groups separately in INTEL_DISPLAY_PLATFORMS()
in anticipation of more groups to come.
Reviewed-by: Rodrigo
Convert HAS_DP20() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
v2: Rebase
Reviewed-by: Vinod Govindapillai # v1
Reviewed-by: Rodrigo Vivi # v1
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c| 7 ++-
Convert HAS_4TILE() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_display_device.h| 2 +-
drivers/gpu/drm
Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Reviewed-by: Vinod Govindapillai
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.c | 2 +
v2 of [1].
BR,
Jani.
[1] https://lore.kernel.org/r/cover.1730740629.git.jani.nik...@intel.com
Jani Nikula (15):
drm/i915/display: identify discrete graphics
drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct
intel_display
drm/i915/display: convert HAS_4TILE() to struct in
== Series Details ==
Series: drm/i915/mst: cleanups, renames, clarifications
URL : https://patchwork.freedesktop.org/series/141068/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15651 -> Patchwork_141068v1
Summary
---
== Series Details ==
Series: drm/i915/mst: cleanups, renames, clarifications
URL : https://patchwork.freedesktop.org/series/141068/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bit
== Series Details ==
Series: drm/i915/mst: cleanups, renames, clarifications
URL : https://patchwork.freedesktop.org/series/141068/
State : warning
== Summary ==
Error: dim checkpatch failed
ef6c68067b62 drm/i915/mst: pass primary encoder to primary encoder hooks
-:21: WARNING:LONG_LINE: line
Pass the primary encoder to the primary encoder hooks. This is
pedantically correct, but intel_ddi_post_pll_disable() also works with
the fake encoder by coincidence.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Quoting Gustavo Sousa (2024-11-07 17:14:36-03:00)
>Quoting Luca Coelho (2024-11-07 16:23:06-03:00)
>>On Thu, 2024-11-07 at 15:27 -0300, Gustavo Sousa wrote:
>>> There is a bit of a chicken and egg situation where we depend on runtime
>>> info to know that DMC and wakelock are supported by the hardw
On Thu, 07 Nov 2024, Jani Nikula wrote:
> It would be best to have self-explanatory code, but lacking that, add
> some comments about the way the DDI encoder hooks get called from DP MST
> stream encoders.
The subject prefix should be "drm/i915/ddi:".
>
> Signed-off-by: Jani Nikula
> ---
> dri
struct intel_display will replace struct drm_i915_private as the main
display device data structure. Convert the DP MST code to struct
intel_display as much as possible.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 170 ++--
1 file changed, 85 inse
The fake encoders pretty much match individual MST streams. The encoders
remain as fake as ever, but change the naming to MST stream
encoders. Rename all the encoder hooks and related functions called from
them to mst_stream_* to clarify what type of encoders the hooks are
called on.
Signed-off-by
It would be best to have self-explanatory code, but lacking that, add
some comments about the way the DDI encoder hooks get called from DP MST
stream encoders.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 51 ++--
1 file changed, 38 insertions(+),
Making register macros platform or display version aware is not exactly
something I want to promote widely, but in this case it's the lesser of
two evils. hsw_chicken_trans_reg() is not pretty, and it doesn't have a
suitable home.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel
Use a primary_encoder local variable in
intel_dp_create_fake_mst_encoder() for clarity.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/d
Add helpers to_primary_encoder() and to_primary_dp() to convert fake MST
encoder pointers to primary encoder and DP pointers, respectively, and
use them.
The main point is to highlight the primary encoder and DP usage. Very
few places actually need the struct intel_dp_mst_encoder pointer, or the
p
Switch to the modern style in fake mst encoder creation.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 46 ++---
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/disp
Brush up the DP MST code a little bit wrt naming and type/variable use
to make everything a bit clearer.
BR,
Jani.
Jani Nikula (8):
drm/i915/mst: pass primary encoder to primary encoder hooks
drm/i915/mst: rename intel_encoder to encoder
drm/i915/mst: introduce to_primary_encoder() and to_p
Quoting Gustavo Sousa (2024-11-07 17:14:36-03:00)
>Quoting Luca Coelho (2024-11-07 16:23:06-03:00)
>>On Thu, 2024-11-07 at 15:27 -0300, Gustavo Sousa wrote:
>>> There is a bit of a chicken and egg situation where we depend on runtime
>>> info to know that DMC and wakelock are supported by the hardw
Quoting Luca Coelho (2024-11-07 16:23:06-03:00)
>On Thu, 2024-11-07 at 15:27 -0300, Gustavo Sousa wrote:
>> There is a bit of a chicken and egg situation where we depend on runtime
>> info to know that DMC and wakelock are supported by the hardware, and
>> such information is grabbed via display MM
== Series Details ==
Series: drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD (rev3)
URL : https://patchwork.freedesktop.org/series/140282/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15651 -> Patchwork_140282v3
Summary
On Thu, 2024-11-07 at 15:27 -0300, Gustavo Sousa wrote:
> There is a bit of a chicken and egg situation where we depend on runtime
> info to know that DMC and wakelock are supported by the hardware, and
> such information is grabbed via display MMIO functions, which in turns
> call intel_dmc_wl_get
== Series Details ==
Series: drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD (rev3)
URL : https://patchwork.freedesktop.org/series/140282/
State : warning
== Summary ==
Error: dim checkpatch failed
4c9de302bb17 drm/i915/dmc_wl: Use i915_mmio_reg_offset() instead of reg.reg
f4744774f2dd drm/x
== Series Details ==
Series: drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD (rev3)
URL : https://patchwork.freedesktop.org/series/140282/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Quoting Patchwork (2024-11-06 19:46:38-03:00)
>== Series Details ==
>
>Series: drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD (rev2)
>URL : https://patchwork.freedesktop.org/series/140282/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_15648 -> Patchwork_140282v2
>==
Instead of checking for HAS_DMC_WAKELOCK() multiple times, let's use it
to sanitize the enable_dmc_wl parameter and use that variable when
necessary.
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 21 ++---
1 file changed,
There is a bit of a chicken and egg situation where we depend on runtime
info to know that DMC and wakelock are supported by the hardware, and
such information is grabbed via display MMIO functions, which in turns
call intel_dmc_wl_get() and intel_dmc_wl_put() as part of their regular
flow.
Since
We should be able to use the DMC wakelock only if the display hardware
has support for DMC. We will add a check for that in an upcoming change.
Since info for DMC availability (HAS_DMC()) needs runtime device info,
move the call to intel_dmc_wl_init() to a place where we know we have
the hardware
It is possible that there are active wakelock references at the time we
are disabling the DMC wakelock mechanism. We need to deal with that in
two ways:
(A) Implement the missing step from Bspec:
The Bspec instructs us to clear any existing wakelock request bit
after disabling the mechani
Enabling and disabling the DMC wakelock should be done as part of
enabling and disabling of dynamic DC states, respectively. We should not
enable or disable DMC wakelock independently of DC states, otherwise we
would risk ending up with an inconsistent state where dynamic DC states
are enabled and
Although Bspec doesn't explicitly mentions that, as of Xe3_LPD, using
DMC wakelock is the officially recommended way of accessing registers
that would be off during DC5/DC6 and the legacy method (where the DMC
intercepts MMIO to wake up the hardware) is to be avoided.
As such, update the driver to
A HAS_DMC_WAKELOCK() macro gives more semantic than openly checking the
display version. Define it and use it where appropriate.
v2:
- Make this patch contain only the non-functional refactor. Functional
changes related to including HAS_DMC() in the macro are done in
upcoming changes. (J
In order to be able to use the DMC wakelock, we also need to know that
the display hardware has support for DMC. For that, include HAS_DMC() in
the definition of HAS_DMC_WAKELOCK().
Cc: Jani Nikula
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dis
Allow simpler syntax for defining entries for single registers in range
tables. That makes them easier to type as well as to read, allowing one
to quickly tell whether a range actually refers to a single register or
a "true range".
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
---
drive
Some display MMIO transactions for offsets in the range that requires
the DMC wakelock happen in atomic context (this has been confirmed
during tests on PTL). That means that we need to use a non-sleeping
variant of MMIO waiting function.
Implement __intel_de_wait_for_register_atomic_nowl() and us
In an upcoming change, we will add extra range tables for registers that
are touched by the DMC during DC states. The range table that we are
currently using is meant for registers that are powered off during DC
states. As such, let's rename the table to powered_off_ranges and also
add a comment re
We will be using more than one range table in
intel_dmc_wl_check_range(). As such, move the logic to a new function
and name it intel_dmc_wl_reg_in_range().
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 21 +++--
1 file c
There are extra registers that require the DMC wakelock when specific
dynamic DC states are in place. Those are registers that are touched by
the DMC and require DC exit for proper access. Add the range tables for
them and use the correct one depending on the enabled DC state.
v2:
- Do not look
We are currently using ARRAY_SIZE() to iterate address ranges in
intel_dmc_wl_check_range(). In upcoming changes, we will be using more
than a single table and will extract the range checking logic into a
dedicated function that takes a range table as argument. As we will not
able to use ARRAY_SIZE
When the DMC wakelock refcount reaches zero, we know that there are no
users and that we can do the actual release operation on the hardware,
which is queued with a delayed work. The idea of the delayed work is to
avoid performing the release if a new lock user appears (i.e. refcount
gets increment
Bspec says that disabling dynamic DC states require taking the DMC
wakelock to cause an DC exit before writing to DC_STATE_EN. Implement
that.
In fact, testing on PTL revealed we end up failing to exit DC5/6 without
this step.
Bspec: 71583
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
-
In upcoming display changes, we will modify the DMC wakelock MMIO
waiting code to choose a non-sleeping variant implementation, because
the wakelock is also taking in atomic context.
While xe provides an explicit parameter (namely "atomic") to prevent
xe_mmio_wait32() from sleeping, i915 does not
The macro i915_mmio_reg_offset() is the proper interface to get a
register's offset. Use that instead of looking directly at reg.reg.
Reviewed-by: Jani Nikula
Reviewed-by: Luca Coelho
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 11 ++-
1 file changed,
Using the DMC wakelock is the official recommendation for Xe3_LPD. This
series apply fixes to the current DMC wakelock implementation and
enables it by default for Xe3_LPD. The series has been tested with a PTL
machine.
Gustavo Sousa (18):
drm/i915/dmc_wl: Use i915_mmio_reg_offset() instead of r
On Thu, Nov 07, 2024 at 12:32:56PM +0200, Jani Nikula wrote:
> On Wed, 06 Nov 2024, Rodrigo Vivi wrote:
> > On Mon, Nov 04, 2024 at 07:19:29PM +0200, Jani Nikula wrote:
> >> Identify mobile platforms separately in display, using the platform
> >> group mechanism. This enables dropping the dependen
Hey,
Den 2024-11-07 kl. 13:21, skrev Ville Syrjälä:
> On Thu, Nov 07, 2024 at 12:36:17PM +0100, Maarten Lankhorst wrote:
>> We're changing the driver to have no interrupts during early init for
>> Xe, so we poll the PIPE_FRMSTMSMP counter instead.
>>
>> Signed-off-by: Maarten Lankhorst
>> Link:
== Series Details ==
Series: drm/i915/scaler: Scaler code cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/140694/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev2)
URL : https://patchwork.freedesktop.org/series/140306/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15649 -> Patchwork_140306v2
Summary
--
== Series Details ==
Series: drm/i915/scaler: Scaler code cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/140694/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops
== Series Details ==
Series: drm/i915/scaler: Scaler code cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/140694/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15651 -> Patchwork_140694v3
Summary
---
*
== Series Details ==
Series: drm/i915/pps: Some PPS cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141029/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15651 -> Patchwork_141029v2
Summary
---
**SUCCE
== Series Details ==
Series: drm/i915/pps: Some PPS cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141029/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116
== Series Details ==
Series: drm/i915/pps: Some PPS cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/141029/
State : warning
== Summary ==
Error: dim checkpatch failed
ff7d1dd11395 drm/i915/pps: Store the power cycle delay without the +1
fc8b358de349 drm/i915/pps: Decouple pps de
From: Ville Syrjälä
Remove a bunch of pointless 'struct drm_device *dev' local variables.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/d
From: Ville Syrjälä
crt->connector is never used, nuke it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index b243ab51bdf0..
From: Ville Syrjälä
Rename a bunch of local variables to the preferred
encoder/connector from intel_encoder/intel_connector.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 44 +++-
1 file changed, 20 insertions(+), 24 deletions(-)
diff --git a/
From: Ville Syrjälä
Call the crtc state 'crtc_state' rather than 'pipe_config',
as is the modern style.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 62
1 file changed, 31 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/
From: Ville Syrjälä
Move the analog port register definitions into their
own file.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 1 +
drivers/gpu/drm/i915/display/intel_crt_regs.h | 48 +++
.../gpu/drm/i915/display/intel_pch_display.c | 1 +
From: Ville Syrjälä
ADPA_HOTPLUG_BITS is defined in terms of the individual
register bits and is defined in intel_crt.c, whereas the
counterpart mask (ADPA_CRT_HOTPLUG_MASK) is just defined
as a raw hex constant and lives in i915_reg.h. Just define
both the same way (with unified name to boot) an
From: Ville Syrjälä
The ADPA_DPMS bit definitions aer just an alias for the
sync disable bits, and unused one at that. Drop the
pointless definitions.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
From: Ville Syrjälä
Split an overly long line in the CRT code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
i
From: Ville Syrjälä
Follow the modern style and use REG_BIT() & co. for the analog
port register definitions.
Also throw out the ADPA_DPMS_... stuff as that's just an alias
for the sync off bits.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 4 +-
drivers/gpu/dr
From: Ville Syrjälä
Grab the intel_display from 'encoder' rather than 'state'
in the encoder hooks to avoid the massive footgun that is
intel_sanitize_encoder(), which passes NULL as the 'state'
argument to encoder .disable() and .post_disable().
TODO: figure out how to actually fix intel_saniti
From: Ville Syrjälä
I noticed we're grabbing intel_display from the 'state' parameter
in a bunch of encoder hooks. That could oops due to
intel_sanitize_encoder() being an idiot. So fix that.
Follow up with a bunch of cleanups for the analog port code.
Ville Syrjälä (10):
drm/i915: Grab intel
On Thu, Nov 07, 2024 at 12:36:17PM +0100, Maarten Lankhorst wrote:
> We're changing the driver to have no interrupts during early init for
> Xe, so we poll the PIPE_FRMSTMSMP counter instead.
>
> Signed-off-by: Maarten Lankhorst
> Link:
> https://patchwork.freedesktop.org/patch/msgid/20241105121
== Series Details ==
Series: drm/i914/watermark: Modify latency programmed into PKG_C_LATENCY
URL : https://patchwork.freedesktop.org/series/141050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15649 -> Patchwork_141050v1
Increase the latency programmed into PKG_C_LATENCY latency to be
a multiple of line time which is written into WM_LINETIME.
WA: 22020299601
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/skl_watermark.c | 26 ++--
1 file changed, 18 insertions(+), 8 deletions(-)
d
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev2)
URL : https://patchwork.freedesktop.org/series/140306/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev2)
URL : https://patchwork.freedesktop.org/series/140306/
State : warning
== Summary ==
Error: dim checkpatch failed
4dbf595660af mtd: add driver for intel graphics non-volatile memory device
-:68: WARNING:FILE_PATH_C
== Series Details ==
Series: drm/i915/scaler: Scaler code cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/140694/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15649 -> Patchwork_140694v2
Summary
---
*
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/intel_nvm.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/
Enable access to internal non-volatile memory on
DGFX devices via a child device.
The nvm child device is exposed via auxiliary bus.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/Make
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +
drivers/gpu/drm/xe/xe_nvm.c | 32 +
1 - 100 of 161 matches
Mail list logo
