>From xe3 onwards, there is a provision to define and
use min ddb and interim ddb allocations for async flip
use case. Add the dbuf allocation status as part of
i915_ddb_info as well to show if min or interim ddb
is being used.
Bspec: 72053
Signed-off-by: Vinod Govindapillai
---
.../drm/i915/dis
From: Stanislav Lisovskiy
Starting from xe3, hw now is capable of switching automatically to min
ddb allocation(not using any extra blocks) or interim SAGV-adjusted
allocation in case if async flip is used.
For that purpose there is now additional register, where correspodent
values have to be pr
Avoid using struct drm_i915_private reference and use intel_display
instead. This is in preparation for the rest of the patches in this
series where hw support for the minimum and interim ddb allocations
for async flip is added
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/
Use intel_display object instead of struct drm_i915_private in
skl_plane_wm_equals(). This is in preparation for the rest of
the patches in this series where hw support for the minimum and
interim ddb allocations for async flip is added
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915
Convert all intel_de_read() to use intel_display instead of
struct drm_i915_private object. This is in preparation for
the rest of the patches in this series where hw support for
the minimum and interim ddb allocations for async flip is
added.
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/d
Update intel_enabled_dbuf_slices_mask to use intel_display instead
of drm_i915_private object. This is a prepratory patch for the next
patch in the series, where all intel_de_read calls in skl_watermarks.c
are updated to use intel_display instead of drm_i915_private.
Signed-off-by: Vinod Govindapi
In Xe3, hw can automatically switch to minimum / interim ddb allocations
for async flip use case. Configure the minimum and interim ddb
configurations. As usage of intel_display is recommended instead of
drm_i915_private, few preparatory patches were added for that purpose.
Stanislav Lisovskiy (1)
> -Original Message-
> From: Kandpal, Suraj
> Sent: Tuesday, November 5, 2024 12:21 AM
> To: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D ; Kandpal, Suraj
>
> Subject: [PATCH] drm/i915/xe3lpd: Update HDCP rekying bit
>
> The TRANS_DDI_FUNC_CTL
On Sat, Nov 02, 2024 at 01:46:15AM +, Alexander Coffin wrote:
>Hi Rodrigo,
>
>
>
>> I'm sorry for that. Our list is moderated for non-subs
== Series Details ==
Series: drm/i915/guc: Flush ct receive tasklet during reset preparation (rev3)
URL : https://patchwork.freedesktop.org/series/140741/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15628 -> Patchwork_140741v3
== Series Details ==
Series: drm/i915/pmu: Refactors
URL : https://patchwork.freedesktop.org/series/140905/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15628 -> Patchwork_140905v1
Summary
---
**SUCCESS**
No regr
== Series Details ==
Series: drm/i915/lspcon: do not hardcode settle timeout (rev3)
URL : https://patchwork.freedesktop.org/series/140116/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15628 -> Patchwork_140116v3
Summary
--
On 11/4/2024 15:09, Daniele Ceraolo Spurio wrote:
On 11/4/2024 3:02 PM, John Harrison wrote:
On 10/28/2024 16:31, Daniele Ceraolo Spurio wrote:
All MTL and ARL SKUs share the same GSC FW, but the newer platforms are
only supported in newer blobs. In particular, ARL-S is supported
starting from
On 10/30/2024 3:38 PM, Zhanjun Dong wrote:
GuC to host communication is interrupt driven, the handling has 3
parts: interrupt context, tasklet and request queue worker.
During GuC reset prepare, interrupt is disabled before destroy
contexts steps start. The IRQ and worker flushed to finish
in
== Series Details ==
Series: drm/i915/pmu: Refactors
URL : https://patchwork.freedesktop.org/series/140905/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 11/4/2024 3:02 PM, John Harrison wrote:
On 10/28/2024 16:31, Daniele Ceraolo Spurio wrote:
All MTL and ARL SKUs share the same GSC FW, but the newer platforms are
only supported in newer blobs. In particular, ARL-S is supported
starting from 102.0.10.1878 (which is already the minimum req
On 10/28/2024 16:31, Daniele Ceraolo Spurio wrote:
All MTL and ARL SKUs share the same GSC FW, but the newer platforms are
only supported in newer blobs. In particular, ARL-S is supported
starting from 102.0.10.1878 (which is already the minimum required
version for ARL in the code), while ARL-H
GuC to host communication is interrupt driven, the handling has 3
parts: interrupt context, tasklet and request queue worker.
During GuC reset prepare, interrupt is disabled before destroy
contexts steps start. The IRQ and worker are flushed to finish
any outstanding in-progress message handling. B
This is already done inside perf_pmu_unregister() - no need to do it
before.
Reviewed-by: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_pmu.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i91
Both the documentation and most of other users call the return of
cpuhp_setup_state_multi() as "state". Follow that.
Reviewed-by: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_pmu.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/driv
Extract refactors from https://patchwork.freedesktop.org/series/136362/
to land them independently. With recent developments in the perf side,
the fixes won't be needed anymore as perf_pmu_unregister() should be
able to do the right thing. See
https://lore.kernel.org/all/20241104133909.669111...@i
Since i915 calls perf_pmu_register/perf_pmu_unregister, let's call the
variable "registered" so we can flip the logic and rely on it being
false by default. Looking at other drivers, it's also more common.
Examples: arch/x86/events/intel/uncore.c and
drivers/powercap/intel_rapl_common.c.
Reviewed-
Setting event_init to NULL is mostly done to detect when the driver is
partially working: i915 probed, but pmu is not registered. However,
checking for event_init is odd as it was supposed to always be set and
kernel/events/ would just crash if it found it set to NULL.
Since there's already a "clo
On Sun, Nov 03, 2024 at 02:49:36PM +, li...@treblig.org wrote:
> From: "Dr. David Alan Gilbert"
>
> execlists_unwind_incomplete_requests() is unused since 2021's
> commit eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC
> interface")
>
> Remove it.
>
> Signed-off-by: Dr. David
On Mon, Nov 04, 2024 at 02:09:46PM +0200, Giedrius Statkevičius wrote:
> Hello,
>
> Kind ping.
There was a pipe underun in CI... I honestly don't believe this patch is
causing it, but anyway I decided to trigger a retest there before I push this.
Thanks for the patch and review.
>
>
> On Thu,
== Series Details ==
Series: drm/i915: Use sg_set_buf(), sg_dma_address() helper
URL : https://patchwork.freedesktop.org/series/140899/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140899v1
Summary
-
On Tue, Oct 22, 2024 at 01:41:10PM +0300, Alexander Usyskin wrote:
> Add auxiliary driver for intel discrete graphics
> non-volatile memory device.
>
> CC: Rodrigo Vivi
> CC: Lucas De Marchi
> Co-developed-by: Tomas Winkler
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
Re
On Mon, Oct 28, 2024 at 10:48:48AM -0400, Rodrigo Vivi wrote:
> On Tue, Oct 22, 2024 at 01:41:18PM +0300, Alexander Usyskin wrote:
> > Enable access to internal non-volatile memory on DGFX
> > with GSC/CSC devices via a child device.
> > The nvm child device is exposed via auxiliary bus.
>
> I loo
On Tue, Oct 29, 2024 at 11:24:36AM +, Usyskin, Alexander wrote:
> > -Original Message-
> > From: Gupta, Anshuman
> > Sent: Monday, October 28, 2024 5:02 PM
> > To: Vivi, Rodrigo ; Usyskin, Alexander
> > ; Deak, Imre
> > Cc: Miquel Raynal ; Richard Weinberger
> > ; Vignesh Raghavendra
== Series Details ==
Series: drm/i915/xe3lpd: Update HDCP rekying bit
URL : https://patchwork.freedesktop.org/series/140892/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140892v1
Summary
---
**SUC
This patch switch to use sg_set_buf() and sg_dma_address() helpers, no
function change.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/i915/i915_gpu_error.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i9
The TRANS_DDI_FUNC_CTL bit used to enable/disable HDCP rekeying
has moved from bit 12 (Xe2) to bit 15 (Xe3); update the RMW
toggle accordingly.
Also drop the misleading workaround comment tag on this function
since disabling of HDCP rekeying is something that happens on
all platforms, not just thos
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display
URL : https://patchwork.freedesktop.org/series/140886/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140886v1
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, November 4, 2024 11:45 PM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 2/2] drm/i915/hdcp: Handle HDCP Line Rekeying for HDCP
> 1.4
>
> On Mon, Nov 04, 202
Just some minor nits on header. Otherwise, LGTM:
Reviewed-by: Alan Previn
On Wed, 2024-10-30 at 15:38 -0700, Zhanjun Dong wrote:
> GuC to host communication is interrupt driven, the handling has 3
> parts: interrupt context, tasklet and request queue worker.
> During GuC reset prepare, interrupt
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, November 4, 2024 11:45 PM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 2/2] drm/i915/hdcp: Handle HDCP Line Rekeying for HDCP
> 1.4
>
> On Mon, Nov 04, 202
On Mon, Nov 04, 2024 at 02:01:43PM +0530, Suraj Kandpal wrote:
> TRANS_DDI_FUNC_CTL asks us to disable hdcp line rekeying when not in
> hdcp 2.2 and we are not using an hdmi transcoder and it need to be
> enabled when we are using an HDMI transcoder to enable HDCP 1.4.
> We use intel_de_rmw cycles
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, November 4, 2024 11:35 PM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
>
> On Mon, Nov 04, 2024 at
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, November 4, 2024 11:25 PM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/2] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
>
> On Mon, Nov 04, 2024 at
== Series Details ==
Series: drm/i915/gt: Remove unused execlists_unwind_incomplete_requests
URL : https://patchwork.freedesktop.org/series/140885/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140885v1
S
On Mon, Nov 04, 2024 at 09:54:39AM -0800, Matt Roper wrote:
> On Mon, Nov 04, 2024 at 02:01:42PM +0530, Suraj Kandpal wrote:
> > We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
> > encoder. Also remove the Wa comment tag as this follows the bspec and
> > does not implement t
On Mon, Nov 04, 2024 at 02:01:42PM +0530, Suraj Kandpal wrote:
> We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
> encoder. Also remove the Wa comment tag as this follows the bspec and
> does not implement the wa.
>
> v2: add additional definition instead of function, commi
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim checkpatch failed
53184469be94 drm/i915/display: identify discrete graphics
ee81f136f724 drm/i
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Convert HAS_ULTRAJOINER() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 4 ++
Identify mobile platforms separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_MOBILE() from display code.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.c | 104 --
.../drm/i915/display/intel
Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +
Convert intel_display_device.[ch] to struct intel_display, including
callers, but excluding intel_display_device_probe() which will be
handled in follow-up.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
.../drm/i915/display/intel_display_device.c | 156
All the feature check helpers now support (and some require) passing
struct intel_display. Rename the parameter to __display to reflect the
fact.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h | 112 +-
1 file changed, 56 insertions(+), 56 deletions(
Convert intel_display_device_probe() to accept struct pci_dev * instead
of struct drm_i915_private *. Return struct intel_display * in
preparation of allocating the memory of it later.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.c | 10 ++
drivers/gpu
Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h| 2 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 18 ++
2
Convert HAS_HW_SAGV_WM() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 5 ++-
.../drm/i915/display/intel_display_device.h | 2 +-
.../drm/i915/display
Add display->platform.dgfx and display->platform->mobile platform groups
to replace IS_DGFX() and IS_MOBILE() respectively. Convert all the HAS_*
display feature check helpers to struct intel_display.
This unblocks a lot of further code conversion to struct intel_display.
BR,
Jani.
Jani Nikula
Convert HAS_SAGV() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.h | 3 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 50 +++
2 files ch
Convert HAS_IPS() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/hsw_ips.c | 4 +++-
drivers/gpu/drm/i915/display/intel_display.c| 3 ++-
drivers/gpu/drm
Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c| 3 ++-
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
d
Convert HAS_4TILE() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_display_device.h| 2 +-
drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 --
2 fi
Convert HAS_GMBUS_BURST_READ() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
drivers/gpu/drm/i915/display/intel_gmbus.c | 3 +--
2 fi
Convert HAS_DP20() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c| 7 +++--
drivers/gpu/drm/i915/display/intel_ddi.c | 26 ++-
.../drm
Identify discrete graphics separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_DGFX() from display code.
Start grouping platform groups separately in INTEL_DISPLAY_PLATFORMS()
in anticipation of more groups to come.
Signed-off-by: Jani
== Series Details ==
Series: drm/i915/gt: Remove unused execlists_unwind_incomplete_requests
URL : https://patchwork.freedesktop.org/series/140885/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hello,
Kind ping.
On Thu, 17 Oct 2024 at 10:57, Giedrius Statkevičius
wrote:
>
> Avoid hardcoding the LSPCON settle timeout because it takes a longer
> time on certain chips made by certain vendors. Use the function that
> already exists to determine the timeout.
>
> Reviewed-by: Ankit Nautiyal
Hi Rodrigo,
I'm sorry for that. Our list is moderated for non-subscribers because
of the amount of spams we receive daily. But I eventually got to your
msg and allowed it to go through.
I am sorry about sending the email twice in that case. In hindsight, I
probably should have subscribed to
From: "Dr. David Alan Gilbert"
execlists_unwind_incomplete_requests() is unused since 2021's
commit eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC
interface")
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/i915/gt/intel_engine.h | 3 ---
driv
== Series Details ==
Series: drm/i915/psr: Implement WA to help reach PC10 (rev4)
URL : https://patchwork.freedesktop.org/series/139513/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_139513v4
Summary
On Wed, 30 Oct 2024, Raag Jadav wrote:
> This series implements Wa_14022698537 for DG2 along with its prerequisites
> in i915. Now that we have a common pciids.h in place, this can be extended
> to xe as well. Detailed description in commit message.
Overall looks good and my earlier comments were
== Series Details ==
Series: series starting with [RESEND,PATCHv2,1/3] drm/i915/dp: use fsleep
instead of usleep_range for LT
URL : https://patchwork.freedesktop.org/series/140856/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140856v1
=
== Series Details ==
Series: drm/i915/hdcp: Fix when the first read and write are retried
URL : https://patchwork.freedesktop.org/series/140854/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15626 -> Patchwork_140854v1
Summ
== Series Details ==
Series: series starting with [RESEND,PATCHv2,1/3] drm/i915/dp: use fsleep
instead of usleep_range for LT
URL : https://patchwork.freedesktop.org/series/140856/
State : warning
== Summary ==
Error: dim checkpatch failed
a56d6fcb9e14 drm/i915/dp: use fsleep instead of uslee
== Series Details ==
Series: drm/i915/pxp: fix non-optimised !CONFIG_DRM_I915_PXP build
URL : https://patchwork.freedesktop.org/series/140844/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15626 -> Patchwork_140844v1
Summar
On Mon, 04 Nov 2024, Suraj Kandpal wrote:
> To reach PC10 when PKG_C_LATENCY is configure we must do the following
> things
> 1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered
> 2) Allow PSR2 deep sleep when DC5 can be entered
> 3) DC5 can be entered when all transocoder have
On Mon, 04 Nov 2024, Jonathan Gray wrote:
> On Mon, Nov 04, 2024 at 12:16:44PM +0200, Jani Nikula wrote:
>> On Sun, 03 Nov 2024, Jonathan Gray wrote:
>> > intel_pxp_gsccs_is_ready_for_sessions() is gated by CONFIG_DRM_I915_PXP
>> > but called from intel_pxp.c which isn't. Provide a fallback inli
Hi Dave & Sima -
The final drm-intel-next pull towards v6.13. The big item is Pantherlake
display enabling. The platform itself is only supported by the xe
driver, but display support comes from i915 display.
We're also making continuous progress on separating i915 display from
i915 core code,
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev2)
URL : https://patchwork.freedesktop.org/series/140766/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15625 -> Patchwork_140766v2
Summ
== Series Details ==
Series: drm/i915: add dedicated lock for each sideband (rev4)
URL : https://patchwork.freedesktop.org/series/139437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15625 -> Patchwork_139437v4
Summary
---
> -Original Message-
> From: Jani Nikula
> Sent: Monday, 4 November 2024 12.33
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Cc: Sousa, Gustavo ; Jadav, Raag
> ; Kahola, Mika
> Subject: Re: [PATCH v4 2/2] drm/i915/display: Use struct intel_display
> instead of
> struct drm_i915_
== Series Details ==
Series: drm/dp: Rework LTTPR transparent mode handling and add support to msm
driver
URL : https://patchwork.freedesktop.org/series/140804/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15624 -> Patchwork_140804v1
=
== Series Details ==
Series: Refactor MST DSC Determination Policy
URL : https://patchwork.freedesktop.org/series/140832/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/140832/revisions/1/mbox/ not
applied
Applying: drm/display/dsc: Refactor DRM M
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev2)
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/in
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev2)
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim checkpatch failed
694f70a2cad4 drm/i915/xe3lpd: Power request asserting/deasserting
-:52: WARNING:LONG_LINE:
== Series Details ==
Series: Use trans push mechanism to generate frame change event (rev2)
URL : https://patchwork.freedesktop.org/series/139830/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15623 -> Patchwork_139830v2
Su
== Series Details ==
Series: drm/i915: add dedicated lock for each sideband (rev4)
URL : https://patchwork.freedesktop.org/series/139437/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Mon, Nov 04, 2024 at 12:16:44PM +0200, Jani Nikula wrote:
> On Sun, 03 Nov 2024, Jonathan Gray wrote:
> > intel_pxp_gsccs_is_ready_for_sessions() is gated by CONFIG_DRM_I915_PXP
> > but called from intel_pxp.c which isn't. Provide a fallback inline
> > function to fix the non-optimised build.
Hi,
https://patchwork.freedesktop.org/series/140732/ - re-reported.
Thanks,
Tejasree
-Original Message-
From: I915-ci-infra On Behalf Of
Imre Deak
Sent: 31 October 2024 03:18
To: i915-ci-in...@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Fi.CI.BAT: failure f
== Series Details ==
Series: hrtimers: Consolidate hrtimer initialization - Part 1 (rev2)
URL : https://patchwork.freedesktop.org/series/140806/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/140806/revisions/2/mbox/ not
applied
Applying: hrtimers
== Series Details ==
Series: drm/dp: Rework LTTPR transparent mode handling and add support to msm
driver
URL : https://patchwork.freedesktop.org/series/140804/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separatel
== Series Details ==
Series: drm/dp_mst: Fix DDI function/DP2 config programming
URL : https://patchwork.freedesktop.org/series/140732/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15614 -> Patchwork_140732v1
Summary
-
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Wednesday, October 30, 2024 9:41 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel...@lists.freedesktop.org; Kandpal, Suraj
> Subject: [PATCH 2/7] drm/i915/display: Prepare for dsc 3 stream splitter
>
> At the moment dsc_split
On Fri, 01 Nov 2024, Mika Kahola wrote:
> Let's start using struct intel_display instead of struct drm_i915_private
> when introducing new code. No functional changes.
>
> Signed-off-by: Mika Kahola
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 17 +++--
> 1 file changed, 11 inse
On Sun, 03 Nov 2024, Jonathan Gray wrote:
> intel_pxp_gsccs_is_ready_for_sessions() is gated by CONFIG_DRM_I915_PXP
> but called from intel_pxp.c which isn't. Provide a fallback inline
> function to fix the non-optimised build.
What does this have to do with optimization? Isn't the build just pl
== Series Details ==
Series: Use trans push mechanism to generate frame change event (rev2)
URL : https://patchwork.freedesktop.org/series/139830/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/
To reach PC10 when PKG_C_LATENCY is configure we must do the following
things
1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered
2) Allow PSR2 deep sleep when DC5 can be entered
3) DC5 can be entered when all transocoder have either PSR1, PSR2 or
eDP 1.5 PR ALPM enabled and VBI
On Fri, 2024-11-01 at 17:12 +0200, Imre Deak wrote:
> On Tue, Oct 29, 2024 at 02:24:15PM +0200, Jouni Högander wrote:
> > We are currently seeing unexpected link trainings with several
> > different
> > eDP panels. These are caused by these panels stating bad link
> > status in
> > their dpcd regis
We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
encoder. Also remove the Wa comment tag as this follows the bspec and
does not implement the wa.
v2: add additional definition instead of function, commit message typo
fix and update.
v3: restore lost conditional from v2.
v4:
TRANS_DDI_FUNC_CTL asks us to disable hdcp line rekeying when not in
hdcp 2.2 and we are not using an hdmi transcoder and it need to be
enabled when we are using an HDMI transcoder to enable HDCP 1.4.
We use intel_de_rmw cycles to update TRANS_DDI_FUNC_CTL register so
we cannot depend on the value
== Series Details ==
Series: Add support for 3 VDSC engines 12 slices (rev7)
URL : https://patchwork.freedesktop.org/series/139934/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15608 -> Patchwork_139934v7
Summary
---
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