Re: [Intel-gfx] Backport of "drm/i915: Fix detection of base of stolen memory"

2013-05-27 Thread Ben Hutchings
On Tue, 2013-05-21 at 22:27 +0200, Daniel Vetter wrote: > Hi Ben, > > The 3.2.x stable backport patch > > commit 53e587aa5ca81497d0ea6e340320ec5778d1f311 > Author: Chris Wilson > Date: Thu Nov 15 11:32:18 2012 + > > drm/i915: Fix detection of base of stolen memory > > errornously add

Re: [Intel-gfx] [PATCH 3/3] drm/i915: add basic pipe config dump support

2013-05-27 Thread Paulo Zanoni
2013/5/21 Daniel Vetter : > All this pipe config abstraction adds another layer of complexity, so > it's good to have better visibility into what's going on exactly. > Doesn't dump out everything yet, and some bits are a bit duplicated > but this should be a good start. > > v2: Remove a few more no

Re: [Intel-gfx] [PATCH 2/3] drm/i915: fixup i915_pipe_enabled check in i915_irq.c

2013-05-27 Thread Paulo Zanoni
2013/5/21 Daniel Vetter : > Well, as well as we can without completely revamping the drm vblank > code. The issue are that > - The vblank code needs to work on both ums and kms. > - It deals always deals with pipes. > - It doesn't take any of the kms locks. > > The last part is not really fixable w

Re: [Intel-gfx] [PATCH 1/3] drm/i915: hw state readout&check support for cpu_transcoder

2013-05-27 Thread Paulo Zanoni
2013/5/21 Daniel Vetter : > This allows us to drop a bunch of ugly hacks and finally implement > what > > commit cc464b2a17c59adedbdc02cc54341d630354edc3 > Author: Paulo Zanoni > Date: Fri Jan 25 16:59:16 2013 -0200 > > drm/i915: set TRANSCODER_EDP even earlier > > tried to achieve, but that

[Intel-gfx] [PATCH 3/5] drm/i915: properly set HSW WM_PIPE registers

2013-05-27 Thread Paulo Zanoni
From: Paulo Zanoni We were previously calling sandybridge_update_wm on HSW, but the SNB function didn't really match the HSW specification, so we were just writing the wrong values. With this patch, the haswell_update_wm function will set the correct values for the WM_PIPE registers, but it will

Re: [Intel-gfx] [PATCH 0/4] drm/i915: remove is_cpu_edp()

2013-05-27 Thread Rodrigo Vivi
Yeap, makes sense let them explicit then... Thanks for explanation and fell free to go ahead ;) On Mon, May 27, 2013 at 2:28 PM, Daniel Vetter wrote: > On Mon, May 27, 2013 at 7:16 PM, Rodrigo Vivi wrote: >> Hi Imre, >> >> I just reviewed all patches in this series and saw no issue. >> So, in th

Re: [Intel-gfx] [PATCH 4/5] drm/i915: detect hang using per ring hangcheck_score

2013-05-27 Thread Mika Kuoppala
Ben Widawsky writes: > On Mon, May 13, 2013 at 04:32:12PM +0300, Mika Kuoppala wrote: >> Keep track of ring seqno progress and if there are no >> progress detected, declare hang. Use actual head (acthd) >> to distinguish between ring stuck and batchbuffer looping >> situation. Stuck ring will be

Re: [Intel-gfx] [PATCH 0/4] drm/i915: remove is_cpu_edp()

2013-05-27 Thread Daniel Vetter
On Mon, May 27, 2013 at 7:16 PM, Rodrigo Vivi wrote: > Hi Imre, > > I just reviewed all patches in this series and saw no issue. > So, in this sense, you and Daniel are free to use "Reviewed-by: > Rodrigo Vivi ". > > However before you move ahead I need to show my concern with the whole idea. > is

Re: [Intel-gfx] [PATCH 0/4] drm/i915: remove is_cpu_edp()

2013-05-27 Thread Rodrigo Vivi
Hi Imre, I just reviewed all patches in this series and saw no issue. So, in this sense, you and Daniel are free to use "Reviewed-by: Rodrigo Vivi ". However before you move ahead I need to show my concern with the whole idea. is_cpu_edp is an easy abstraction and provides an easy way to add new

[Intel-gfx] [i-g-t PATCH] tests/gem_wait_render_timeout: make sure the GPU is idle before exiting

2013-05-27 Thread Imre Deak
Leaving the GPU running after we exit can mess up timing dependent tests we run afterwards. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64270 Signed-off-by: Imre Deak --- tests/gem_wait_render_timeout.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tests/gem_wait_render_ti

[Intel-gfx] [ANNOUNCE] xf86-video-intel 2.21.8

2013-05-27 Thread Chris Wilson
Release 2.21.8 (2013-05-27) === A quick release to cleanup a few regressions from the introduction of copy-on-write support, notably hitting wine applications and a memory leak for firefox. * Only mark a PolyFillRect operation as replacing if it is unclipped https://bug

Re: [Intel-gfx] [PATCH 3/5] drm/i915: properly set HSW WM_PIPE registers

2013-05-27 Thread Ville Syrjälä
On Fri, May 24, 2013 at 07:00:42PM -0300, Paulo Zanoni wrote: > 2013/5/24 Ville Syrjälä : > > On Fri, May 24, 2013 at 11:59:19AM -0300, Paulo Zanoni wrote: > >> From: Paulo Zanoni > >> > >> We were previously calling sandybridge_update_wm on HSW, but the SNB > >> function didn't really match the H

Re: [Intel-gfx] [PATCH] drm/i915: release scratch page at module unload

2013-05-27 Thread Daniel Vetter
On Thu, May 23, 2013 at 04:55:08PM +0300, Mika Kuoppala wrote: > Imre Deak writes: > > > Signed-off-by: Imre Deak > > --- > > drivers/gpu/drm/i915/i915_dma.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_dma.c > > b/drivers/gpu/drm/i915/i915_dma.c >

[Intel-gfx] [PATCH 4/4 V6] i915/drm: Add private api for power well usage

2013-05-27 Thread Wang Xingchao
Haswell Display audio depends on power well in graphic side, it should request power well before use it and release power well after use. I915 will not shutdown power well if it detects audio is using. This patch protects display audio crash for Intel Haswell C3 stepping board. Signed-off-by: Wang

[Intel-gfx] [PATCH 3/4 V6] ALSA: hda - Add power-welll support for haswell HDA

2013-05-27 Thread Wang Xingchao
For Intel Haswell chip, HDA controller and codec have power well dependency from GPU side. This patch added support to request/release power well in audio driver. Power save feature should be enabled to get runtime power saving. There's deadlock when request_module(i915) in azx_probe. It looks lik

[Intel-gfx] [PATCH 2/4] ALSA: hda - Move azx_first_init() into azx_probe_continue()

2013-05-27 Thread Wang Xingchao
From: Takashi Iwai This is a preliminary work for the upcoming Haswell HDMI audio fixes. azx_first_init() function can be safely called after the f/w loader, since the f/w loader doesn't require the sound hardware initialization beforehand. Moving it into azx_probe_continue() cleans up the code

[Intel-gfx] [PATCH 1/4 V6] ALSA: hda - Fix runtime PM check

2013-05-27 Thread Wang Xingchao
The device can support runtime PM no matter whether it support signal wakeup or not. For some chips like Haswell which doesnot support PME by default, this patch let haswell Display HD-A controller enter runtime suspend, and bring more power saving whith power-well feature enabled. Signed-off-by:

[Intel-gfx] [PATCH 0/4 V6] Power-well API implementation for Haswell

2013-05-27 Thread Wang Xingchao
Hi all, This is V6 and here're some changes notes: change from V5-->V6: - Remove duplication code in new introduced probe work - move duplication code in azx_probe_continue - remove unused #ifdef - replace request_module with symbol_request - replace spin_lock_irq with spin_l

Re: [Intel-gfx] [PATCH 34/34] drm/i915: Create VMAs (part 3)

2013-05-27 Thread Daniel Vetter
On Mon, May 27, 2013 at 9:31 AM, Chris Wilson wrote: > On Sat, May 25, 2013 at 12:27:08PM -0700, Ben Widawsky wrote: >> Plumb the functions we care about with VM arguments. >> >> With the exception of the hack in i915_ppgtt_bind to only ever be able >> to do aliasing PPGTT, this most everything we

Re: [Intel-gfx] Haswell: Ensuring HDA codec pins refer to physical outputs

2013-05-27 Thread David Henningsson
On 05/27/2013 09:30 AM, Wang xingchao wrote: On Thu, May 16, 2013 at 09:00:06AM +0200, David Henningsson wrote: Hi, I want to take this problem up again, because it's important we get this right. The HDA driver assumes that a codec pin widget node always refers to the same physical output. Wit

Re: [Intel-gfx] Haswell: Ensuring HDA codec pins refer to physical outputs

2013-05-27 Thread Wang xingchao
On Thu, May 16, 2013 at 09:00:06AM +0200, David Henningsson wrote: > Hi, > > I want to take this problem up again, because it's important we get > this right. > > The HDA driver assumes that a codec pin widget node always refers to > the same physical output. With Haswell, it seems like this is n

Re: [Intel-gfx] [PATCH 34/34] drm/i915: Create VMAs (part 3)

2013-05-27 Thread Chris Wilson
On Sat, May 25, 2013 at 12:27:08PM -0700, Ben Widawsky wrote: > Plumb the functions we care about with VM arguments. > > With the exception of the hack in i915_ppgtt_bind to only ever be able > to do aliasing PPGTT, this most everything we want. Purge is wrong -- it needs to select a victim obj a