Re: [PATCH] gcc: m68k: fix PR target/107645

On Tue, Nov 15, 2022 at 7:33 PM Jeff Law wrote: > Thanks for clarifying. ISTM that operand predicate is quite poorly named. > > OK for the trunk. Thanks. Applied to master. -- Max

[COMMITTED 1/2] gcc: xtensa: add data alignment properties to dynconfig

gcc/ * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New function. include/ * xtensa-dynconfig.h (xtensa_config_v4): New struct. (XCHAL_DATA_WIDTH, XCHAL_UNALIGNED_LOAD_EXCEPTION) (XCHAL_UNALIGNED_STORE_EXCEPTION, XCHAL_UNALIGNED_LOAD_HW)

[COMMITTED 2/2] gcc: xtensa: add -m[no-]strict-align option

gcc/ * config/xtensa/xtensa-opts.h: New header. * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as xtensa_strict_align. * config/xtensa/xtensa.cc (xtensa_option_override): When -m[no-]strict-align is not specified in the command line set xtensa_

Re: [PATCH v4] xtensa: Eliminate the use of callee-saved register that saves and restores only once

On Fri, Jan 20, 2023 at 8:39 PM Takayuki 'January June' Suwa wrote: > On 2023/01/21 0:14, Max Filippov wrote: > > After having this many attempts and getting to the issues that are > > really hard to detect I wonder if the target backend is the right place > > for t

Re: [PATCH] xtensa: Revise 89afb2e86fcb29c559b2957fdcbea0d01740c49b

oops detecting references before overwriting in the > split pattern. > --- > gcc/config/xtensa/xtensa.md | 72 +++-- > 1 file changed, 37 insertions(+), 35 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master with more human readable subject line. -- Thanks. -- Max

Re: [PATCH v5] xtensa: Eliminate the use of callee-saved register that saves and restores only once

compiler error: in final_scan_insn_1, at final.cc:2808 0x6cb090 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) gcc/rtl-error.cc:108 0x639b17 final_scan_insn_1 gcc/final.cc:2808 0xb1817b final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*) gcc/final.cc:2887 0xb18266 final_1 gcc/final.cc:1979 0xb18f94 rest_of_handle_final gcc/final.cc:4240 0xb18f94 execute gcc/final.cc:4318 -- Thanks. -- Max

Re: [PATCH v4] xtensa: Eliminate unnecessary general-purpose reg-reg moves

(reg:SI 8 a8 [85]))) "libgcc/libgcov-interface.c":253:20 4 {subsi3} (expr_list:REG_DEAD (reg:SI 8 a8 [85]) (nil))) during RTL pass: cprop_hardreg libgcc/libgcov-interface.c:263:1: internal compiler error: in extract_constrain_insn, at recog.cc:2692 It also introduces at least one regression in executable tests in call0 build, I haven't tracked it down yet. -- Thanks. -- Max

Re: [PATCH 1/5] xtensa: Simplify EXTUI instruction maskimm validations

cc/' in paths, so I've dropped this part. Committed to master. -- Thanks. -- Max

Re: [PATCH 2/5] xtensa: Make use of IN_RANGE macro where appropriate

onfig/xtensa/xtensa.h | 2 +- > 4 files changed, 15 insertions(+), 16 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Changelog has extra 'gcc/' in paths, so I've dropped this part. Committed to master. -- Thanks. -- Max

Re: [PATCH 3/5] xtensa: Fix instruction counting regarding block move expansion

Regtested for target=xtensa-linux-uclibc, no new regressions. Changelog has extra 'gcc/' in paths, so I've dropped this part. Committed to master. -- Thanks. -- Max

Re: [PATCH v3 4/5] xtensa: Add setmemsi insn pattern

a9, sp movi a8, 0x12 is that something that can be addressed in this patch? -- Thanks. -- Max

Re: [PATCH 5/5] xtensa: Improve bswap[sd]i2 insn patterns

swap.c, but since it introduces three other tests that cover the same area I've dropped that test. I've regtested it for target=xtensa-linux-uclibc, there's no new regressions, but I have a question: what guarantees that no instruction that changes the SAR register can be moved between two adjacent bswapsi2_internal instructions? -- Thanks. -- Max

Re: [PATCH v3 4/5] xtensa: Add setmemsi insn pattern

On Thu, May 26, 2022 at 8:00 PM Takayuki 'January June' Suwa wrote: > > On 2022/05/27 1:57, Max Filippov wrote: > > is that something that can be addressed in this patch? > > seems hard to resolve, because the RTL-generation pass passes only 68 > bytes in that cas

Re: [PATCH v3 4/5] xtensa: Add setmemsi insn pattern

+ > gcc/config/xtensa/xtensa.md | 16 +++ > gcc/config/xtensa/xtensa.opt | 2 +- > 4 files changed, 230 insertions(+), 1 deletion(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Changelog has extra 'gcc/' in paths, so I've dropped this part. Committed to master. -- Thanks. -- Max

[COMMITTED] xtensa: Improve bswap[sd]i2 insn patterns

From: Takayuki 'January June' Suwa This patch makes bswap[sd]i2 better register allocation, and reconstructs bswapsi2 in order to take advantage of GIMPLE manual byte-swapping recognition. gcc/ChangeLog: * config/xtensa/xtensa.md (bswapsi2): New expansion pattern. (bswapsi2_inte

[COMMITTED] gcc: xtensa: fix PR target/105879

split_double operates with the 'word that comes first in memory in the target' terminology, while gen_lowpart operates with the 'value representing some low-order bits of X' terminology. They are not equivalent and must be dealt with differently on little- and big-endian targets. gcc/ PR t

Re: [PATCH 1/4] xtensa: Implement bswaphi2 insn pattern

-- > gcc/config/xtensa/xtensa.md | 10 ++ > 1 file changed, 10 insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 2/4] xtensa: Make one_cmplsi2 optimizer-friendly

| 9 +++ > 2 files changed, 27 insertions(+), 8 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/xtensa/one_cmpl_abs.c Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 3/4] xtensa: Optimize '(~x & y)' to '((x & y) ^ y)'

ged, 29 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/xtensa/check_zero_byte.c Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 4/4] xtensa: Add clrsbsi2 insn pattern

ons(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 2/4] xtensa: Consider the Loop Option when setmemsi is expanded to small loop

egs gcc/gcc/function.cc:1985 0xb27647 execute gcc/gcc/function.cc:2034 -- Thanks. -- Max

Re: [PATCH v2 4/4] xtensa: Improve constant synthesis for both integer and floating-point

e/20120727-1.c: In function 'f': gcc/gcc/testsuite/gcc.c-torture/compile/20120727-1.c:13:1: internal compiler error: in gen_split_5, at config/xtensa/xtensa.md:1186 0x7b6fdb gen_split_5(rtx_insn*, rtx_def**) gcc/gcc/config/xtensa/xtensa.md:1186 0xa8f927 try_split(rtx_def*, rtx_insn*, int) gcc/gcc/emit-rtl.cc:3795 0xde5fe9 split_insn gcc/gcc/recog.cc:3384 0xdecde7 split_all_insns() gcc/gcc/recog.cc:3488 0xdecea8 execute gcc/gcc/recog.cc:4406 -- Thanks. -- Max

Re: [PATCH v2 4/4] xtensa: Improve constant synthesis for both integer and floating-point

gcc/ -mtext-section-literals -mlongcalls -fdiagnostics- plain-output -O1 -w -c -o 20120727-1.o /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/20120727-1.c -- Thanks. -- Max

Re: [PATCH v2 4/4] xtensa: Improve constant synthesis for both integer and floating-point

(x) == DFmode) > REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), l); > else > -gcc_unreachable (); > +{ > + print_rtl_single (stderr, x); > + gcc_unreachable (); > +} > x = gen_rtx_REG (SImode, REGNO (operands[0])); > if (! xtensa_constantsynth (x, l[i])) > emit_move_insn (x, GEN_INT (l[i])); > It prints (symbol_ref/f:SI ("*.LC1") [flags 0x2] ) -- Thanks. -- Max

Re: [PATCH 1/4] xtensa: Tweak some widen multiplications

sa.md | 56 + > 1 file changed, 32 insertions(+), 24 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 3/4] xtensa: Improve instruction cost estimation and suggestion

achine- > dependent option, however, preparatory work for now. > --- > gcc/config/xtensa/xtensa.cc | 116 --- > gcc/config/xtensa/xtensa.md | 29 ++--- > gcc/config/xtensa/xtensa.opt | 4 ++ > 3 files changed, 134 insertions(+), 15 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

[COMMITTED] xtensa: Consider the Loop Option when setmemsi is expanded to small loop

From: Takayuki 'January June' Suwa Now apply to almost any size of aligned block under such circumstances. gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_expand_block_set_small_loop): Pass through the block length / loop count conditions if zero-overhead looping is con

[COMMITTED] xtensa: Improve constant synthesis for both integer and floating-point

From: Takayuki 'January June' Suwa This patch revises the previous implementation of constant synthesis. First, changed to use define_split machine description pattern and to run after reload pass, in order not to interfere some optimizations such as the loop invariant motion. Second, not only

[COMMITTED] gcc: xtensa: fix pr95571 test for call0 ABI

gcc/testsuite/ * g++.target/xtensa/pr95571.C (__xtensa_libgcc_window_spill): New definition. --- gcc/testsuite/g++.target/xtensa/pr95571.C | 6 ++ 1 file changed, 6 insertions(+) diff --git a/gcc/testsuite/g++.target/xtensa/pr95571.C b/gcc/testsuite/g++.target/xtensa/pr95571.

Re: [PATCH 2/4] xtensa: Simplify conditional branch/move insn patterns

+------ > 3 files changed, 70 insertions(+), 161 deletions(-) This patch is whitespace-damaged. Please resend. -- Thanks. -- Max

Re: [PATCH 4/4] xtensa: Optimize bitwise AND operation with some specific forms of constants

extui a8, a8, 0, 4 beqia8, 4, .L4 l32ra8, .LC3 callx8 a8 .L4: movi.n a10, 0 l32ra8, .LC4 callx8 a8 .size main, .-main .global x .data .align 4 .type x, @object .size x, 4 x: .byte 32 .byte 52 .zero 2 .ident "GCC: (GNU) 13.0.0 20220612 (experimental)" -- Thanks. -- Max

Re: [PATCH v2 1/4] xtensa: Improve shift operations more

de 100644 gcc/testsuite/gcc.target/xtensa/funnel_shifter.c Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 2/4] xtensa: Simplify conditional branch/move insn patterns

-- > 3 files changed, 70 insertions(+), 161 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 3/4] xtensa: Make use of BALL/BNALL instructions

changed, 54 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/xtensa/BALL-BNALL.c Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH v2 4/4] xtensa: Optimize bitwise AND operation with some specific forms of constants

On Mon, Jun 13, 2022 at 9:39 AM Takayuki 'January June' Suwa wrote: > > On 2022/06/13 12:49, Max Filippov wrote: > > Hi Suwa-san, > hi! > > > This change produces a bunch of regression test failures in big-endian > > configuration: > bad news X( > t

Re: [PATCH 2/5] xtensa: Add support for sibling call optimization

, exit@PLT .align 4 .global main .type main, @function main: addisp, sp, -16 l32ra2, .LC5 s32i.n a0, sp, 12 callx0 a2 l32ra3, .LC6 movi.n a2, 0 callx0 a3 .size main, .-main .ident "GCC: (GNU) 13.0.0 20220614 (experimental)" -- Thanks. -- Max

Re: [PATCH v2 2/5] xtensa: Add support for sibling call optimization

On Wed, Jun 15, 2022 at 5:23 AM Takayuki 'January June' Suwa wrote: > > On 2022/06/15 5:17, Max Filippov wrote: > > Hi Suwa-san, > hi! > > > This change results in a bunch of new regression test failures: > > The code generated for e.g. gcc.c-torture/execu

Re: [PATCH 3/5] xtensa: Add some dedicated patterns that correspond to GIMPLE canonicalizations

nsa/xtensa.md | 45 +++++ > 1 file changed, 45 insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 4/5] xtensa: Eliminate unwanted reg-reg moves during DFmode input reloads

g/xtensa/xtensa.md: New peephole2 pattern. > --- > gcc/config/xtensa/predicates.md | 13 + > gcc/config/xtensa/xtensa.md | 31 +++ > 2 files changed, 44 insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 5/5] xtensa: Eliminate [DS]Cmode hard register clobber that is immediately followed by whole overwrite the register

n and mode iterator. > --- > gcc/config/xtensa/xtensa.md | 28 ++++ > 1 file changed, 28 insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 1/5] xtensa: Document new -mextra-l32r-costs= Xtensa-specific option

On Mon, Jun 13, 2022 at 8:54 PM Takayuki 'January June' Suwa wrote: > > > gcc/ChangeLog: > * doc/invoke.texi: Document -mextra-l32r-costs= option. > --- > gcc/doc/invoke.texi | 11 ++- > 1 file changed, 10 insertions(+), 1 deletion(-) Committed to master. -- Thanks. -- Max

Re: [PATCH] xtensa: Defer storing integer constants into litpool until reload

ensa.cc | 3 ++- > 3 files changed, 9 insertions(+), 5 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Folded in the description correction and committed to master. -- Thanks. -- Max

Re: [PATCH 1/2] xtensa: Apply a few minor fixes

> gcc/config/xtensa/xtensa.md | 8 > 2 files changed, 12 insertions(+), 12 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH 2/2] xtensa: Fix RTL insn cost estimation about relaxed MOVI instructions

sider relaxed MOVI instructions as L32R. > --- > gcc/config/xtensa/xtensa.cc | 22 ++ > 1 file changed, 14 insertions(+), 8 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

Re: [PATCH] xtensa: Fix buffer overflow

): > Enlarge the buffer that is obviously smaller than the template > string given to sprintf(). > --- > gcc/config/xtensa/xtensa.md | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Committed to master. -- Thanks. -- Max

Re: [PATCH] xtensa: Optimize integer constant addition that is between -32896 and 32639

insertions(+) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max

[PATCH v2 0/2] gcc: xtensa: allow dynamic configuration

s, it was first submitted in 2017 [2]. This version has improved configuration versioning and GPL-compatibility check that was suggested in comments for the v1. [1] https://github.com/jcmvbkbc/xtensa-dynconfig [2] https://gcc.gnu.org/pipermail/gcc-patches/2017-May/475109.html Max Filippov (2):

[PATCH v2 2/2] libgcc: xtensa: use built-in configuration

Now that gcc provides __XCHAL_* definitions use them instead of XCHAL_* definitions from the include/xtensa-config.h. That makes libgcc dynamically configurable for the target xtensa core. libgcc/ * config/xtensa/crti.S (xtensa-config.h): Replace #inlcude with xtensa-config-builtin

[PATCH v2 1/2] gcc: xtensa: allow dynamic configuration

Import include/xtensa-dynconfig.h that defines XCHAL_* macros as fields of a structure returned from the xtensa_get_config_v function call. Define that structure and fill it with default parameter values specified in the include/xtensa-config.h. Define reusable function xtensa_load_config that trie

Re: [PATCH v2 0/2] gcc: xtensa: allow dynamic configuration

On Mon, Nov 28, 2022 at 4:46 PM Max Filippov wrote: > > Hello, > > this series addresses the long standing issue with xtensa configuration > support by adding a way to configure toolchain for a specific xtensa > core at runtime using the xtensa-dynconfig [1] library as a plugi

[COMMITTED] libgcc: xtensa: remove stray symbols from X*HAL macro definitions

libgcc/ * config/xtensa/xtensa-config-builtin.h (XCHAL_NUM_AREGS) (XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE, XCHAL_ICACHE_LINESIZE) (XCHAL_DCACHE_LINESIZE, XCHAL_MMU_MIN_PTE_PAGE_SIZE) (XSHAL_ABI): Remove stray symbols from macro definitions. --- libgcc/config/xtensa/xt

Java front-end and library patches v2

Disclaimer: this does not currently work. The front-end and library compile successfully, but fail to link at the very end. This is due to a regression caused by 1dedc12d186a110854537e1279b4e6c29f2df35a, which I have been unable to solve. Nevertheless, I am posting this patch series for two reaso

Re: Java front-end and library patches v2

The astute among you may have noticed that I in fact sent no patches. This is for two reasons-- 1. Google did something behind the scenes and broke git send-email for me again 2. Thanks to Iain Sandoe, the build now completes, and he provided a couple other fixes as well. There are still a coupl

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