Re: [PATCH GCC][7/7]Merge adjacent memset builtin partitions

2017-10-16 Thread Bin.Cheng
On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng wrote: > On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener > wrote: >> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng wrote: >>> Hi, >>> This patch merges adjacent memset builtin partitions if possible. It is >>

Re: [PATCH GCC][7/7]Merge adjacent memset builtin partitions

2017-10-16 Thread Bin.Cheng
On Mon, Oct 16, 2017 at 5:00 PM, Bin.Cheng wrote: > On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng wrote: >> On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener >> wrote: >>> On Thu, Oct 5, 2017 at 3:17 PM, Bin Cheng wrote: >>>> Hi, >>>> This patch merge

Re: [PATCH GCC][7/7]Merge adjacent memset builtin partitions

2017-10-17 Thread Bin.Cheng
On Mon, Oct 16, 2017 at 5:27 PM, Bin.Cheng wrote: > On Mon, Oct 16, 2017 at 5:00 PM, Bin.Cheng wrote: >> On Mon, Oct 16, 2017 at 2:56 PM, Bin.Cheng wrote: >>> On Thu, Oct 12, 2017 at 2:43 PM, Richard Biener >>> wrote: >>>> On Thu, Oct 5, 2017 at 3:17 PM,

Re: [PATCH GCC][4/7]Choose exit edge/path when removing inner loop's exit statement

2017-10-19 Thread Bin.Cheng
On Thu, Oct 19, 2017 at 9:31 AM, Tom de Vries wrote: > On 10/09/2017 03:34 PM, Richard Biener wrote: >> >> On Thu, Oct 5, 2017 at 3:16 PM, Bin Cheng wrote: >>> >>> Hi, >>> Function generate_loops_for_partition chooses arbitrary path when >>> removing exit >>> condition not in partition. This is

Re: [PATCH GCC][1/3]Simplify (A + CST cmp A -> CST cmp zero) for undefined overflow type

2017-10-19 Thread Bin.Cheng
On Thu, Oct 19, 2017 at 4:22 PM, Marc Glisse wrote: > On Thu, 19 Oct 2017, Bin Cheng wrote: > >> * match.pd (A + CST cmp A -> CST cmp zero): New simplification >> for undefined overflow types in (A + CST CMP A -> A CMP' CST'). > > > Could you check if you still need that? I rec

Re: [PATCH GCC][2/3]Simplify ((A +- CST1 CMP A +- CST2)) for undefined overflow type

2017-10-19 Thread Bin.Cheng
On Thu, Oct 19, 2017 at 4:33 PM, Marc Glisse wrote: > On Thu, 19 Oct 2017, Bin Cheng wrote: > >> * match.pd (A +- CST1 CMP A +- CST2): New pattern. > > > Similarly, this has a very large overlap with "X + Z < Y + Z" transforms > already in match.pd. It may handle X - CST CMP X + CST that t

Re: Improve ivopts handling of forced scales

2017-11-06 Thread Bin.Cheng
On Fri, Nov 3, 2017 at 4:28 PM, Richard Sandiford wrote: > This patch improves the ivopts address cost calculcation for modes > in which an index must be scaled rather than unscaled. Previously > we would only try the scaled form if the unscaled form was valid. > > Many of the SVE tests rely on t

Re: [PATCH PR82776]Exploit more undefined pointer overflow behavior in loop niter analysis

2017-11-07 Thread Bin.Cheng
On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener wrote: > On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote: >> Hi, >> This is a simple patch exploiting more undefined pointer overflow behavior in >> loop niter analysis. Originally, it only supports POINTER_PLUS_EXPR if the >> offset part is IV. T

Re: [PATCH PR82776]Exploit more undefined pointer overflow behavior in loop niter analysis

2017-11-07 Thread Bin.Cheng
On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener wrote: > On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng wrote: >> On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener >> wrote: >>> On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote: >>>> Hi, >>>> This is

Re: [PATCH GCC][3/4]Generalize dead store elimination (or store motion) across loop iterations in predcom

2017-07-10 Thread Bin.Cheng
On Tue, Jul 4, 2017 at 1:29 PM, Richard Biener wrote: > On Tue, Jul 4, 2017 at 2:06 PM, Bin.Cheng wrote: >> On Tue, Jul 4, 2017 at 12:19 PM, Richard Biener >> wrote: >>> On Mon, Jul 3, 2017 at 4:17 PM, Bin.Cheng wrote: >>>> On Mon, Jul 3, 2017 at 10:38 AM,

Re: [PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

2017-07-10 Thread Bin.Cheng
On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote: > Hi, > This is a followup patch better handling below case: > for (i = 0; i < n; i++) >{ > a[i] = 1; > a[i+2] = 2; >} > Instead of generating root variables by loading from memory and propagating > with PHI

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

2017-07-10 Thread Bin.Cheng
On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon wrote: > Hi Bin, > > On 30 June 2017 at 12:43, Bin.Cheng wrote: >> On Wed, Jun 28, 2017 at 2:09 PM, Bin.Cheng wrote: >>> On Wed, Jun 28, 2017 at 1:29 PM, Richard Biener >>> wrote: >>>> On Wed, Jun 28

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

2017-07-17 Thread Bin.Cheng
On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon wrote: > Hi Bin, > > On 30 June 2017 at 12:43, Bin.Cheng wrote: >> On Wed, Jun 28, 2017 at 2:09 PM, Bin.Cheng wrote: >>> On Wed, Jun 28, 2017 at 1:29 PM, Richard Biener >>> wrote: >>>> On Wed, Jun 28

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

2017-07-18 Thread Bin.Cheng
On Mon, Jul 17, 2017 at 1:09 PM, Christophe Lyon wrote: > On 17 July 2017 at 12:06, Bin.Cheng wrote: >> On Mon, Jul 10, 2017 at 10:32 AM, Christophe Lyon >> wrote: >>> Hi Bin, >>> >>> On 30 June 2017 at 12:43, Bin.Cheng wrote: >>>> On We

Re: [PATCH PR81408]Turn TREE level unsafe loop optimizations warning to missed optimization message

2017-07-18 Thread Bin.Cheng
On Tue, Jul 18, 2017 at 9:31 AM, Richard Biener wrote: > On Tue, Jul 18, 2017 at 10:00 AM, Bin Cheng wrote: >> Hi, >> I removed unsafe loop optimization on TREE level last year, so GCC doesn't >> do unsafe >> loop optimizations on TREE now. All "unsafe loop optimizations" warnings >> reported

Re: [PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

2017-07-20 Thread Bin.Cheng
On Fri, Jul 14, 2017 at 12:12 PM, James Greenhalgh wrote: > On Wed, Jul 12, 2017 at 03:15:04PM +, Bin Cheng wrote: >> Hi, >> After change @236817, AArch64 backend could avoid unnecessary conversion >> instructions for register between different modes now. As a result, GCC >> could initialize

Re: [PATCH][1/n] Fix PR81303

2017-07-21 Thread Bin.Cheng
On Fri, Jul 21, 2017 at 8:12 AM, Richard Biener wrote: > > The following is sth I noticed when looking at a way to fix PR81303. > We happily compute a runtime cost model threshold that executes the > vectorized variant even though no vector iteration takes place due > to the number of prologue/epi

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

2017-07-24 Thread Bin.Cheng
On Fri, Jun 16, 2017 at 5:48 PM, Marc Glisse wrote: > On Fri, 16 Jun 2017, Bin.Cheng wrote: > >> On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener >> wrote: >>> >>> >>> That means we miss a pattern in match.PD to handle this case. >> >> I se

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

2017-07-24 Thread Bin.Cheng
On Mon, Jul 24, 2017 at 1:16 PM, Marc Glisse wrote: > On Mon, 24 Jul 2017, Bin.Cheng wrote: > >>> For _123, we have >>> >>> /* (A +- CST1) +- CST2 -> A + CST3 >>> or >>> /* Associate (p +p off1) +p off2 as (p +p (off1 + off2)). */ >>

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

2017-07-24 Thread Bin.Cheng
On Mon, Jul 24, 2017 at 2:59 PM, Marc Glisse wrote: > On Mon, 24 Jul 2017, Bin.Cheng wrote: > >> But since definition of _197 isn't in current stmt sequence, call "o31 >> = do_valueize (valueize, o31)" will return NULL. As a result, it's >> not

Re: [PATCH GCC][3/4]Generalize dead store elimination (or store motion) across loop iterations in predcom

2017-07-24 Thread Bin.Cheng
Ping^1. Thanks, bin On Mon, Jul 10, 2017 at 9:23 AM, Bin.Cheng wrote: > On Tue, Jul 4, 2017 at 1:29 PM, Richard Biener > wrote: >> On Tue, Jul 4, 2017 at 2:06 PM, Bin.Cheng wrote: >>> On Tue, Jul 4, 2017 at 12:19 PM, Richard Biener >>> wrote: >>>>

Re: [PATCH GCC][1/2]Feed bound computation to folder in loop split

2017-07-24 Thread Bin.Cheng
On Mon, Jul 24, 2017 at 3:31 PM, Marc Glisse wrote: > On Mon, 24 Jul 2017, Bin.Cheng wrote: > >> On Mon, Jul 24, 2017 at 2:59 PM, Marc Glisse wrote: >>> >>> On Mon, 24 Jul 2017, Bin.Cheng wrote: >>> >>>> But since definition of _197 isn'

Re: [PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

2017-07-25 Thread Bin.Cheng
On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener wrote: > On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote: >> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote: >>> Hi, >>> This is a followup patch better handling below case: >>> for (i = 0; i < n;

Re: [PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

2017-07-25 Thread Bin.Cheng
On Tue, Jul 25, 2017 at 1:57 PM, Richard Biener wrote: > On Tue, Jul 25, 2017 at 2:38 PM, Bin.Cheng wrote: >> On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener >> wrote: >>> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote: >>>> On Tue, Jun 27, 2017 at

Re: [PATCH] PR libstdc++/53984 handle exceptions in basic_istream::sentry

2017-07-27 Thread Bin.Cheng
On Wed, Jul 26, 2017 at 11:06 PM, Jonathan Wakely wrote: > On 26/07/17 20:14 +0200, Paolo Carlini wrote: >> >> Hi again, >> >> On 26/07/2017 16:27, Paolo Carlini wrote: >>> >>> Hi, >>> >>> On 26/07/2017 16:21, Andreas Schwab wrote: ERROR: 27_io/basic_fstream/53984.cc: unknown dg option:

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

2017-07-28 Thread Bin.Cheng
On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford wrote: > Bin Cheng writes: >> Hi, >> This simple patch fixes the ICE by adding LTGT in >> vec_cmp pattern. >> I also modified the original test case into a compilation one since >> -fno-wrapping-math >> should not be used in general. >> Bootstra

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

2017-07-28 Thread Bin.Cheng
On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford >> wrote: >>> Bin Cheng writes: >>>> Hi, >>>> This simple patch fixes the ICE by adding LTGT in &g

Re: [PATCH GCC][4/6]Simple patch skips single element component

2017-07-28 Thread Bin.Cheng
On Fri, Jun 23, 2017 at 5:56 PM, Jeff Law wrote: > On 05/12/2017 05:28 AM, Bin Cheng wrote: >> Hi, >> This is a simple patch discarding simple element components earlier in >> predcom. >> Bootstrap and test on x86_64 and AArch64, is it OK? >> >> Thanks, >> bin >> 2017-05-10 Bin Cheng >> >>

Re: [PATCH GCC][5/6]Record initialization statements and only insert it for valid chains

2017-07-28 Thread Bin.Cheng
On Mon, Jun 26, 2017 at 10:57 AM, Richard Biener wrote: > On Mon, Jun 26, 2017 at 11:47 AM, Bin.Cheng wrote: >> On Fri, May 12, 2017 at 12:28 PM, Bin Cheng wrote: >>> Hi, >>> This patch caches initialization statements and only inserts it for valid >>> chai

Re: [PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

2017-07-28 Thread Bin.Cheng
On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener wrote: > On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote: >> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote: >>> Hi, >>> This is a followup patch better handling below case: >>> for (i = 0; i < n;

Re: [PATCH GCC]Make pointer overflow always undefined and remove the macro

2017-08-01 Thread Bin.Cheng
On Tue, Jul 25, 2017 at 8:26 AM, Richard Biener wrote: > On Mon, Jul 24, 2017 at 10:43 AM, Bin Cheng wrote: >> Hi, >> This is a followup patch to PR81388's fix. According to Richi, >> POINTER_TYPE_OVERFLOW_UNDEFINED was added in -fstrict-overflow >> warning work. Given: >> A) strict-overflow

Re: [PATCH][GCC][AArch64] optimize float immediate moves (3 /4) - testsuite.

2017-08-01 Thread Bin.Cheng
On Mon, Jun 26, 2017 at 11:49 AM, Tamar Christina wrote: > Hi, > > With the changes in the patches the testsuite had a minor update in the > assembler scan. > I've posted the patch but will assume it's OK based on the previous OK for > trunk and > the fact that this can fall in the obvious rule.

Re: [PATCH][GCC][AArch64] optimize float immediate moves (1 /4) - infrastructure.

2017-08-01 Thread Bin.Cheng
On Wed, Jun 7, 2017 at 12:38 PM, Tamar Christina wrote: > Hi All, > > > This patch lays the ground work to fix the immediate moves for floats > to use a combination of mov, movi, fmov instead of ldr and adrp to load > float constants that fit within the 16-bit limit of movz. > > The idea behind it

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

2017-08-01 Thread Bin.Cheng
On Mon, Jun 26, 2017 at 11:50 AM, Tamar Christina wrote: > Hi all, > > Here's the re-spun patch. > Aside from the grouping of the split patterns it now also uses h register for > the fmov for HF when available, > otherwise it forces a literal load. > > Regression tested on aarch64-none-linux-gnu

Re: [PATCH][GCC][AArch64] optimize float immediate moves (2 /4) - HF/DF/SF mode.

2017-08-01 Thread Bin.Cheng
On Tue, Aug 1, 2017 at 12:51 PM, Tamar Christina wrote: >> >> Given review comment already pointed out big-endian issue and patch was >> updated to address it, I would expect reg-test on a big-endian target before >> applying patch, right? > > The patch spent 6 months in external review. > Given t

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

2017-08-01 Thread Bin.Cheng
On Fri, Jul 28, 2017 at 3:15 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Fri, Jul 28, 2017 at 12:55 PM, Richard Sandiford >> wrote: >>> Bin Cheng writes: >>>> Hi, >>>> This simple patch fixes the ICE by adding LTGT in &g

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

2017-08-02 Thread Bin.Cheng
On Wed, Aug 2, 2017 at 8:26 AM, Martin Liška wrote: > On 08/02/2017 09:16 AM, Jakub Jelinek wrote: >> On Wed, Aug 02, 2017 at 09:13:40AM +0200, Martin Liška wrote: >>> On 08/01/2017 09:50 PM, Jakub Jelinek wrote: On Thu, Jul 20, 2017 at 08:59:29AM +0200, Martin Liška wrote: > Hello. >

Re: [PATCH] Make mempcpy more optimal (PR middle-end/70140).

2017-08-02 Thread Bin.Cheng
On Wed, Aug 2, 2017 at 10:54 AM, Martin Liška wrote: > On 08/02/2017 11:45 AM, Bin.Cheng wrote: >> Hi Martin, >> With r250771, GCC failed to build glibc for arm/aarch64 linux cross >> toolchain: > > Hi. > > Sorry for the breakage, I accidentally installed wr

Re: [PATCH GCC][5/5]Enable tree loop distribution at -O3 and above optimization levels.

2017-08-07 Thread Bin.Cheng
On Fri, Jun 23, 2017 at 12:04 PM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 10:47 AM, Bin.Cheng wrote: >> On Fri, Jun 23, 2017 at 6:04 AM, Jeff Law wrote: >>> On 06/07/2017 02:07 AM, Bin.Cheng wrote: >>>> On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote: >

Re: [PATCH] Fix PR81719

2017-08-08 Thread Bin.Cheng
On Tue, Aug 8, 2017 at 1:20 PM, Richard Biener wrote: > > The following improves niter analysis for range-based for loops > by handling ADDR_EXPR in expand_simple_operations. > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > Richard. > > 2017-08-08 Richard Biener > >

Re: [PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

2017-08-14 Thread Bin.Cheng
Ping. On Fri, Jul 28, 2017 at 12:37 PM, Bin Cheng wrote: > Hi, > This simple patch fixes the ICE by adding LTGT in vec_cmp > pattern. > I also modified the original test case into a compilation one since > -fno-wrapping-math > should not be used in general. > Bootstrap and test on AArch64, test

Re: [PATCH PR81799]Fix ICE by forcing to is_gimple_val

2017-08-14 Thread Bin.Cheng
On Mon, Aug 14, 2017 at 12:21 PM, Richard Biener wrote: > On Mon, Aug 14, 2017 at 1:05 PM, Bin Cheng wrote: >> Hi, >> This patch fixes ICE reported in PR81799. It simply uses is_gimple_val >> rather than is_gimple_condexpr. >> Bootstap and test on x86_64. Is it OK? > > I guess this eventually

Re: [PATCH PR81832]Skip copying loop header if inner loop is distributed

2017-08-16 Thread Bin.Cheng
On Tue, Aug 15, 2017 at 6:33 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Tue, Aug 15, 2017 at 11:28 AM, Bin Cheng wrote: >>> Hi, >>> This patch fixes PR81832. Root cause for the ICE is: >>> 1) Loop has distributed inner loop. >>> 2) The guarding function call IFN_LOOP_DIST_C

Re: [PATCH PR81832]Skip copying loop header if inner loop is distributed

2017-08-16 Thread Bin.Cheng
On Wed, Aug 16, 2017 at 10:31 AM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Tue, Aug 15, 2017 at 6:33 PM, Richard Sandiford >> wrote: >>> Richard Biener writes: >>>> On Tue, Aug 15, 2017 at 11:28 AM, Bin Cheng wrote: >>>>>

Re: PR81635: Use chrecs to help find related data refs

2017-08-16 Thread Bin.Cheng
On Wed, Aug 16, 2017 at 2:38 PM, Richard Sandiford wrote: > The first loop in the testcase regressed after my recent changes to > dr_analyze_innermost. Previously we would treat "i" as an iv even > for bb analysis and end up with: > >DR_BASE_ADDRESS: p or q >DR_OFFSET: 0 >DR_INIT: 0 o

Re: PR81635: Use chrecs to help find related data refs

2017-08-16 Thread Bin.Cheng
On Wed, Aug 16, 2017 at 5:00 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, Aug 16, 2017 at 2:38 PM, Richard Sandiford >> wrote: >>> The first loop in the testcase regressed after my recent changes to >>> dr_analyze_innermost. Previous

Re: PR81635: Use chrecs to help find related data refs

2017-08-17 Thread Bin.Cheng
On Wed, Aug 16, 2017 at 6:50 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, Aug 16, 2017 at 5:00 PM, Richard Sandiford >> wrote: >>> "Bin.Cheng" writes: >>>> On Wed, Aug 16, 2017 at 2:38 PM, Richard Sandiford >>>

Re: PR81635: Use chrecs to help find related data refs

2017-08-17 Thread Bin.Cheng
On Thu, Aug 17, 2017 at 12:35 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, Aug 16, 2017 at 6:50 PM, Richard Sandiford >> wrote: >>> "Bin.Cheng" writes: >>>> On Wed, Aug 16, 2017 at 5:00 PM, Richard Sandiford >>>

Re: [PATCH GCC]A simple implementation of loop interchange

2017-08-30 Thread Bin.Cheng
On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener wrote: > On Wed, Aug 30, 2017 at 3:18 PM, Bin Cheng wrote: >> Hi, >> This patch implements a simple loop interchange pass in GCC, as described by >> its comments: >> +/* This pass performs loop interchange: for example, the loop nest >> + >> + fo

Re: [PATCH GCC]A simple implementation of loop interchange

2017-09-04 Thread Bin.Cheng
On Mon, Sep 4, 2017 at 2:54 PM, Richard Biener wrote: > On Wed, Aug 30, 2017 at 6:32 PM, Bin.Cheng wrote: >> On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener >> wrote: >>> On Wed, Aug 30, 2017 at 3:18 PM, Bin Cheng wrote: >>>> Hi, >>>> This patch

Re: [PATCH GCC8][01/33]Handle TRUNCATE between tieable modes in rtx_cost

2017-05-10 Thread Bin.Cheng
On Wed, May 3, 2017 at 11:09 AM, Kyrill Tkachov wrote: > Hi Bin, > > > On 03/05/17 11:02, Bin.Cheng wrote: >> >> On Wed, May 3, 2017 at 9:38 AM, Bin.Cheng wrote: >>> >>> On Wed, May 3, 2017 at 7:17 AM, Eric Botcazou >>> wrote: >>>>

Re: [PATCH GCC8][29/33]New register pressure estimation

2017-05-11 Thread Bin.Cheng
On Thu, May 11, 2017 at 11:39 AM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:53 PM, Bin Cheng wrote: >> Hi, >> Currently IVOPTs shares the same register pressure computation with RTL loop >> invariant pass, >> which doesn't work very well. This patch introduces specific interface for >

Re: [PATCH] Tree-level fix for PR 69526

2017-05-11 Thread Bin.Cheng
On Tue, Jan 17, 2017 at 9:48 AM, Richard Biener wrote: > On Tue, Jan 10, 2017 at 2:32 PM, Robin Dapp wrote: >> Perhaps I'm still missing how some cases are handled or not handled, >> sorry for the noise. >> >>> I'm not sure there is anything to "interpret" -- the operation is unsigned >>> and ove

Re: [PATCH GCC8][13/33]Rewrite cost computation of ivopts

2017-05-12 Thread Bin.Cheng
On Fri, May 12, 2017 at 8:39 AM, Christophe Lyon wrote: > Hi Bin, > > > On 4 May 2017 at 17:25, Bin.Cheng wrote: >> On Wed, Apr 26, 2017 at 11:18 AM, Richard Biener >> wrote: >>> On Wed, Apr 26, 2017 at 12:12 PM, Bin.Cheng wrote: >>>> On

Re: [PATCH GCC8][13/33]Rewrite cost computation of ivopts

2017-05-12 Thread Bin.Cheng
On Fri, May 12, 2017 at 10:50 AM, Bin.Cheng wrote: > On Fri, May 12, 2017 at 8:39 AM, Christophe Lyon > wrote: >> Hi Bin, >> >> >> On 4 May 2017 at 17:25, Bin.Cheng wrote: >>> On Wed, Apr 26, 2017 at 11:18 AM, Richard Biener >>> wrote: >>

Re: PR78972, 80283: Extend TER with scheduling

2017-05-15 Thread Bin.Cheng
On Mon, May 15, 2017 at 9:27 AM, Richard Biener wrote: > On Fri, May 12, 2017 at 7:51 PM, Bernd Schmidt wrote: >> If you look at certain testcases like the one for PR78972, you'll find that >> the code generated by TER is maximally pessimal in terms of register >> pressure: we can generate a larg

Re: [PATCH GCC8][29/33]New register pressure estimation

2017-05-15 Thread Bin.Cheng
On Thu, May 11, 2017 at 11:39 AM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:53 PM, Bin Cheng wrote: >> Hi, >> Currently IVOPTs shares the same register pressure computation with RTL loop >> invariant pass, >> which doesn't work very well. This patch introduces specific interface for >

Re: [PATCH GCC8][30/33]Fold more type conversion into binary arithmetic operations

2017-05-15 Thread Bin.Cheng
On Thu, May 11, 2017 at 11:54 AM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:53 PM, Bin Cheng wrote: >> Hi, >> Simplification of (T1)(X *+- CST) is already implemented in >> aff_combination_expand, >> this patch moves it to tree_to_aff_combination. It also supports unsigned >> types >>

Re: [PATCH GCC8][31/33]Set range information for niter bound of vectorized loop

2017-05-15 Thread Bin.Cheng
On Thu, May 11, 2017 at 12:02 PM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:54 PM, Bin Cheng wrote >> Hi, >> Based on vect_peeling algorithm, we know for sure that vectorized loop must >> iterates at least once. >> This patch sets range information for niter bounds of vectorized loop.

Re: [PATCH GCC8][29/33]New register pressure estimation

2017-05-18 Thread Bin.Cheng
On Wed, May 17, 2017 at 1:37 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> -/* Calculates cost for having N_REGS registers. This number includes >> - induction variables, invariant variables and invariant expressions. */ >> +/* Estimate register

Re: [PATCH GCC8][29/33]New register pressure estimation

2017-05-18 Thread Bin.Cheng
On Thu, May 18, 2017 at 11:41 AM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, May 17, 2017 at 1:37 PM, Richard Sandiford >> wrote: >>> "Bin.Cheng" writes: >>>> -/* Calculates cost for having N_REGS registers. This number in

Re: [PATCH 2/3] Simplify wrapped binops

2017-05-18 Thread Bin.Cheng
On Thu, May 18, 2017 at 3:47 PM, Robin Dapp wrote: > match.pd part of the patch. > > gcc/ChangeLog: > > 2017-05-18 Robin Dapp > > * match.pd: Simplify wrapped binary operations. > * tree-vrp.c (extract_range_from_binary_expr_1): Add overflow > parameter. > (extra

Re: [PATCH 2/3] Simplify wrapped binops

2017-05-18 Thread Bin.Cheng
On Thu, May 18, 2017 at 5:08 PM, Robin Dapp wrote: >> Any reason to expose tree-vrp.c internal interface here? The function >> looks quite expensive. Overflow check can be done by get_range_info >> and simple wi::cmp calls. Existing code like in >> tree-ssa-loop-niters.c already does that. Als

Re: [PATCH 2/3] Simplify wrapped binops

2017-05-19 Thread Bin.Cheng
On Fri, May 19, 2017 at 11:09 AM, Robin Dapp wrote: >> I can guess what is happening here. It's a 40 bits unsigned long long >> field, (s.b-8) will be like: >> _1 = s.b >> _2 = _1 + 0xf8 >> Also get_range_info returns value range [0, 0xFF] for _1. >> You'd need to check if _1(with

Re: [PATCH GCC8][31/33]Set range information for niter bound of vectorized loop

2017-05-22 Thread Bin.Cheng
On Fri, May 19, 2017 at 1:51 PM, Richard Biener wrote: > On Mon, May 15, 2017 at 5:58 PM, Bin.Cheng wrote: >> On Thu, May 11, 2017 at 12:02 PM, Richard Biener >> wrote: >>> On Tue, Apr 18, 2017 at 12:54 PM, Bin Cheng wrote >>>> Hi, >>>> Based

Re: [PATCH GCC][3/6]Fix PR80815 by handling negative DR_STEPs in runtime alias check

2017-05-24 Thread Bin.Cheng
On Tue, May 23, 2017 at 6:53 PM, Richard Sandiford wrote: > AIUI, the reason the old code mishandled negative steps was that the > associated segment lengths were stored as sizetype and so looked like > big unsigned values. Those values therefore satisfied tree_fits_uhwi_p > even though they were

Re: [PATCH GCC][3/6]Fix PR80815 by handling negative DR_STEPs in runtime alias check

2017-05-25 Thread Bin.Cheng
On Wed, May 24, 2017 at 11:54 AM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Tue, May 23, 2017 at 6:53 PM, Richard Sandiford >> wrote: >>> AIUI, the reason the old code mishandled negative steps was that the >>> associated segment lengths

Re: [PATCH GCC][4/6]Relax minimal segment length of DR_B for merging alias check

2017-05-25 Thread Bin.Cheng
On Tue, May 23, 2017 at 5:23 PM, Bin Cheng wrote: > Hi, > As commented in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80815#c1, > We can relax minimal segment length of DR_B for merging. With this change, > the new test can be improved to only one alias check. Note the > condition is still accu

Re: [PATCH GCC][1/6]Move compare_tree to tree.c and expose the interface.

2017-05-26 Thread Bin.Cheng
On Fri, May 26, 2017 at 12:14 PM, Richard Biener wrote: > On Tue, May 23, 2017 at 6:22 PM, Bin Cheng wrote: >> Hi, >> This patch set factors out runtime alias check code from >> tree-vect-data-refs.c >> and tree-vect-loop-manip.c as general interfaces in tree-data-ref.c. With >> this >> change

Re: [PATCH GCC][3/6]Fix PR80815 by handling negative DR_STEPs in runtime alias check

2017-05-26 Thread Bin.Cheng
On Fri, May 26, 2017 at 12:39 PM, Richard Biener wrote: > On Thu, May 25, 2017 at 5:15 PM, Bin.Cheng wrote: >> On Wed, May 24, 2017 at 11:54 AM, Richard Sandiford >> wrote: >>> "Bin.Cheng" writes: >>>> On Tue, May 23, 2017 at 6:53 PM, Richard San

Re: [PATCH GCC][1/6]Move compare_tree to tree.c and expose the interface.

2017-05-26 Thread Bin.Cheng
On Fri, May 26, 2017 at 12:50 PM, Richard Biener wrote: > On Fri, May 26, 2017 at 1:30 PM, Bin.Cheng wrote: >> On Fri, May 26, 2017 at 12:14 PM, Richard Biener >> wrote: >>> On Tue, May 23, 2017 at 6:22 PM, Bin Cheng wrote: >>>> Hi, >>>> This pat

Re: [PATCH GCC][2/6]Factor out code pruning runtime alias checks

2017-05-26 Thread Bin.Cheng
On Fri, May 26, 2017 at 12:15 PM, Richard Biener wrote: > On Tue, May 23, 2017 at 6:22 PM, Bin Cheng wrote: >> Hi, >> This is the second patch in the set, it factors out code pruning runtime >> alias >> checks from file tree-vect-data-refs.c to tree-data-ref.c. It also >> introduces >> new int

Re: [PATCH GCC][4/6]Relax minimal segment length of DR_B for merging alias check

2017-05-30 Thread Bin.Cheng
On Tue, May 30, 2017 at 12:27 PM, Richard Biener wrote: > On Thu, May 25, 2017 at 5:16 PM, Bin.Cheng wrote: >> On Tue, May 23, 2017 at 5:23 PM, Bin Cheng wrote: >>> Hi, >>> As commented in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80815#c1, >>> We can rela

Re: [PATCH TEST]Rectify test case gcc.dg/tree-ssa/ivopt_mult_4.c

2017-05-31 Thread Bin.Cheng
On Fri, May 26, 2017 at 12:49 PM, Richard Biener wrote: > On Thu, May 25, 2017 at 8:00 PM, Bin Cheng wrote: >> Hi, >> I believe this tests has been wrongly modified previously. It is to test >> that the exit check on >> pointer shouldn't be replaced by integer IV. Somehow GCC starts replacing

Re: [PATCH GCC][4/5]Improve loop distribution to handle hmmer

2017-06-05 Thread Bin.Cheng
On Mon, Jun 5, 2017 at 5:21 AM, Kugan Vivekanandarajah wrote: > Hi Bin, > > Thanks for posting the patch. I haven't looked in detail yet but have > couple of quick questions. > > 1. Shouldn’t the run time alias check for versioning happen only when > vectorisation is enabled? You seems to be using

Re: [PATCH] Fix gcc.dg/tree-ssa/scev-[345].c testcases

2017-01-13 Thread Bin.Cheng
On Fri, Jan 13, 2017 at 9:46 AM, Richard Biener wrote: > > The following is an attempt to change those testcases to be less dependent > on previous passes. The original motivation of the testcases seems to be > testing SCEV capabilities and in turn IVOPTs decisions, thus the testcases > are chang

Re: [PATCH TEST]Add test for PR78652

2017-01-13 Thread Bin.Cheng
On Mon, Dec 12, 2016 at 4:35 PM, Jakub Jelinek wrote: > On Mon, Dec 12, 2016 at 09:32:30AM -0700, Jeff Law wrote: >> On 12/09/2016 03:20 AM, Bin Cheng wrote: >> >Hi, >> >PR78652 was fixed by patch for PR77856, this patch adds a test for it. >> >Test result checked, is it OK? >> > >> >Thanks, >>

Re: [PATCH] Be careful about combined chain with length == 0 (PR, tree-optimization/70754).

2017-01-18 Thread Bin.Cheng
On Wed, Jan 18, 2017 at 10:10 AM, Martin Liška wrote: > Hello. > > After basic understanding of loop predictive commoning, the problematic > combined chain is: > > Loads-only chain 0x38b6730 (combined) > max distance 0 > references: > MEM[(real(kind=8) *)vectp_a.29_81] (id 1) > offs

Re: [PATCH] Be careful about combined chain with length == 0 (PR, tree-optimization/70754).

2017-01-18 Thread Bin.Cheng
On Wed, Jan 18, 2017 at 2:54 PM, Richard Biener wrote: > On Wed, Jan 18, 2017 at 11:10 AM, Martin Liška wrote: >> Hello. >> >> >> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. >> >> Ready to be installed? > > I'm not sure. If we have such zero distance refs in the IL

Re: [PATCH] Be careful about combined chain with length == 0 (PR, tree-optimization/70754).

2017-01-19 Thread Bin.Cheng
On Thu, Jan 19, 2017 at 9:42 AM, Richard Biener wrote: > On Wed, Jan 18, 2017 at 4:32 PM, Bin.Cheng wrote: >> On Wed, Jan 18, 2017 at 2:54 PM, Richard Biener >> wrote: >>> On Wed, Jan 18, 2017 at 11:10 AM, Martin Liška wrote: >>>> Hello. >>>>

Re: [PATCH] Be careful about combined chain with length == 0 (PR, tree-optimization/70754).

2017-01-19 Thread Bin.Cheng
On Thu, Jan 19, 2017 at 11:22 AM, Richard Biener wrote: > On Thu, Jan 19, 2017 at 11:25 AM, Bin.Cheng wrote: >> On Thu, Jan 19, 2017 at 9:42 AM, Richard Biener >> wrote: >>> On Wed, Jan 18, 2017 at 4:32 PM, Bin.Cheng wrote: >>>> On Wed, Jan 18, 2017 at

Re: [PATCH] Be careful about combined chain with length == 0 (PR, tree-optimization/70754).

2017-01-20 Thread Bin.Cheng
On Thu, Jan 19, 2017 at 12:07 PM, Bin.Cheng wrote: > On Thu, Jan 19, 2017 at 11:22 AM, Richard Biener > wrote: >> On Thu, Jan 19, 2017 at 11:25 AM, Bin.Cheng wrote: >>> On Thu, Jan 19, 2017 at 9:42 AM, Richard Biener >> >> Or a later pass introduced

Re: [PATCH PR78559][RFC]Proposed fix

2017-01-25 Thread Bin.Cheng
On Wed, Jan 25, 2017 at 3:56 PM, Segher Boessenkool wrote: > Hi! > > I was worried this patch would prevent too many other optimisations, > so I looked into better options. I didn't find any. I tested the > effects of the patch on 31 architectures (building GCC and then Linux Thanks very much fo

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-03-29 Thread Bin.Cheng
On Tue, Mar 28, 2017 at 1:34 PM, Richard Biener wrote: > On Tue, Mar 28, 2017 at 2:01 PM, Bin Cheng wrote: >> Hi, >> This patch is to fix PR80153. As analyzed in the PR, root cause is >> tree_affine lacks >> ability differentiating (unsigned)(ptr + offset) and (unsigned)ptr + >> (unsigned)offs

Re: [PATCH][RFC] Fix P1 PR77498

2017-03-29 Thread Bin.Cheng
On Wed, Mar 29, 2017 at 11:05 AM, Richard Biener wrote: > > After quite some pondering over this and other related bugs I propose > the following for GCC 7 which tames down PRE a bit (back to levels > of GCC 6). Technically it's the wrong place to fix this, we do > have measures in place during e

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-03-30 Thread Bin.Cheng
On Thu, Mar 30, 2017 at 11:37 AM, Richard Biener wrote: > On Wed, Mar 29, 2017 at 5:22 PM, Bin.Cheng wrote: >> On Tue, Mar 28, 2017 at 1:34 PM, Richard Biener >> wrote: >>> On Tue, Mar 28, 2017 at 2:01 PM, Bin Cheng wrote: >>>> Hi, >>>> This

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-03-30 Thread Bin.Cheng
On Thu, Mar 30, 2017 at 1:44 PM, Richard Biener wrote: > On Thu, Mar 30, 2017 at 2:03 PM, Bin.Cheng wrote: >> On Thu, Mar 30, 2017 at 11:37 AM, Richard Biener >> wrote: >>> On Wed, Mar 29, 2017 at 5:22 PM, Bin.Cheng wrote: >>>> On Tue, Mar 28, 2017 at

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-03-30 Thread Bin.Cheng
On Thu, Mar 30, 2017 at 2:18 PM, Bin.Cheng wrote: > On Thu, Mar 30, 2017 at 1:44 PM, Richard Biener > wrote: >> On Thu, Mar 30, 2017 at 2:03 PM, Bin.Cheng wrote: >>> On Thu, Mar 30, 2017 at 11:37 AM, Richard Biener >>> wrote: >>>> On Wed, Mar 29, 2017

Re: [PATCH][RFC] Fix P1 PR77498

2017-03-31 Thread Bin.Cheng
On Fri, Mar 31, 2017 at 11:37 AM, Richard Biener wrote: > On Fri, 31 Mar 2017, Markus Trippelsdorf wrote: > >> On 2017.03.31 at 11:16 +0200, Richard Biener wrote: >> > On Fri, 31 Mar 2017, Richard Biener wrote: >> > >> > > On Fri, 31 Mar 2017, Rainer Orth wrote: >> > > >> > > > Hi Christophe, >> >

Re: [PATCH][RFC] Fix P1 PR77498

2017-03-31 Thread Bin.Cheng
On Fri, Mar 31, 2017 at 2:57 PM, Bin.Cheng wrote: > On Fri, Mar 31, 2017 at 11:37 AM, Richard Biener wrote: >> On Fri, 31 Mar 2017, Markus Trippelsdorf wrote: >> >>> On 2017.03.31 at 11:16 +0200, Richard Biener wrote: >>> > On Fri, 31 Mar 2017, Richard Biener

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-04-05 Thread Bin.Cheng
On Thu, Mar 30, 2017 at 2:34 PM, Richard Biener wrote: > On Thu, Mar 30, 2017 at 3:20 PM, Bin.Cheng wrote: >> On Thu, Mar 30, 2017 at 2:18 PM, Bin.Cheng wrote: >>> On Thu, Mar 30, 2017 at 1:44 PM, Richard Biener >>> wrote: >>>> On Thu, Mar 30, 2017 at

Re: [PATCH PR80153]Always generate folded type conversion in tree-affine

2017-04-05 Thread Bin.Cheng
And the patch.. On Wed, Apr 5, 2017 at 8:25 AM, Bin.Cheng wrote: > On Thu, Mar 30, 2017 at 2:34 PM, Richard Biener > wrote: >> On Thu, Mar 30, 2017 at 3:20 PM, Bin.Cheng wrote: >>> On Thu, Mar 30, 2017 at 2:18 PM, Bin.Cheng wrote: >>>> On Thu, Mar 30

Re: [PATCH] Fix PR80281

2017-04-05 Thread Bin.Cheng
On Wed, Apr 5, 2017 at 12:38 PM, Markus Trippelsdorf wrote: > On 2017.04.03 at 15:20 +0200, Richard Biener wrote: >> I'm re-testing the following variant. >> >> Richard. >> >> 2017-04-03 Richard Biener >> >> PR middle-end/80281 >> * match.pd (A + (-B) -> A - B): Make sure to preserv

Re: [RFC] S/390: Alignment peeling prolog generation

2017-04-11 Thread Bin.Cheng
On Tue, Apr 11, 2017 at 3:38 PM, Robin Dapp wrote: > Hi, > > when looking at various vectorization examples on s390x I noticed that > we still peel vf/2 iterations for alignment even though vectorization > costs of unaligned loads and stores are the same as normal loads/stores. > > A simple exampl

Re: [RFC] S/390: Alignment peeling prolog generation

2017-04-11 Thread Bin.Cheng
On Tue, Apr 11, 2017 at 4:03 PM, Robin Dapp wrote: > Hi Bin, > >> Seems Richi added code like below comparing costs between aligned and >> unsigned loads, and only peeling if it's beneficial: >> >> /* In case there are only loads with different unknown misalignments, >> use >> peel

Re: [PATCH GCC8][04/33]Single interface finding invariant variables

2017-04-18 Thread Bin.Cheng
On Tue, Apr 18, 2017 at 1:20 PM, Trevor Saunders wrote: > On Tue, Apr 18, 2017 at 10:39:30AM +, Bin Cheng wrote: >> -find_depends (tree *expr_p, int *ws ATTRIBUTE_UNUSED, void *data) >> +find_inv_vars_cb (tree *expr_p, int *ws ATTRIBUTE_UNUSED, void *data) >> { >> - bitmap *inv_vars = (bitma

Re: [PATCH GCC8][33/33]Fix PR69710/PR68030 by reassociate vect base address and a simple CSE pass

2017-04-19 Thread Bin.Cheng
On Tue, Apr 18, 2017 at 10:25 PM, Michael Meissner wrote: > I did a bootstrap and make check-{gcc,c++,fortran,lto} comparing the results > to > the baseline (subversion id 246975). > > There were 2 differences: > > The baseline failed on gcc.dg/sms-4.c but succeeded on gcc.dg/sms-1.c. > > Here ar

Re: [PATCH GCC8][33/33]Fix PR69710/PR68030 by reassociate vect base address and a simple CSE pass

2017-04-19 Thread Bin.Cheng
On Wed, Apr 19, 2017 at 9:33 PM, Michael Meissner wrote: > On Wed, Apr 19, 2017 at 02:08:49PM +0100, Bin.Cheng wrote: >> Hi Michael, >> Thanks for testing it. Could you have a check if updated patch >> resolves the ICE? >> As for sms-*.c tests, I had difficulty in

Re: [PATCH] Add test-case (PR tree-optimization/66278).

2017-04-20 Thread Bin.Cheng
On Thu, Apr 20, 2017 at 9:35 AM, Martin Liška wrote: > Hello. > > The patch adds a new test-case for the mentioned PR. Tested on > x86_64-linux-gnu > and ppc64le-linux-gnu. > > Ready for trunk or should I postpone it for next stage1? Though can't approve, I think it's ok since we are in stage 1 n

Re: [PATCH GCC8][13/33]Rewrite cost computation of ivopts

2017-04-26 Thread Bin.Cheng
On Wed, Apr 26, 2017 at 10:50 AM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:43 PM, Bin Cheng wrote: >> Hi, >> This is the major part of this patch series. It rewrites cost computation >> of ivopts using tree affine. >> Apart from description given by cover message: >> A) New computat

<    1   2   3   4   5   6   7   8   9   10   >