From: Andrew Pinski
This adds octeontx2 naming. It currently uses the cortexa57
cost model and schedule model until I submit this. This is
more a place holder to get the naming of the cores in GCC 10.
I will submit the cost model in the next couple of days.
OK? Bootstrapped and tested on aarc
From: Andrew Pinski
This adds octeontx2 naming. It currently uses the cortexa57
cost model and schedule model until I submit this. This is
more a place holder to get the naming of the cores in GCC 10.
I will submit the cost model in the next couple of days.
OK? Bootstrapped and tested on aarc
From: Andrew Pinski
Like I mentioned in https://gcc.gnu.org/ml/gcc/2020-01/msg00157.html,
The shift by a register should be just COSTS_N_INSNS (1) rather than
COSTS_N_INSNS (2). This allows lshift_cheap_p to return true now
and converting switches to be using shift and other like
structures. I
From: Andrew Pinski
Commit g:f96bf49a0 added the target field to expand_operand.
But it leaves it uninitialized when doing a full initialization
inside create_expand_operand. This fixes the problem and improves
the code generation inside create_expand_operand too.
OK? Bootstrapped and tested on
From: Andrew Pinski
In struct _dep, there is an implicit padding of 4bits. This
bit-field padding is uninitialized when init_dep_1 is being called.
This means we access uninitialized memory but never use it for
anything. Adding an unused bit-field field and initializing it
in init_dep_1 will im
From: Andrew Pinski
Hi,
While working on bit-field lowering pass, I came across this bug.
The IR looks like:
VIEW_CONVERT_EXPR(var1) = _12;
_1 = BIT_FIELD_REF ;
Where the BIT_FIELD_REF has REF_REVERSE_STORAGE_ORDER set on it
and var1's type has TYPE_REVERSE_STORAGE_ORDER set on it.
PRE/FRE
From: Andrew Pinski
The problem here was g:23b88fda665d2f995c was not a complete fix
for supporting tranditional TLS on ILP32.
So the problem here is a couple of things, first __tls_get_addr
call will return a C pointer value so we need to use ptr_mode
when we are creating the call. Then we nee
From: Andrew Pinski
On MIPS, .set noreorder/reorder needs to emitted around
the nop. The template for the nop instruction uses %(/%) to
do that. But default_print_patchable_function_entry uses
fprintf rather than output_asm_insn to output the instruction.
This fixes the problem by using output
From: Andrew Pinski
Reported as PR 93321, prepare_block_for_update with some huge
recusive inlining can go past the stack limit. The loop
at the end, could be transformed such that the last iteration goes
back to the begining of the function instead of the call.
This reduces the stack usage and
From: Andrew Pinski
Reported as PR 93321, prepare_block_for_update with some huge
recusive inlining can go past the stack limit. Transforming this
recursive into worklist improves the stack usage here and we no
longer seg fault for the testcase. Note the order we
OK? Bootstrapped and tested on
From: Andrew Pinski
This is what I committed.
Reported as PR 93321, prepare_block_for_update with some huge
recusive inlining can go past the stack limit. Transforming this
recursive into worklist improves the stack usage here and we no
longer seg fault for the testcase. Note the order we walk
From: Andrew Pinski
This is what I committed after Richard's comments.
The problem here was g:23b88fda665d2f995c was not a complete fix
for supporting tranditional TLS on ILP32.
So the problem here is a couple of things, first __tls_get_addr
call will return a C pointer value so we need to use
From: Andrew Pinski
tree-ssa testcases sometimes check autovect effective target
but does not set it up. On MIPS, those testcases fail with
some TCL error messages. This fixes the issue by calling
check_vect_support_and_set_flags inside tree-ssa.exp.
There might be other .exp files which need t
From: Andrew Pinski
This reverts commit 9085381f1931cc3667412c8fff91878184835901 as it was
causing default dg-do to be set incorrectly on most targets.
Instead move testcases that are vect related testcase that
use "dg-require-effective-target vect_*" to the vect test area.
Committed as obvious
From: Andrew Pinski
The problem here is arc looks at current_output_insn unconditional
but sometimes current_output_insn is NULL. With patchable-function-entry,
it will be. This is similar to how the nios2, handles "%.".
Committed as obvious after a simple test with -fpatchable-function-entry=1
From: Andrew Pinski
vec_zeroextend.c fails on big-endian as it assumes
0 index is the lower part but it is not for
big-endian case. This fixes the problem by
using the correct index for the lower part
for big-endian.
Committed as obvious after a test on aarch64_be-linux-gnu.
Thanks,
Andrew Pin
From: Andrew Pinski
Looks like the porting_to page was not linked to the changes
page for GCC 9. So uncomments it out.
Committed as obvious.
---
htdocs/gcc-9/changes.html | 2 --
1 file changed, 2 deletions(-)
diff --git a/htdocs/gcc-9/changes.html b/htdocs/gcc-9/changes.html
index c0e581fe..
From: Andrew Pinski
Hi,
The problem here is that the vector mode version of movmisalign
was only conditionalized on if SIMD was enabled instead of being
also conditionalized on STRICT_ALIGNMENT too.
Applied as pre-approved in the bug report by Richard Sandiford
after a bootstrap/test on aarch6
From: Andrew Pinski
Right if someone supplies a -mcpu= option and then overrides
that option with -march=*, we get a warning when they conflict.
What we need is a generic cpu for each arch level but that is not
that useful because the only difference would be the arch level.
The best option is to
From: Andrew Pinski
The problem here is there was a typo in the documentation
for the 'A' modifier in the table, it was recorded as 'a'
in the table on the modifier column.
Committed as obvious.
2020-03-09 Andrew Pinski
PR inline-asm/94095
* doc/extend.texi (x86 Operand Modi
From: Andrew Pinski
Hi if we have a aarch64 compiler that has a big-endian
multi-lib, it fails to compile libstdc++ because
simd_fast_mersenne_twister_engine is only defined for little-endian
in ext/random but ext/opt_random.h thinks it is defined always.
OK? Built an aarch64-elf toolchain whic
From: Andrew Pinski
Hi,
In some places in the aarch64 backend, neon_logic is used for
mov v0.16b, v1.16b
mov v0., v1.
This patch moves them over to use neon_move instead.
For most cores, this does not matter but for OcteonTX2 core
it does matter.
OK? Bootstrapped and tested on aarch64-linux-g
From: Andrew Pinski
Hi,
On OcteonTX2, ld1r and ld1 (with a single lane) are split
into two different micro-ops unlike most other targets.
This adds three extra costs to the cost table:
ld1_dup: used for "ld1r {v0.4s}, [x0]"
merge_dup: used for "dup v0.4s, v0.4s[0]" and "ins v0.4s[0], v0.4s[0]"
From: Andrew Pinski
Hi,
The problem here is the token->val.node is not saved over
a precompiled header for C++ operator. This can cause an
internal compiler error as we tried to print out the spelling
of the token as we assumed it was valid.
The fix is to have cpp_token_val_index return CPP_TO
From: Andrew Pinski
The problem here is that when we mark the ssa name that was referenced in the
now removed
dead store (to a write only static variable), the inline-asm would also be
removed
even though it was defining another ssa name. This fixes the problem by checking
to make sure that the
From: Andrew Pinski
The problem here is that when we mark the ssa name that was referenced in the
now removed
dead store (to a write only static variable), the inline-asm would also be
removed
even though it was defining another ssa name. This fixes the problem by checking
to make sure that the
From: Andrew Pinski
The problem here was a disconnect between splittable_const_int_operand
predicate and the function riscv_build_integer_1 for 32bits with zbs enabled.
The splittable_const_int_operand predicate had a check for TARGET_64BIT which
was not needed so this patch removed it.
Committe
From: Andrew Pinski
Since this testcase is not exactly SSA specific and it would
be a good idea to compile this at more than just at -O1, moving
it to gcc.c-torture/compile would do that.
Committed as obvious after a test on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/
From: Andrew Pinski
For compound literals empty struct stores are not removed as they go down a
different path of the gimplifier; trying to optimize the init constructor.
This fixes the problem by not adding the gimple assignment at the end
of gimplify_init_constructor if it was an empty type.
N
From: Andrew Pinski
So the problem here is there is code in the C++ front-end not to add a
break statement (to the IR) if the previous block does not fall through.
The problem is the code which does the check to see if the block
may fallthrough does not check a CLEANUP_STMT; it assumes it is alwa
From: Andrew Pinski
While working on some more boolean optimizations, I noticed
that there are places which does SSA_NAME@0 and then look
at then either use get_nonzero_bits or ssa_name_has_boolean_range
to see if the ssa name had a boolean range. This cleans this
up slightly by have a simple mat
From: Andrew Pinski
I noticed this while Richard B. fixing PR101756.
Basically min of two bools is the same as doing an "and"
and max of two bools is doing an "ior".
gcc/ChangeLog:
* match.pd: Add min/max patterns for bool types.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/bool
From: Andrew Pinski
Even though this does not change the generated code,
it does improve the initial RTL generation.
gcc/ChangeLog:
* tree-ssa-math-opts.c (match_arith_overflow):
Add range and nonzero bits information to
the new overflow ssa name. Also fold
the
From: Andrew Pinski
There are a few problems with download_prerequisites are
described in PR 82704. The first is on busy-box version of
shasum and md5sum the extended option --check don't exist
so just use -c. The second issue is the code for which
shasum program to use is included twice and is
From: Andrew Pinski
Since == is not portable, it is better to use = in contrib/
download_prerequisites. The only place == was used is inside
the function md5_check which is used only on Mac OS X.
Tested on Mac OS X as:
./contrib/download_prerequisites --md5
Both with all files having the correc
From: Andrew Pinski
So the main issue here is that some signals are not setup unlike collect2.
So this merges the setting up of the signal handlers to one function in
collect-utils and has collect2 and lto-wrapper call that function.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regres
From: Andrew Pinski
The problem here is with -fPIC, both cmp and move
don't bind locally so they are not even tried to be
inlined. This fixes the issue by marking both
functions as static and now the testcase passes
for both -fPIC and -fno-PIC cases.
OK? Tested on x86_64-linux-gnu.
gcc/testsui
From: Andrew Pinski
The Linux kernel started to fail compile when the jump threader was improved
(r12-2591-g2e96b5f14e4025691). This failure was due to the IPA splitting code
decided now to split off the basic block which contained two functions,
one of those functions included the error attribut
From: Andrew Pinski
It was pointed out to me by Jakub, that the comment in front of
the new code which handles warning/error attribute was not really
understandable. This fixes the comment to be understandable; I
don't know why I wrote the original comment that way even.
Committed as obvious aft
From: Andrew Pinski
This is a simple patch which simplifies the __builtin_aarch64_sqrt* builtins
into the internal function SQRT which allows for constant folding and other
optimizations at the gimple level. It was originally suggested we do to
__builtin_sqrt just for __builtin_aarch64_sqrtdf whe
From: Andrew Pinski
The problem here is that aarch64_expand_setmem does not change the alignment
for strict alignment case. This is version 3 of this patch, is is based on
version 2 and moves the check for the number of instructions from the
optimizing for size case to be always and change the co
From: Andrew Pinski
The function aarch64_evpc_ins would reuse the target even though
it might be the same register as the two inputs.
Instead of checking to see if we can reuse the target, just use the
original input directly.
Committed as approved after bootstrapped and tested on
aarch64-linux-
From: Andrew Pinski
After the quoting changes in r12-6521-g03a1a86b5ee40d4e240,
branch-protection-attr.c
fails due to expecting a different quoting type for "leaf".
This patch changes the quoting from "" to '' as that is what is used now.
Committed as obvious after a test of the testcase.
gcc/
From: Andrew Pinski
The OEP_* enums were moved to tree-core.h in
r0-124973-g5e351e960763 but the comment was correct
when it was added added to fold-const.h in
r10-4231-g7f4a8ee03d40. This fixes the reference
to the OEP_* enum to reference tree-core.
Committed as obvious after a bootstrap/test o
From: Andrew Pinski
As reported at
https://gcc.gnu.org/pipermail/gcc/2022-February/238216.html,
multiprecision.org now uses https so this updates the documentation
to use https instead of http.
Committed as obvious.
gcc/ChangeLog:
* doc/install.texi:
---
gcc/doc/install.texi | 2 +-
1
From: Andrew Pinski
The problem here is that the aarch64 back-end was placing const0_rtx
into the constant vector RTL even if the mode was a floating point mode.
The fix is instead to use CONST0_RTX and pass the mode to select the
correct zero (either const_int or const_double).
Committed as obv
From: Andrew Pinski
The problem here is we end up with an error_mark_node when calling
useless_type_conversion_p and that ICEs. STRIP_NOPS/tree_nop_conversion
has had a check for the inner type being an error_mark_node since g9a6bb3f78c96
(2000). This just adds the check also to tree_ssa_useless_
From: Andrew Pinski
Currently we fold (type) X op CST into (type) (X op ((type-x) CST)) when the
conversion widens
but not when the conversion is a nop. For the same reason why we move the
widening conversion
(the possibility of removing an extra conversion), we should do the same if the
conve
From: Andrew Pinski
The problem is r12-5300-gf98f373dd822b35c allows phiopt to recognize more basic
blocks
but missed one location where the basic block does not need to be empty but
still
needs to have a single predecessor. This patch fixes that over sight.
OK? Bootstrapped and tested on x86_
From: Andrew Pinski
The problem here is that aarch64_expand_setmem does not change the alignment
for strict alignment case. This is a simplified patch from what I had
previously.
So constraining copy_limit to the alignment of the mem in the case of strict
align
fixes the issue without checking
From: Andrew Pinski
There is some re-association code in fold_binary which conflicts with
this optimization due keeping around some "constants" which are not
INTEGER_CST (1 << -1) so we end up in an infinite loop because of that.
So we need to limit this case to GIMPLE level only.
OK? Bootstrapp
From: Andrew Pinski
The problem here is that int_fits_type_p will return false if we just
change the sign of things like -2 (or 254) so we should accept the case
where we just change the sign (and not the precision) of the type.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions
From: Andrew Pinski
This PR was orignally for the missed optimization of a few isnegative which
had been solved a long time ago (sometime before 4.4.0). I noticed there was
one missed optimization on the gimple level. There is a match.pd pattern
for ~a < CST but we miss that there could be a nop_
From: Andrew Pinski
The pattern here was not catching all comparisons and the multiply
was not commutative when it should have been. This patches fixes
that by using tcc_comparison and adding :c to the multiply.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
gcc/ChangeLog:
From: Andrew Pinski
Combine disabled this optimization in r10-254-gddbb5da5199fb42 but it makes
sense to do this on the gimple level and then let expand decide which way is
better. So this adds the transformation on the gimple level (late like was
done for the multiply case).
OK? Bootstrapped an
From: Andrew Pinski
This is a new version of the patch to fix PR 102216.
Instead of doing the canonicalization inside forwprop, Richi
mentioned we should do it inside fold_stmt_1 and that is what
this patch does.
PR tree-optimization/102216
gcc/ChangeLog:
* gimple-fold.c (fold_
From: Andrew Pinski
So what is happening is DIST_SUBDIRS contains the conditional
directories which is wrong, so we need to force DIST_SUBDIRS
to be the same as SUBDIRS as recommened by the automake manual.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
Also now make distcl
From: Andrew Pinski
Even though I cannot reproduce the ICE any more, this is still
a bug. We check already to see if we can access the directory
but never check to see if the path is actually a directory.
This adds the check and now we reject the file as not usable
as a tmp directory.
OK? Boots
From: Andrew Pinski
This just adds a simplification to simplify_vector_constructor for
vector of 1 element to be VCE which should reduce memory usage in
the compiler and maybe allow for some more optimizations.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree
From: Andrew Pinski
This testcase used to fail before GCC 6.4.0 due to the wrong
type being used for auto when used with bitfields, the C++
front-end was using the "bitfield" type rather than the
underlaying type.
Committed the testcase after a quick check.
PR c++/71792
gcc/testsuite/C
From: Andrew Pinski
There are a few issues here with typenames and unions (and even struct
keywords with unions). First in cp_parser_check_class_key,
we need to allow typenames to name union types and union key
to be able to use with typenames.
The next issue is we need to record if we had a uni
From: Andrew Pinski
This is a simple patch to do some DCE after a successful
match and simplify replacement in PHI-OPT. match and simplify
likes to generate some extra statements which should be cleaned
up.
OK? Bootstrapped and tested on x86_64-linux with no regressions.
Thanks,
Andrew Pinski
From: Andrew Pinski
Even though this PR was reported with an ubsan issue, the problem is
tree_nonzero_bits is being called with an expression which is a vector type.
This fixes three patterns I noticed which does that.
And adds a testcase for one of the patterns.
OK? Bootstrapped and tested on x
From: Andrew Pinski
While looking at older unconfirmed bug reports, I noticed there was
an ubsan found issue and noticed tree_nonzero_bits was being called with
a vector type. How ubsan found it was at the end of tree_nonzero_bits,
did "return wi::shwi (-1, TYPE_PRECISION (TREE_TYPE (t)));" and
From: Andrew Pinski
Right now anyone could call tree_nonzero_bits with
either complex or vector types and this will return
the wrong thing. So just assert that nobody calls
it with this.
OK? Bootstrapped and tested with no regressions on x86_64-linux-gnu.
gcc/ChangeLog:
* fold-const.cc
From: Andrew Pinski
The comment reference to MD_INCLUDES is not needed
as it is auto generated for long time now even before
aarch64 target was added.
MD_INCLUDES has been auto generated since r0-64489.
Note some targets still manually set MD_INCLUDES and
I suspect those can be changed but I don
From: Andrew Pinski
To make it easier to find operands modifiers while in the md
file, add the list of modifiers to the top of the md file.
This is similar to i386 target.
OK? Built and tested for riscv32-linux-gnu and riscv64-linux-gnu.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_pr
From: Andrew Pinski
This set of patches fixes a few RISCV issues and does a few
cleanups. Including moving all of the iterators to iterators.md like
many newer backends.
It also fixes a few PRs which I filed including the RISCV32 issue
with ZBS enabled.
Thanks,
Andrew Pinski
Andrew Pinski (10):
From: Andrew Pinski
Just like the previous patch this move all of the iterators
of bitmanip.md to iterators.md. All modern backends put the
iterators in iterators.md for easier access.
OK? Built and tested for riscv32-linux-gnu with
--with-arch=rv32imafdc_zba_zbb_zbc_zbs.
Thanks,
Andrew Pinsk
From: Andrew Pinski
Like the previous two patches this moves the iterators
that are in sync.md to iterators.md.
OK? build and tested for riscv64-linux-gnu.
gcc/ChangeLog:
* config/riscv/sync.md (any_atomic, atomic_optab): Move to ...
* config/riscv/iterators.md: Here.
---
gcc/
From: Andrew Pinski
This moves the iterators out from riscv.md to iterators.md
like most modern backends.
I have not moved the iterators from the other .md files yet.
OK? Build and tested on riscv64-linux-gnu and riscv32-linux-gnu.
Thanks,
Andrew Pinski
gcc/ChangeLog:
* config/riscv/r
From: Andrew Pinski
This simplifies the code by adding a predicate and a constraint for 1/2/3.
The aarch64 backend has a similar predicate called aarch64_shift_imm_
which they use there.
OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu with no
regressions.
Thanks,
Andrew Pinski
From: Andrew Pinski
The problem here is two fold. With RISCV32, 32bit
const_int are always signed extended to 64bit in HWI.
So that means for SINGLE_BIT_MASK_OPERAND, it should
mask off the upper bits to see it is a single bit
for !TARGET_64BIT.
Plus there are a few locations which forget to call
From: Andrew Pinski
Like a previous patch, just add constraints for predicates
not_single_bit_mask_operand and single_bit_mask_operand.
OK? Built and tested for riscv32-linux-gnu and riscv64-linux-gnu.
Thanks,
Andrew Pinski
gcc/ChangeLog:
* config/riscv/constraints.md (DbS): New const
From: Andrew Pinski
The constraints should be n instead of i. Also there
needs to a check for out of bounds zero_extract for
*bexti.
gcc/ChangeLog:
PR target/106632
PR target/106588
* config/riscv/bitmanip.md (*shNadduw): Use n constraint
instead of i.
(*
From: Andrew Pinski
A constraint here just makes it easier to understand what the
operands are.
OK? Built and tested on riscv32-linux-gnu and riscv64-linux-gnu with
--with-arch=rvNimafdc_zba_zbb_zbc_zbs (where N is 32 and 64).
Thanks,
Andrew Pinski
gcc/ChangeLog:
* config/riscv/constr
From: Andrew Pinski
To make things easier and more maintainable, we need to
add support printing out w if TARGET_64BIT so this patch
adds %~ to do that, similar how the x86 backend uses %~
to print out i/f for TARGET_AVX2. We could have chosen any
punctuation symbol but ~ looks the closest to w.
From: Andrew Pinski
The default expansion for bswap16 is two extractions (shift/and)
followed by an insertation (ior) and then a zero extend. This can be improved
with ZBB enabled to just full byteswap followed by a (logical) shift right.
This patch adds a new pattern for this which does that.
O
From: Andrew Pinski
Just some improvements for bswap and ZBB including a testsuite change that will
allow more testing to happen.
Thanks,
Andrew Pinski
Andrew Pinski (3):
Fix PR 106600: __builtin_bswap32 is not hooked up for ZBB for 32bit
Fix PR 106601: __builtin_bswap16 code gen could be
From: Andrew Pinski
The problem here is the bswap2 pattern had a check for TARGET_64BIT
but then used the X iterator. Since the X iterator is either SI or DI depending
on the setting TARGET_64BIT, there is no reason for the TARGET_64BIT.
OK? Built and tested on both riscv32-linux-gnu and riscv64
From: Andrew Pinski
While looking for testcases to quickly test, I Noticed that
check_effective_target_bswap was not enabled for riscv when
ZBB is enabled. This patch checks if ZBB is enabled when
targeting RISCV* for bswap.
OK? Ran the testsuite for riscv32-linux-gnu both with and without ZBB e
From: Andrew Pinski
The problem here is the aarch64_expand_setmem code did not check
STRICT_ALIGNMENT if it is creating an overlapping store.
This patch adds that check and the testcase works.
gcc/ChangeLog:
PR target/101934
* config/aarch64/aarch64.c (aarch64_expand_setmem):
From: Andrew Pinski
This adds MIPS Linux support to gcc.misc-tests/linkage.exp. Basically
copying what was done for MIPS IRIX and changing the options to be correct.
OK?
gcc/testsuite/ChangeLog:
PR testsuite/51748
* gcc.misc-tests/linkage.exp: Add mips*-linux-* support.
---
g
From: Andrew Pinski
After the recent r12-3278-823685221de986a change, the testcase
gcc.target/aarch64/sve/acle/general-c/type_redef_1.c started
to ICE as the code was not ready for error_mark_node in the
type. This fixes that and the testcase now passes.
gcc/ChangeLog:
* config/aarch64
From: Andrew Pinski
This patch adds simple folding of __builtin_aarch64_im_lane_boundsi where
we are not going to error out. It fixes the problem by the removal
of the function from the IR.
OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
gcc/ChangeLog:
* config/aa
From: Andrew Pinski
I got some ICEs in my latest testsing while running the libstdc++ testsuite.
I had noticed the problem was connected to types and had just touched the
builtins code but nothing which could have caused this and I looked for
some types/variables that were not being marked with G
From: Andrew Pinski
This patch adds simple folding of __builtin_aarch64_im_lane_boundsi where
we are not going to error out. It fixes the problem by the removal
of the function from the IR.
OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
gcc/ChangeLog:
PR target/9
From: Andrew Pinski
These two testcases have been failing since GCC 5 but things
have improved such that adding a simplification to match.pd
for this case is easier than before.
In the end we have the following IR:
_5 = &a[1] + _4;
_7 = &a + _13;
if (_5 != _7)
So we can fold the _5 !=
From: Andrew Pinski
So right now liblto_plugin.so exports many libiberty symbols and
simple_object file symbols but really it just needs to export onload.
This fixes the problem by using "-export-symbols-regex onload" on
the libtool link line.
lto-plugin/ChangeLog:
* Makefile.am: Expor
From: Andrew Pinski
m32r support never made it to glibc and the support for the Linux kernel
was removed with 4.18. It does not remove much but no reason to keep
around a port which never worked or one which the support in other
projects is gone.
OK? Checked to make sure m32r-linux and m32rle-li
From: Andrew Pinski
The error message is obvious -funconfigured-libstdc++-v3 is used
on the g++ command line. So we just add the dependancy.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
ChangeLog:
* Makefile.def: Have configure-target-libffi depend on
a
From: Andrew Pinski
So the problem here is that now the lto-plugin requires NM that works
with LTO to work so we need to pass down NM just like we do for ranlib
and ar.
OK? Bootstrapped and tested with --with-build-config=bootstrap-lto on
aarch64-linux-gnu.
Note you need to use binutils 2.35 or
From: Andrew Pinski
LTO usage requires binutils 2.35 or newer due to
https://sourceware.org/PR25355.
This adds a note in the prerequisites page about it.
Ok?
gcc/ChangeLog:
* doc/install.texi: Add note about
binutils 2.35 is required for LTO usage.
---
gcc/doc/install.texi | 3
From: Andrew Pinski
So this is a simple fix is to just add to the assert that
sclass and dclass are both greater than or equal to NO_REGS.
NO_REGS is documented as the first register class so it should
have the value of 0.
gcc/ChangeLog:
* lra-constraints.c (check_and_process_move): Ass
From: Andrew Pinski
So GCC has always accepted non-pointer types in computed gotos but
that was wrong based on the documentation:
Any expression of type void * is allowed.
So this fixes the problem by requiring the type to
be a pointer type.
OK? Bootstrapped and tested on x86_64-linux-gnu with
From: Andrew Pinski
The problem here is __builtin_shuffle when called with two arguments
instead of 1, uses a SAVE_EXPR to put in for the 1st and 2nd operand
of VEC_PERM_EXPR and when we go and gimplify the SAVE_EXPR, the type
is now error_mark_node and that fails hard.
This fixes the problem by
From: Andrew Pinski
For some reason I did not see these failures in my testing.
Sorry about that. Anyways this fixes the testcases by
adding a cast to __INTPTR_TYPE__ and then a cast to void*.
Committed after testing them on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* gcc.c-torture/c
From: Andrew Pinski
Even though there is not many computed gotos in the wild and even less
that would use an integer type, it would still be a good idea to add
this new error message to both changes and the porting to guide.
OK?
---
htdocs/gcc-12/changes.html| 6 ++--
htdocs/gcc-12/porting
From: Andrew Pinski
The problem here is with -mstrict-align, aarch64_expand_setmem needs
to check the alginment of the mode to make sure we can use it for
doing the stores.
gcc/ChangeLog:
PR target/103100
* config/aarch64/aarch64.c (aarch64_expand_setmem):
Add check for
From: Andrew Pinski
The function aarch64_evpc_ins would reuse the target even though
it might be the same register as the two inputs.
Instead of checking to see if we can reuse the target, creating
a new register always is better.
OK? Bootstrapped and tested on aarch64-linux-gnu with no regressi
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