ned-off-by: Yangyu Chen
---
gcc/config/riscv/riscv.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index f2dcb0db6fb..ca9a2ca81d5 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -346,7 +346,7
ons when there is no always_inline set.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_can_inline_p): New function.
(TARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P.
Signed-off-by: Yangyu Chen
---
gcc/config/riscv/riscv.cc | 135 ++
1 file cha
ute):
Allow functions with target_clones attribute to be inlined.
gcc/d/ChangeLog:
* d-attribs.cc (d_handle_target_clones_attribute):
Allow functions with target_clones attribute to be inlined.
Signed-off-by: Yangyu Chen
---
gcc/ada/gcc-interface/utils.cc | 5 +
gcc/c-family/
> On Oct 7, 2024, at 18:15, Kito Cheng wrote:
>
> Could you implement the latest API defined in the doc?
>
> struct {
> unsigned length;
> unsigned long long features[];
> } __riscv_feature_bits;
>
> struct {
> unsigned length;
> unsigned long long features[];
> } __riscv_vendor_feature_bits;
uld like to defer this until run-time resolver patch coming, but
> welcome to send another version of RFC patch :P
>
No worries. And I also provide a basic functional target_clones branch [2].
[2] https://github.com/cyyself/gcc/tree/rv_target_clones_20241007
>
> On Sun, Oct 6, 2024 a
/riscv/feature_bits.c: New.
* config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
Co-Developed-by: Yangyu Chen
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 403 +
libgcc/config/riscv/t-elf | 1 +
2 files changed, 404 insertions
Some architectures may use ',' in the attribute string, but it is not
used as the separator for different targets. To avoid conflict, we
introduce a new macro TARGET_FMV_ATTR_SEPARATOR to separate different
clones.
As an example, according to RISC-V C-API Specification [1], RISC-V allows
',' in th
Some architectures may use ',' in the attribute string, but it is not
used as the separator for different targets. To avoid conflict, we
introduce a new macro TARGET_CLONES_ATTR_SEPARATOR to separate different
clones.
As an example, according to RISC-V C-API Specification [1], RISC-V allows
',' in
> On Oct 15, 2024, at 20:11, Andrew Carlotti wrote:
>
> On Tue, Oct 15, 2024 at 02:18:43PM +0800, Yangyu Chen wrote:
>> Some architectures may use ',' in the attribute string, but it is not
>> used as the separator for different targets. To avoid confli
ure_bits.c (__init_riscv_features_bits_linux):
Remove __riscv_vendor_feature_bits.vendorID set when target is
not Linux, and initialize all data to zero when syscall is not
supported.
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 19 +++
1 file c
This patch can be dropped. I noticed Kito finally fixed that before committing
to master after I submitted this patch.
> On Oct 14, 2024, at 18:18, Yangyu Chen wrote:
>
> The feature_bits.c file failed to compile on non-Linux targets because
> we forgot t
plied extensions.
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/libgcc/config/riscv/feature_bits.c
b/libgcc/config/riscv/feature_bits.c
index 9bdbc466fee..a90e553b83d 100644
--- a/libgcc/config/
conditions by introducing a local variable to avoid load/store
operations during the computation of the feature bit.
libgcc/ChangeLog:
* config/riscv/feature_bits.c: New.
* config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
Co-Developed-by: Yangyu Chen
Signed-off-by: Yangyu Chen
all
> implication rule here...:P
>
>>
>> Would this be acceptable? If OK, I will fix the C->Zcd for RV64 only
>> and submit the next revision.
>
> Yes, fixing that and without introducing more implication rules is OK to me.
>
>>
>> Thanks,
>> Yangyu Chen
>>
> On Oct 14, 2024, at 12:32, Kito Cheng wrote:
>
> I prefer not to handle the extension implication rules, as it's easy
> for them to get out of sync, and this should be the linux kernel's
> responsibility rather than libgcc's.
>
I still prefer to handle the extension here since users may us
> On Sep 30, 2024, at 10:34, Yangyu Chen wrote:
>>
>>
>> On Sep 30, 2024, at 02:49, Jeff Law wrote:
>> On 9/9/24 6:11 AM, Yangyu Chen wrote:
>>> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V
>>> ISA. As a result, certain functio
> On Sep 30, 2024, at 02:49, Jeff Law wrote:
>
>
>
> On 9/9/24 6:11 AM, Yangyu Chen wrote:
>> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V
>> ISA. As a result, certain functions cannot be optimized with inlining
>> when specific optio
> On Sep 30, 2024, at 13:58, Kito Cheng wrote:
>
> Hi Yang-Yu:
>
>>
>> Specially, we can reproduce the result on BananaPi-F3 Hardware:
>>
>> Use this GCC branch with my patch:
>> https://github.com/cyyself/gcc/tree/rv_can_inline
>>
>> And compile the coremark on this branch:
>> https://git
that relies on target_clone support
on RISC-V, so I want a working target_clone GCC to work and want
to devote my time to it.
Thanks,
Yangyu Chen
>
> On Sun, Sep 29, 2024 at 11:20 PM Jeff Law wrote:
>>
>>
>>
>> On 9/29/24 3:16 AM, Yangyu Chen wrot
ARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P.
Signed-off-by: Yangyu Chen
---
gcc/common/config/riscv/riscv-common.cc | 372 +---
gcc/config/riscv/riscv-subset.h | 3 +
gcc/config/riscv/riscv.cc | 66 +
3 files changed, 276 insertions(+), 165 deletio
This patch implements the riscv_minimal_hwprobe_feature_bits feature
for the RISC-V target. The feature bits are defined in the previous
patch [1] to provide bitmasks of ISA extensions that defined in RISC-V
C-API. Thus, we need a function to generate the feature bits for IFUNC
resolver to dispatch
> On Oct 21, 2024, at 10:41, Kito Cheng wrote:
>
> Could you add testcases? Also, could you splitted that into smaller
> patches to make it easier to review?
>
Done!
Link: https://patchwork.sourceware.org/project/gcc/list/?series=39772
This patch implements the TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P for
RISC-V. This hook is used to process attribute
((target_version ("..."))).
Co-Developed-by: Hank Chang
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_option_valid_version_attribute_p): Declare.
(r
c-api.adoc#__attribute__targetattr-string
[2] https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85
[3]
https://patchwork.sourceware.org/project/glibc/patch/tencent_71d182fbda6e8e57b80731dd218d8d5c7...@qq.com/
Yangyu Chen (11):
Introduce TARGET_CLONES_ATTR_SEPARATOR for RISC-V
RIS
Some architectures may use ',' in the attribute string, but it is not
used as the separator for different targets. To avoid conflict, we
introduce a new macro TARGET_CLONES_ATTR_SEPARATOR to separate different
clones.
As an example, according to RISC-V C-API Specification [1], RISC-V allows
',' in
This patch splits static bool riscv_process_target_attr
(tree args, location_t loc) into two functions:
- bool riscv_process_target_attr (const char *args, location_t loc)
- static bool riscv_process_target_attr (tree args, location_t loc)
Thus, we can call `riscv_process_target_attr` with a `con
This patch implements the riscv_minimal_hwprobe_feature_bits feature
for the RISC-V target. The feature bits are defined in the previous
patch [1] to provide bitmasks of ISA extensions that defined in RISC-V
C-API. Thus, we need a function to generate the feature bits for IFUNC
resolver to dispatch
This patch implements TARGET_COMPARE_VERSION_PRIORITY and
TARGET_OPTION_FUNCTION_VERSIONS for RISC-V.
The TARGET_COMPARE_VERSION_PRIORITY is implemented to compare the
priority of two function versions based on the rules defined in the
RISC-V C-API Doc PR #85:
https://github.com/riscv-non-isa/ris
This patch adds the priority syntax parser to support the Function
Multi-Versioning (FMV) feature in RISC-V. This feature allows users to
specify the priority of the function version in the attribute syntax.
Chnages based on RISC-V C-API PR:
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85
This patch implements the TARGET_MANGLE_DECL_ASSEMBLER_NAME for RISC-V.
This is used to add function multiversioning suffixes to the assembler
name.
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_mangle_decl_assembler_name): New function.
(TARGET_MANGLE_DECL_ASSEMBLER_NAME)
Squashed to this:
https://patchwork.sourceware.org/project/gcc/patch/tencent_3b2442361b6df87e046fb4e71d55715d6...@qq.com/
> On Oct 16, 2024, at 02:16, Yangyu Chen wrote:
>
> Some architectures may use ',' in the attribute string, but it is not
> used as the separator for
This patch adds support for function multi-versioning to the RISC-V
using the target_clones and target_versions attributes, which follow
the RISC-V C-API Docs [1] and the existing proposal about priority
syntax [2].
This patch copies many codes from commit 0cfde688e213 ("[aarch64]
Add function mul
This patch adds test cases for the Function Multi-Versioning (FMV)
feature for RISC-V, which reuses the existing test cases from the
aarch64 and ported them to RISC-V.
gcc/testsuite/ChangeLog:
* g++.target/riscv/mv-symbols1.C: New test.
* g++.target/riscv/mv-symbols2.C: New test.
To ensure that the target_version attribute is applied after target
attributes.
gcc/ChangeLog:
* config/riscv/riscv-target-attr.cc
(riscv_option_valid_attribute_p): Reapply target_version
attribute after target attribute
---
gcc/config/riscv/riscv-target-attr.cc | 13
When the callee is versioned but the caller is not, we should not inline
the callee into the caller, to prevent the default version of the callee
from being inlined into a not versioned caller.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_can_inline_p): Refuse to inline
when call
This patch implements the TARGET_GENERATE_VERSION_DISPATCHER_BODY and
TARGET_GET_FUNCTION_VERSIONS_DISPATCHER for RISC-V. This is used to
generate the dispatcher function and get the dispatcher function for
function multiversioning.
This patch copies many codes from commit 0cfde688e213 ("[aarch64]
> On Oct 14, 2024, at 14:12, Kito Cheng wrote:
>
> On Mon, Oct 14, 2024 at 1:40 PM Yangyu Chen
> wrote:
>>
>>> On Oct 14, 2024, at 12:32, Kito Cheng wrote:
>>>
>>> I prefer not to handle the extension implication rules, as it's easy
>&
:
* config/riscv/feature_bits.c: New.
* config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
Co-Developed-by: Yangyu Chen
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 420 +
libgcc/config/riscv/t-elf | 1 +
2 files changed
We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When
building with LTO, the linker cannot find the
__init_cpu_features_resolver.lto_priv* symbol, causing the link error.
This patch gets this fixed by adding DECL_EXTERNAL to the decl. To avoid used
but never defined warning f
: 0cfde688e213 ("[aarch64] Add function multiversioning support")
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/aarch64/aarch64.cc (dispatch_function_versions): Adding
DECL_EXTERNAL, TREE_PUBLIC and hidden DECL_VISIBILITY to
__init_cpu_features_resolver and
On 10/31/24 21:26, Kito Cheng wrote:
On Thu, Oct 31, 2024 at 6:59 PM Yangyu Chen wrote:
On Oct 31, 2024, at 18:14, Kito Cheng wrote:
diff --git a/gcc/config/riscv/riscv-target-attr.cc
b/gcc/config/riscv/riscv-target-attr.cc
index 087fbae77b0..4c85ad60b72 100644
--- a/gcc/config/riscv
Ping and also CC Jeff and Kito. This is also useful for RISC-V since
RISC-V uses target_version, which defines
TARGET_HAS_FMV_TARGET_ATTRIBUTE to zero.
On 10/28/24 00:00, Yangyu Chen wrote:
Following the implementation of commit b8ce8129a5 ("Redirect call
within specific target attr
3cRNDuSNp58Tgpt=pzm4dg...@mail.gmail.com/
[5]
https://inbox.sourceware.org/gcc-patches/tencent_fd68a30bdf936092b6a663146e634c76c...@qq.com/
[6]
https://inbox.sourceware.org/gcc-patches/tencent_a646c713dc9218dd10ca460ebe074153e...@qq.com/
[7]
https://patchwork.sourceware.org/project/gcc/patch/tencent_
the separator,
since '#' is not allowed in the target_clones option string.
[1]
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/c6c5d6d9cf96b342293315a5dff3d25e96ef8191/src/c-api.adoc#__attribute__targetattr-string
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* defaults.
This patch adds test cases for the Function Multi-Versioning (FMV)
feature for RISC-V, which reuses the existing test cases from the
aarch64 and ported them to RISC-V.
Signed-off-by: Yangyu Chen
gcc/testsuite/ChangeLog:
* g++.target/riscv/mv-symbols1.C: New test.
* g++.target
g to allow the FMV dispatcher to work correctly on older
kernels.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(RISCV_EXT_BITMASK): New macro.
(struct riscv_ext_bitmask_table_t): New struct.
(riscv_minimal_hwprobe_feature_bits): Ne
/85
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv-target-attr.cc
(riscv_target_attr_parser::handle_priority): New function.
(riscv_target_attr_parser::update_settings): Update priority
attribute.
* config/riscv/riscv.opt: Add TargetVariable
This patch implements the TARGET_MANGLE_DECL_ASSEMBLER_NAME for RISC-V.
This is used to add function multiversioning suffixes to the assembler
name.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_mangle_decl_assembler_name): New function
reuses the code
in TARGET_COMPARE_VERSION_PRIORITY and check it returns 0, which means
the equal priority.
Co-Developed-by: Hank Chang
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc
(parse_features_for_version): New function.
(compare_fmv_features
ent in the dispatcher function.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc (add_condition_to_bb): New function.
(dispatch_function_versions): New function.
(get_suffixed_assembler_name): New function.
(make_resolver_func): Ne
et_version"
for function versioning.
Co-Developed-by: Hank Chang
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_process_target_attr): Remove as it is not used.
(riscv_option_valid_version_attribute_p): Declare.
(riscv_process
> On Oct 30, 2024, at 19:59, Richard Sandiford
> wrote:
>
> Yangyu Chen writes:
>> We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When
>> building with LTO, the linker cannot find the
>> __init_cpu_features_resolver.lto_priv*
: Yangyu Chen
gcc/ChangeLog:
* config/riscv/predicates.md: Use flag_plt instead of TARGET_PLT.
* config/riscv/riscv.opt: alias common option fplt to mplt.
---
gcc/config/riscv/predicates.md | 2 +-
gcc/config/riscv/riscv.opt | 4 ++--
2 files changed, 3 insertions(+), 3 deletions
after checking all the callers for
target_option,valid_attribute_p, I see that this case is already being
handled, so it dropped.
On Thu, Oct 24, 2024 at 3:15 PM Yangyu Chen wrote:
To ensure that the target_version attribute is applied after target
attributes.
gcc/ChangeLog
the separator,
since '#' is not allowed in the target_clones option string.
[1]
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/c6c5d6d9cf96b342293315a5dff3d25e96ef8191/src/c-api.adoc#__attribute__targetattr-string
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* defaults.
m/
[6]
https://inbox.sourceware.org/gcc-patches/tencent_a646c713dc9218dd10ca460ebe074153e...@qq.com/
[7]
https://patchwork.sourceware.org/project/gcc/patch/tencent_f08be088f6b1e3152e508c63c870e31cd...@qq.com/
Yangyu Chen (8):
Introduce TARGET_CLONES_ATTR_SEPARATOR for RISC-V
RISC-V: Implement Priority synt
/85
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv-target-attr.cc
(riscv_target_attr_parser::handle_priority): New function.
(riscv_target_attr_parser::update_settings): Update priority
attribute.
* config/riscv/riscv.opt: Add TargetVariable
ent in the dispatcher function.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc (add_condition_to_bb): New function.
(dispatch_function_versions): New function.
(get_suffixed_assembler_name): New function.
(make_resolver_func): Ne
g to allow the FMV dispatcher to work correctly on older
kernels.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(RISCV_EXT_BITMASK): New macro.
(struct riscv_ext_bitmask_table_t): New struct.
(riscv_minimal_hwprobe_feature_bits): Ne
reuses the code
in TARGET_COMPARE_VERSION_PRIORITY and check it returns 0, which means
the equal priority.
Co-Developed-by: Hank Chang
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc
(parse_features_for_version): New function.
(compare_fmv_features
et_version"
for function versioning.
Co-Developed-by: Hank Chang
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_process_target_attr): Remove as it is not used.
(riscv_option_valid_version_attribute_p): Declare.
(riscv_process
This patch implements the TARGET_MANGLE_DECL_ASSEMBLER_NAME for RISC-V.
This is used to add function multiversioning suffixes to the assembler
name.
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_mangle_decl_assembler_name): New function
This patch adds test cases for the Function Multi-Versioning (FMV)
feature for RISC-V, which reuses the existing test cases from the
aarch64 and ported them to RISC-V.
Signed-off-by: Yangyu Chen
gcc/testsuite/ChangeLog:
* g++.target/riscv/mv-symbols1.C: New test.
* g++.target
We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When
building with LTO, the linker cannot find the
__init_cpu_features_resolver.lto_priv* symbol, causing the link error.
This patch get this fixed by adding DECL_EXTERNAL to the decl. To avoid used but
never defined warning fo
Following the implementation of commit b8ce8129a5 ("Redirect call
within specific target attribute among MV clones (PR ipa/82625)"),
we can now optimize calls by invoking a versioned function callee
from a caller that shares the same target attribute. However, on
targets that define TARGET_HAS_FMV_
Following the implementation of commit b8ce8129a5 ("Redirect call
within specific target attribute among MV clones (PR ipa/82625)"),
we can now optimize calls by invoking a versioned function callee
from a caller that shares the same target attribute. However, on
targets that define TARGET_HAS_FMV_
We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When
building with LTO, the linker cannot find the
__init_cpu_features_resolver.lto_priv* symbol, causing the link error.
This patch get this fixed by adding DECL_EXTERNAL to the decl.
Minimal steps to reproduce the bug:
echo
On 2024/10/24 15:13, Yangyu Chen wrote:
This patch implements the TARGET_GENERATE_VERSION_DISPATCHER_BODY and
TARGET_GET_FUNCTION_VERSIONS_DISPATCHER for RISC-V. This is used to
generate the dispatcher function and get the dispatcher function for
function multiversioning.
This patch copies
The target-attr-norelax.c testcase was failing due to the redundant "\t"
check in the assembly output, and forgot to skip the check for lto build
in the testcase.
Signed-off-by: Yangyu Chen
gcc/testsuite/ChangeLog:
* gcc.target/riscv/target-attr-norelax.c: Fix testcase
Sorry for the wrong address CC to Yulong.
And this should add fixes:
Fixes: 4bee5252c1de ("RISC-V: Add norelax function attribute")
x27;s safe to use logical and to combine them.
Co-Developed-by: Liao Shihua
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/predicates.md: deprecates mplt option.
* config/riscv/riscv.opt: allow -fno-plt to disable PLT.
---
gcc/config/riscv/predicates.md | 3 ++-
gcc/c
> On Oct 31, 2024, at 18:14, Kito Cheng wrote:
>
>> diff --git a/gcc/config/riscv/riscv-target-attr.cc
>> b/gcc/config/riscv/riscv-target-attr.cc
>> index 087fbae77b0..4c85ad60b72 100644
>> --- a/gcc/config/riscv/riscv-target-attr.cc
>> +++ b/gcc/config/riscv/riscv-target-attr.cc
>> @@ -239,1
NC resolver.
> so I guess we need to make riscv_target_attr_parser able to
> distinguish target and target_version? maybe add an extra argument to
> riscv_target_attr_parser?
I think so if it really needed.
>
> On Thu, Oct 24, 2024 at 3:12 PM Yangyu Chen wrote:
>>
>&
discussion, a possible solution might be to refuse the
relax for the IFUNC resolvers and its callees. Thus, we don’t require
gp to access global variables like __riscv_feature_bits.
I came up with a solution that adds an attribute like
__attribute__((norelax)) to functional like -mno-relax for a specific
function to both the FMV resolver gimple function and the libgcc
source code which will be called from FMV resolver.
Would this solution be acceptable?
Thanks,
Yangyu Chen
The comment of the final endif in hosthooks.h is wrong, it should be
GCC_HOST_HOOKS_H instead of GCC_LANG_HOOKS_H.
gcc/ChangeLog:
* hosthooks.h (struct host_hooks): Fix GCC_HOST_HOOKS_H typo.
Signed-off-by: Yangyu Chen
---
gcc/hosthooks.h | 2 +-
1 file changed, 1 insertion(+), 1
Good job. I'm currently working on RISC-V target_clone and
target_versions support in GCC and found this patch is needed as my
prerequisite.
However, I found this tagged as "dropped" on Patchwork. What happened?
> On Sep 18, 2024, at 23:36, Andrew Carlotti wrote:
>
> On Wed, Sep 18, 2024 at 09:46:15AM +0100, Richard Sandiford wrote:
>> Yangyu Chen writes:
>>> I recently found that target_clones functions cannot inline even when
>>> the caller has exactly the sam
ARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P.
Signed-off-by: Yangyu Chen
---
gcc/common/config/riscv/riscv-common.cc | 370 +---
gcc/config/riscv/riscv-subset.h | 3 +
gcc/config/riscv/riscv.cc | 59
3 files changed, 267 insertions(+), 165 deletio
> On Sep 18, 2024, at 16:46, Richard Sandiford
> wrote:
>
> Yangyu Chen writes:
>> I recently found that target_clones functions cannot inline even when
>> the caller has exactly the same target. However, if we only use target
>> attributes in C++ and let the
Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V
ISA. As a result, certain functions cannot be optimized with inlining
when specific options, such as __attribute__((target("arch=+v"))) .
This can lead to potential performance issues when building
retargetable binaries for RISC-V.
T
/feature_bits.c: New.
* config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
Co-Developed-by: Yangyu Chen
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 364 +
libgcc/config/riscv/t-elf | 1 +
2 files changed, 365 insertions(+)
create mode
.
libgcc/ChangeLog:
* config/riscv/feature_bits.c: New.
* config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
Co-Developed-by: Yangyu Chen
Signed-off-by: Yangyu Chen
---
libgcc/config/riscv/feature_bits.c | 364 +
libgcc/config/riscv/t-elf | 1
Thanks for doing this!
> On Nov 8, 2024, at 00:19, shiyul...@iscas.ac.cn wrote:
>
> From: yulong
>
> This patch adds norelax function attribute that be discussed in
> riscv-c-api-doc PR#94.
> URL:https://github.com/riscv-non-isa/riscv-c-api-doc/pull/94
>
> gcc/ChangeLog:
>
>* config/
iscv-c-api-doc/pull/85
[3]
https://patchwork.sourceware.org/project/glibc/patch/tencent_71d182fbda6e8e57b80731dd218d8d5c7...@qq.com/
Yangyu Chen (11):
Introduce TARGET_CLONES_ATTR_SEPARATOR for RISC-V
RISC-V: Split riscv_process_target_attr with const char *args argument
RISC-V: Implement P
Some architectures may use ',' in the attribute string, but it is not
used as the separator for different targets. To avoid conflict, we
introduce a new macro TARGET_CLONES_ATTR_SEPARATOR to separate different
clones.
As an example, according to RISC-V C-API Specification [1], RISC-V allows
',' in
This patch adds the priority syntax parser to support the Function
Multi-Versioning (FMV) feature in RISC-V. This feature allows users to
specify the priority of the function version in the attribute syntax.
Chnages based on RISC-V C-API PR:
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85
This patch splits static bool riscv_process_target_attr
(tree args, location_t loc) into two functions:
- bool riscv_process_target_attr (const char *args, location_t loc)
- static bool riscv_process_target_attr (tree args, location_t loc)
Thus, we can call `riscv_process_target_attr` with a `con
To ensure that the target_version attribute is applied after target
attributes.
gcc/ChangeLog:
* config/riscv/riscv-target-attr.cc
(riscv_option_valid_attribute_p): Reapply target_version
attribute after target attribute
---
gcc/config/riscv/riscv-target-attr.cc | 13
v-ext-bitmask.def
@@ -0,0 +1,83 @@
+/* RISC-V Extension Bitmask Definitions, corresponding to Extension Bitmask
+ Definitions in RISC-V C API Specification.
+ Copyright (C) 2024 Free Software Foundation, Inc.
+ Contributed by Yangyu Chen (c...@cyyself.name).
+
+This file is part of GCC.
+
+
This patch implements the TARGET_MANGLE_DECL_ASSEMBLER_NAME for RISC-V.
This is used to add function multiversioning suffixes to the assembler
name.
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_mangle_decl_assembler_name): New function.
(TARGET_MANGLE_DECL_ASSEMBLER_NAME)
This patch implements TARGET_COMPARE_VERSION_PRIORITY and
TARGET_OPTION_FUNCTION_VERSIONS for RISC-V.
The TARGET_COMPARE_VERSION_PRIORITY is implemented to compare the
priority of two function versions based on the rules defined in the
RISC-V C-API Doc PR #85:
https://github.com/riscv-non-isa/ris
This patch implements the TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P for
RISC-V. This hook is used to process attribute
((target_version ("..."))).
Co-Developed-by: Hank Chang
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_option_valid_version_attribute_p): Declare.
(r
This patch adds test cases for the Function Multi-Versioning (FMV)
feature for RISC-V, which reuses the existing test cases from the
aarch64 and ported them to RISC-V.
gcc/testsuite/ChangeLog:
* g++.target/riscv/mv-symbols1.C: New test.
* g++.target/riscv/mv-symbols2.C: New test.
When the callee is versioned but the caller is not, we should not inline
the callee into the caller, to prevent the default version of the callee
from being inlined into a not versioned caller.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_can_inline_p): Refuse to inline
when call
This patch implements the TARGET_GENERATE_VERSION_DISPATCHER_BODY and
TARGET_GET_FUNCTION_VERSIONS_DISPATCHER for RISC-V. This is used to
generate the dispatcher function and get the dispatcher function for
function multiversioning.
This patch copies many codes from commit 0cfde688e213 ("[aarch64]
re. I’ve also been testing these patches recently since one of my research
works relies on this.
FYI, there is a v3 version now.
Link: https://patchwork.sourceware.org/project/gcc/list/?series=39863&state=*
Thanks,
Yangyu Chen
> On Mon, Oct 21, 2024 at 11:57 AM Yangyu Chen wrote:
>>
Ping again.
On 11/5/24 11:37, Yangyu Chen wrote:
Ping and also CC Jeff and Kito. This is also useful for RISC-V since
RISC-V uses target_version, which defines
TARGET_HAS_FMV_TARGET_ATTRIBUTE to zero.
On 10/28/24 00:00, Yangyu Chen wrote:
Following the implementation of commit b8ce8129a5
-off-by: Yangyu Chen
gcc/ChangeLog:
* config/riscv/riscv-feature-bits.h (RISCV_VENDOR_FEATURE_BITS_LENGTH):
Drop.
(struct riscv_vendor_feature_bits): Drop.
libgcc/ChangeLog:
* config/riscv/feature_bits.c (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop
("RISC-V: Minimal support for svvptc extension.")
Signed-off-by: Yangyu Chen
gcc/ChangeLog:
* common/config/riscv/riscv-ext-bitmask.def (RISCV_EXT_BITMASK): Remove
svvptc.
---
gcc/common/config/riscv/riscv-ext-bitmask.def | 1 -
1 file changed, 1 deletion(-)
diff --git a/
subext, MASK_ZCLSD),
>>
>> RISCV_EXT_FLAG_ENTRY ("svinval", x_riscv_sv_subext, MASK_SVINVAL),
>> RISCV_EXT_FLAG_ENTRY ("svnapot", x_riscv_sv_subext, MASK_SVNAPOT),
>> diff --git a/gcc/common/config/riscv/riscv-ext-bitmask.def
>> b/gcc/common/
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