[Patch, AArch64, AArch64-4.7] Map scalar types in arm_neon.h to standard types.

y and needless to say it was broken till now anyway. Tested for aarch64-none-elf. OK for trunk and aarch64-4.7-branch? Thanks, Tejas Belagod ARM. Changelog: 2013-01-18 Tejas Belagod gcc/ * config/aarch64/arm_neon.h: Map scalar types to standard types.diff --git a/gcc/config/aarch64/arm_n

Re: Re: [PING][PATCH][RFC] Bug handling SUBREG (MEM) - MEM having side-effects?

Hi, Could you please let me know if this is OK for 4.7 as this bug shows up on 4.7 but seems to be latent on trunk? I'd like to get this in before the release. Thanks, Tejas Belagod ARM. Tejas Belagod wrote: PING. Tejas Belagod wrote: Richard Sandiford wrote: After the discus

Re: [PATCH, RFC] Re-work find_reloads_subreg_address (Re: [PATCH][RFC, Reload]. Reload bug?)

Tejas Belagod wrote: Ulrich Weigand wrote: The following patch implements this idea; it passes a basic regression test on arm-linux-gnueabi. (Obviously this would need a lot more testing on various platforms before getting into mainline ...) Can you have a look whether this fixes the problem

[Patch][AArch64] Expand binary operations' constant operands for neon intrinsics.

Hi, This patch expands an Advanced SIMD intrinsic's operand into a constant operand only if the predicate allows it. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod ARM. Changelog 2012-09-10 Tejas Belagod gcc/ * config/aarch64/aarc

[Patch][AArch64] Split a move of Q-reg vectors contained in general regs.

Hi, This patch fixes the mov pattern to split a move between general regs that contain a Q-reg vector value. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod ARM. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64/aarch64-simd.md

[Patch][AArch64] Tighten predicate for CMP pattern.

Hi, This patch tightens the predicate for the CMP pattern. It makes it restrictive to accept reg or zero as prescribed by the architecture. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod ARM. PS: This patch applies over vldn-vstn.txt sent out earlier

[Patch][AArch64] Move immediate into Advanced SIMD scalar.

Hi, This patch adds support for move an immediate DImode value into an AdvSIMD scalar D register. i.e. movi Dd, #imm. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod. ARM. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64/aarch64

[Patch][AArch64] Fix vfmaq_lane_f64.

Hi, This patch fixes vfmaq_lane_f64 () AdvSIMD intrinsic. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod. ARM. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64/arm_neon.h (vfmaq_lane_f64): Fix prototype and assembler template

[Patch][AArch64] Implement vmovq_n_f64.

Hi, This patch adds the missing intrinsic vmovq_n_f64(). OK? Thanks, Tejas Belagod ARM. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64/arm_neon.h (vmovq_n_f64): Add.diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index e7dadf9..cf8b676 100644

[Patch][AArch64] Fix Narrowing high shifts.

Hi, The attached patch has fixes to assembler templates for rshrn2 and shrn2. OK? Thanks, Tejas Belagod. ARM. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64/arm_neon.h (vrshrn_high_n_s16, vrshrn_high_n_s32, vrshrn_high_n_s64, vrshrn_high_n_u16, vrshrn_high_n_u32

[Patch][AArch64] Implement TARGET_SHIFT_TRUNCATION_MASK.

Hi, The attached patch implements TARGET_SHIFT_TRUNCATION_MASK target hook. Regression-tested on aarch64-none-elf. OK for aarch64-branch? Thanks, Tejas Belagod ARM. PS: This patch applies over vldn-vstn.txt sent earlier. Changelog: 2012-09-10 Tejas Belagod gcc/ * config/aarch64

[PATCH][AARCH64]: Add missing AdvSIMD intrinsics - vmlsq_laneq_*.

Hi, This patch adds missing AdvSIMD intrinsics vmlsq_laneq_<16,32> to arm_neon.h. OK? Thanks, Tejas Belagod ARM. Changelog: 2012-06-14 Tejas Belagod gcc/ * config/aarch64/arm_neon.h (vmlsq_laneq_f32, vmlsq_laneq_s16, vmlsq_laneq_u16, vmlsq_laneq_s32, vmlsq_lan

[PATCH][AARCH64]: Remove vpadd_f64 from arm_neon.h.

Hi, This patch removes vpadd_f64 from arm_neon.h because the definition is incorrect and it should be vpaddq_f64 which is defined elsewhere in the same header. OK? Thanks, Tejas. Changelog: 2012-06-14 Tejas Belagod gcc/ * config/aarch64/arm_neon.h (vpadd_f64): Remove.diff --git

[PATCH][AARCH64]: Invent new regclass - FP low regs.

Hi, The attached patch invents a new register class V0 - V15 that is needed for some lane variants of AdvSIMD instructions that can only take V0 - V15 as their indexed register when working on half-word type. Regression tests are happy. OK? Thanks, Tejas Belagod. ARM. Changelog: 2012-06

Re: [PATCH, GCC][AArch64] Use Enums for code models option selection

Marcus Shawcroft wrote: On 13/06/12 14:38, Sofiane Naci wrote: Hi, I discovered a bug in my previous patch, so I attach a new one. The ChangeLog hasn't changed. OK to commit? Thanks Sofiane -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]

Re: [PATCH, GCC][AArch64] Use Enums for TLS dialect option selection

Marcus Shawcroft wrote: On 01/06/12 09:56, Sofiane Naci wrote: Hi, This patch re-factors TLS dialect option selection in the AArch64 port to use the generic support for enumerated option arguments. Thanks Sofiane - 2012-06-01 Sofiane Naci [AArch64] Use Enums for TLS option sele

Re: [PATCH, GCC DOC][AArch64] Fix layout in AArch64 target-specific documentation

Marcus Shawcroft wrote: On 11/06/12 09:54, Sofiane Naci wrote: (-march and -mcpu feature modifiers): New subsubsection. Copy and paste subsub? /Marcus I've fixed up the typo in the CHangelog and checked this in on aarch64-branch for Sofiane. Tejas.

Re: [AArch64] Use snprintf instead sprintf

Marcus Shawcroft wrote: On 01/06/12 09:53, Sofiane Naci wrote: Hi, This patch replaces instances of sprintf with snprintf with sizeof(..) in the AArch64 port. It also fixes layout issues in the code it touches. Thanks Sofiane - ChangeLog 2012-06-01 Sofiane Naci [AArch64] Repla

Re: [PATCH, GCC][AArch64] Update LINK_SPEC

Marcus Shawcroft wrote: On 14/06/12 13:24, Sofiane Naci wrote: Hi, This patch updates LINK_SPEC in the AArch64 port. Thanks Sofiane - 2012-06-14 Sofiane Naci [AArch64] Update LINK_SPEC. * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Remove %{version

Re: [PATCH, GCC][AArch64] Use Enums for code models option selection

Tejas Belagod wrote: Marcus Shawcroft wrote: On 13/06/12 14:38, Sofiane Naci wrote: Hi, I discovered a bug in my previous patch, so I attach a new one. The ChangeLog hasn't changed. OK to commit? Thanks Sofiane -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailt

[PATCH][RFC, Reload]. Reload bug?

Thanks, Tejas Belagod. ARM. Changelog: 2012-06-28 Tejas Belagod gcc/ * reload.c (find_reloads_toplev): Include the subreg byte in the address of memrefs when converting subregs of mems into narrower memrefs.diff --git a/gcc/reload.c b/gcc/reload.c index e42cc5c..b6d4ce9 100

Re: [PATCH][RFC, Reload]. Reload bug?

Ulrich Weigand wrote: Tejas Belagod wrote: Therefore strict_memory_address_addr_space_P () thinks that (mem:OI (reg sp)) is a valid target address and lets it pass as a subreg and does not narrow the subreg into a narrower memref. find_reloads_toplev () should have infact given

Re: [PATCH][RFC, Reload]. Reload bug?

Tejas Belagod wrote: Ulrich Weigand wrote: Tejas Belagod wrote: Therefore strict_memory_address_addr_space_P () thinks that (mem:OI (reg sp)) is a valid target address and lets it pass as a subreg and does not narrow the subreg into a narrower memref. find_reloads_toplev () should have infact

Re: [PATCH, RFC] Re-work find_reloads_subreg_address (Re: [PATCH][RFC, Reload]. Reload bug?)

eeing? Sorry for the delay in replying. Thanks for the patch. I tried this patch - it doesn't seem to reach as far as cleanup_subreg_operands (), but fails an assertion in push_reload () in reload.c:1307. I'm currently investigating this and will let you know the reason soon. Thanks, Tej

Re: [AARCH64] [PATCH 3/3] AArch64 Port

Hi Richard, Thanks for your comments. Some questions inline below. Richard Sandiford wrote: Marcus Shawcroft writes: This patch adds an implementation of integer iterators. Nice. A few comments from an onlooker (on top of what Stephen said). +/* Since GCC does not construct a table of v

Re: [AARCH64] [PATCH 3/3] AArch64 Port

Richard Sandiford wrote: Tejas Belagod writes: Hi Richard, Thanks for your comments. Some questions inline below. Richard Sandiford wrote: Marcus Shawcroft writes: This patch adds an implementation of integer iterators. Nice. A few comments from an onlooker (on top of what Stephen said

Re: RFA: Alternative iterator implementation

(struct map_value **mode if (strcmp (name.string, "nil") == 0) return_rtx = NULL; else -return_rtx = read_rtx_code (name.string, mode_maps); + return_rtx = read_rtx_code (name.string); c = read_skip_spaces (); if (c != ')') @@ -1115,7 +1081,7 @@ read_nested_

Re: RFA: Alternative iterator implementation

Richard Sandiford wrote: Thanks for the update. Tejas Belagod writes: +/* Implementations of the iterator_group callbacks for ints. */ + +/* Since GCC does not construct a table of valid constants, + we have to accept any int as valid. No cross-checking can + be done. */ + +static int

[PATCH v2 07/12] libgomp, AArch64: Test OpenMP user-defined reductions with SVE types.

This patch tests user-defined reductions on various constructs with objects of SVE type. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/udr-sve.c: New. --- .../libgomp.target/aarch64/udr-sve.c | 108 ++ 1 file changed, 108 insertions(+) create mode 100644

[PATCH v2 01/12] OpenMP/PolyInt: Pass poly-int structures by address to OMP libs.

Currently poly-int type structures are passed by value to OpenMP runtime functions for shared clauses etc. This patch improves on this by passing around poly-int structures by address to avoid copy-overhead. gcc/ChangeLog * omp-low.c (use_pointer_for_field): Use pointer if the OMP data

[PATCH v2 03/12] [tree] Add function to strip pointer type and get down to the actual pointee type.

Add a function to traverse down the pointer layers to the pointee type. gcc/ChangeLog: * tree.h (strip_pointer_types): New. --- gcc/tree.h | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/tree.h b/gcc/tree.h index 75efc760a16..e2b4dd36444 100644 --- a/gcc/tree.h +++ b/gcc/

[PATCH v2 10/12] AArch64: Diagnose OpenMP linear clause for SVE type objects.

This patch tests if SVE object types if applied to linear clause is diagnosed as expected. gcc/testsuite/ChangeLog * gcc.target/aarch64/sve/omp/linear.c: New test. --- .../gcc.target/aarch64/sve/omp/linear.c | 85 +++ 1 file changed, 85 insertions(+) create mode 10

[PATCH v2 06/12] libgomp, AArch64: Test OpenMP threadprivate clause on SVE type.

This patch adds a test for ensuring threadprivate clause works for SVE type objects. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/threadprivate.c: New test. --- .../libgomp.target/aarch64/threadprivate.c| 48 +++ 1 file changed, 48 insertions(+) create mode

[PATCH v2 11/12] libgomp, AArch64: Test OpenMP depend clause and its variations on SVE types

This patch adds a test to test depend clause and its various dependency variations with SVE type objects. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/depend-1.c: New. --- .../libgomp.target/aarch64/depend-1.c | 223 ++ 1 file changed, 223 insertions(+)

[PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

ross is mainly supported for scalars and loop iteration variables. We diagnose cases where SVE ACLE objects are used in doacross list items. Tejas Belagod (12): OpenMP/PolyInt: Pass poly-int structures by address to OMP libs. libgomp, AArch64: Add test cases for SVE types in OpenMP shared c

[PATCH v2 12/12] AArch64: Diagnose SVE type objects when applied to OpenMP doacross clause.

This patch tests if SVE type objects when applied to doacross clause are correctly diagnosed. gcc/testsuite/ChangeLog * gcc.target/aarch64/sve/omp/doacross.c: New test. --- .../gcc.target/aarch64/sve/omp/doacross.c | 22 +++ 1 file changed, 22 insertions(+) create mo

[PATCH v2 05/12] libgomp, AArch64: Test OpenMP lastprivate clause for various constructs.

This patch tests various OpenMP lastprivate clause with SVE object types in various construct contexts. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/omp/lastprivate.c: New test. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/lastprivate.c: New test. --- .../gcc.targ

[PATCH v2 02/12] libgomp, AArch64: Add test cases for SVE types in OpenMP shared clause.

This patch adds a test scaffold for OpenMP compile tests in under the gcc.target testsuite. It also adds a target tests directory libgomp.target along with an SVE execution test gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/omp/gomp.exp: New scaffold. libgomp/ChangeLog: * t

[PATCH v2 04/12] AArch64: Diagnose OpenMP offloading when SVE types involved.

The target clause in OpenMP is used to offload loop kernels to accelarator peripeherals. target's 'map' clause is used to move data from and to the accelarator. When the data is SVE type, it may not be suitable because of various reasons i.e. the two SVE targets may not agree on vector size or so

[PATCH v2 08/12] libgomp, AArch64: Test OpenMP uniform clause on SVE types.

This patch tests if simd uniform clause works with SVE types in simd regions. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/simd-uniform.c: New. --- .../libgomp.target/aarch64/simd-uniform.c | 83 +++ 1 file changed, 83 insertions(+) create mode 100644 libgomp

Re: [PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

Hi Jakub, Just wanted to add that I'm sorry for the delay in respinning the patchset - I was caught up with another piece of work. Thanks for the reviews so far and thank you for your patience. Thanks, Tejas. On 10/18/24 11:52 AM, Tejas Belagod wrote: The following patch series is rew

Re: [Ping][PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

Ping. Thanks, Tejas. On 10/18/24 11:59 AM, Tejas Belagod wrote: Hi Jakub, Just wanted to add that I'm sorry for the delay in respinning the patchset - I was caught up with another piece of work. Thanks for the reviews so far and thank you for your patience. Thanks, Tejas. On 10/18/

Re: [PATCH 07/10] aarch64: Add testcase for C/C++ ops on SVE ACLE types.

On 11/7/24 4:52 PM, Richard Sandiford wrote: Tejas Belagod writes: This patch adds a test case to cover C/C++ operators on SVE ACLE types. This does not cover all types, but covers most representative types. gcc/testsuite: * gcc.target/aarch64/sve/acle/general/cops.c: New test

[PATCH 09/10] c: Fix bounds checking for VLA and construct VLA vector constants

This patch adds support for checking bounds of SVE ACLE vector initialization constructors. It also adds support to construct vector constant from init constructors. gcc/ChangeLog: * c/c-typeck.cc (process_init_element): Add check to restrict constructor length to the minimum vec

[PATCH 01/10] aarch64: Fix ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS

This patch enables ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS to indicate that C/C++ language operations are available natively on SVE ACLE types. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define __ARM_FEATURE_SVE_VECTOR_OPERATORS. --- gcc/con

[PATCH 10/10] cp: Fix another assumption in the FE about constant vector indices.

This patch adds a change to handle VLA's poly indices. gcc/ChangeLog: * cp/decl.cc (reshape_init_array_1): Handle poly indices. gcc/testsuite/ChangeLog: * g++.dg/ext/sve-sizeless-1.C: Update test to test initialize error. * g++.dg/ext/sve-sizeless-2.C: Likewise. --- gcc

[PATCH 07/10] aarch64: Add testcase for C/C++ ops on SVE ACLE types.

This patch adds a test case to cover C/C++ operators on SVE ACLE types. This does not cover all types, but covers most representative types. gcc/testsuite: * gcc.target/aarch64/sve/acle/general/cops.c: New test. --- .../aarch64/sve/acle/general/cops.c | 570 ++

[PATCH 03/10] c: Range-check indexing of SVE ACLE vectors

This patch adds a check for non-GNU vectors to warn that the index is outside the range of a fixed vector size. For VLA vectors, we don't diagnose. gcc/ChangeLog: * c-family/c-common.cc (convert_vector_to_array_for_subscript): Add range-check for target vector types. --- gcc/c-f

[PATCH 06/10] rtl: Validate subreg info when optimizing vec_select.

When optimizing for NOPs in case of overlapping regs in VEC_SELECT expressions, validate subreg data before using simplify_subreg_regno. There is no real SUBREG rtx here, but a pseudo subreg call to check if subregs are possible. gcc/ChangeLog: * rtlanal.cc (set_noop_p): Validate subreg

[PATCH 05/10] c: Fix an assumption that vectors sizes are known at compile-time.

There is an assumption in many places in c-typeck.cc that GNU vectors sizes are always known at compile time. SVE vectors now piggy-back on GNU vector code so this patch changes one of the places where there is an assumption of vectors being fixed-length to being variable width. gcc/ChangeLog:

[PATCH 02/10] aarch64: Make C/C++ operations possible on SVE ACLE types.

This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU vectors and have the same semantics with operations that are defined on GNU vectors. gcc/ChangeLog: * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Flip TYPE_INDIVISBL

[PATCH 04/10] gimple: Disallow sizeless types in BIT_FIELD_REFs.

Ensure sizeless types don't end up trying to be canonicalised to BIT_FIELD_REFs. gcc/ChangeLog: * gimple-fold.cc (maybe_canonicalize_mem_ref_addr): Disallow sizeless types in BIT_FIELD_REFs. --- gcc/gimple-fold.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --gi

[PATCH 08/10] aarch64: Update SVE ACLE tests

This patch updates existing SVE ACLE tests to expect new behaviour wrt SVE ACLE types, GNU vectors and C/C++ operations. testsuite/ChangeLog: * gcc.target/aarch64/sve/acle/general-c/gnu_vectors_1.c: Update test. * gcc.target/aarch64/sve/acle/general-c/gnu_vectors_2.c: Likewise.

Re: [PATCH 04/10] gimple: Disallow sizeless types in BIT_FIELD_REFs.

On 11/7/24 2:36 PM, Richard Biener wrote: On Thu, Nov 7, 2024 at 8:25 AM Tejas Belagod wrote: On 11/6/24 6:02 PM, Richard Biener wrote: On Wed, Nov 6, 2024 at 12:49 PM Tejas Belagod wrote: Ensure sizeless types don't end up trying to be canonicalised to BIT_FIELD_REFs. You mean var

Re: [PATCH 04/10] gimple: Disallow sizeless types in BIT_FIELD_REFs.

On 11/6/24 6:02 PM, Richard Biener wrote: On Wed, Nov 6, 2024 at 12:49 PM Tejas Belagod wrote: Ensure sizeless types don't end up trying to be canonicalised to BIT_FIELD_REFs. You mean variable-sized? But don't we know, when there's a constant array index, that the size is a

[PATCH 00/10] aarch64: Enable C/C++ operations on SVE ACLE types.

outstanding fail as is - the test where an address is taken of an SVE vector element. I'm not sure what the behaviour should be here. Otherwise regression tested and bootstrapped on aarch64-linux-gnu. Bootstrapped on x86-linux-gnu. OK for trunk? Thanks, Tejas. Tejas Belagod (10): aarch64: F

Re: [PATCH 04/10] gimple: Disallow sizeless types in BIT_FIELD_REFs.

On 11/7/24 5:52 PM, Richard Biener wrote: On Thu, Nov 7, 2024 at 11:13 AM Tejas Belagod wrote: On 11/7/24 2:36 PM, Richard Biener wrote: On Thu, Nov 7, 2024 at 8:25 AM Tejas Belagod wrote: On 11/6/24 6:02 PM, Richard Biener wrote: On Wed, Nov 6, 2024 at 12:49 PM Tejas Belagod wrote

Re: [PATCH 04/10] gimple: Disallow sizeless types in BIT_FIELD_REFs.

On 11/8/24 1:19 PM, Richard Biener wrote: On Fri, Nov 8, 2024 at 7:30 AM Tejas Belagod wrote: On 11/7/24 5:52 PM, Richard Biener wrote: On Thu, Nov 7, 2024 at 11:13 AM Tejas Belagod wrote: On 11/7/24 2:36 PM, Richard Biener wrote: On Thu, Nov 7, 2024 at 8:25 AM Tejas Belagod wrote: On

Re: [PATCH v2 0/8] aarch64: Enable C/C++ operations on SVE ACLE types.

On 11/18/24 7:09 PM, Richard Sandiford wrote: Tejas Belagod writes: Hi, This is v2 of the series https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667743.html based on review comments. Changes in this version include: 1. Canonicalised all index ranges for VLAs to BIT_FIELD_REF. 2

[PATCH v3 1/8] aarch64: Fix ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS

This patch enables ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS to indicate that C/C++ language operations are available natively on SVE ACLE types. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define __ARM_FEATURE_SVE_VECTOR_OPERATORS. --- gcc/con

[PATCH v3 0/8] aarch64: Enable C/C++ operations on SVE ACLE types.

ding fail as is - the test where an address is taken of an SVE vector element. I'm not sure what the behaviour should be here. Otherwise regression tested and bootstrapped on aarch64-linux-gnu. Bootstrapped on x86-linux-gnu. OK for trunk? Thanks, Tejas. Tejas Belagod (8): aarch64: Fix A

[PATCH v3 3/8] c: Range-check indexing of SVE ACLE vectors

This patch adds a check for non-GNU vectors to warn that the index is outside the range of a fixed vector size. For VLA vectors, we don't diagnose. gcc/ChangeLog: * c-family/c-common.cc (convert_vector_to_array_for_subscript): Add range-check for target vector types. --- gcc/c-f

[PATCH v3 8/8] cp: Fix another assumption in the FE about constant vector indices.

This patch adds a change to handle VLA's poly indices. gcc/ChangeLog: * cp/decl.cc (reshape_init_array_1): Handle poly indices. gcc/testsuite/ChangeLog: * g++.dg/ext/sve-sizeless-1.C: Update test to test initialize error. * g++.dg/ext/sve-sizeless-2.C: Likewise. --- gcc

[PATCH v3 6/8] aarch64: Add testcase for C/C++ ops on SVE ACLE types.

This patch adds a test case to cover C/C++ operators on SVE ACLE types. This does not cover all types, but covers most representative types. gcc/testsuite: * gcc.target/aarch64/sve/acle/general/cops.c: New test. --- .../aarch64/sve/acle/general/cops.c | 579 ++

[PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU vectors and have the same semantics with operations that are defined on GNU vectors. gcc/ChangeLog: * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Flip TYPE_INDIVISBL

[PATCH v3 4/8] gimple: Handle variable-sized vectors in BIT_FIELD_REF

Handle variable-sized vectors for BIT_FIELD_REF canonicalization. gcc/ChangeLog: * gimple-fold.cc (maybe_canonicalize_mem_ref_addr): Handle variable sized vector types in BIT_FIELD_REF canonicalization. * tree-cfg.cc (verify_types_in_gimple_reference): Change object-size-

[PATCH v3 5/8] c: Fix constructor bounds checking for VLA and construct VLA vector constants

This patch adds support for checking bounds of SVE ACLE vector initialization constructors. It also adds support to construct vector constant from init constructors. gcc/ChangeLog: * c-typeck.cc (process_init_element): Add check to restrict constructor length to the minimum vecto

Re: [PATCH v2 4/8] gimple: Handle variable-sized vectors in BIT_FIELD_REF

On 11/18/24 6:58 PM, Richard Sandiford wrote: Tejas Belagod writes: Handle variable-sized vectors for BIT_FIELD_REF canonicalization. gcc/ChangeLog: * gimple-fold.cc (maybe_canonicalize_mem_ref_addr): Handle variable sized vector types in BIT_FIELD_REF canonicalization

[PATCH v2 1/8] aarch64: Fix ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS

This patch enables ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS to indicate that C/C++ language operations are available natively on SVE ACLE types. gcc/ChangeLog: * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define __ARM_FEATURE_SVE_VECTOR_OPERATORS. --- gcc/con

[PATCH v2 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU vectors and have the same semantics with operations that are defined on GNU vectors. gcc/ChangeLog: * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Flip TYPE_INDIVISBL

[PATCH v2 5/8] c: Fix constructor bounds checking for VLA and construct VLA vector constants

This patch adds support for checking bounds of SVE ACLE vector initialization constructors. It also adds support to construct vector constant from init constructors. gcc/ChangeLog: * c/c-typeck.cc (process_init_element): Add check to restrict constructor length to the minimum vec

[PATCH v2 3/8] c: Range-check indexing of SVE ACLE vectors

This patch adds a check for non-GNU vectors to warn that the index is outside the range of a fixed vector size. For VLA vectors, we don't diagnose. gcc/ChangeLog: * c-family/c-common.cc (convert_vector_to_array_for_subscript): Add range-check for target vector types. --- gcc/c-f

[PATCH v2 6/8] aarch64: Add testcase for C/C++ ops on SVE ACLE types.

This patch adds a test case to cover C/C++ operators on SVE ACLE types. This does not cover all types, but covers most representative types. gcc/testsuite: * gcc.target/aarch64/sve/acle/general/cops.c: New test. --- .../aarch64/sve/acle/general/cops.c | 579 ++

[PATCH v2 0/8] aarch64: Enable C/C++ operations on SVE ACLE types.

gt;FAIL: g++.dg/ext/sve-sizeless-1.C -std=gnu++11 (test for errors, line 163) I've left another outstanding fail as is - the test where an address is taken of an SVE vector element. I'm not sure what the behaviour should be here. Otherwise regression tested and boots

[PATCH v2 4/8] gimple: Handle variable-sized vectors in BIT_FIELD_REF

Handle variable-sized vectors for BIT_FIELD_REF canonicalization. gcc/ChangeLog: * gimple-fold.cc (maybe_canonicalize_mem_ref_addr): Handle variable sized vector types in BIT_FIELD_REF canonicalization. * tree-cfg.cc (verify_types_in_gimple_reference): Change object-size-

[PATCH v2 8/8] cp: Fix another assumption in the FE about constant vector indices.

This patch adds a change to handle VLA's poly indices. gcc/ChangeLog: * cp/decl.cc (reshape_init_array_1): Handle poly indices. gcc/testsuite/ChangeLog: * g++.dg/ext/sve-sizeless-1.C: Update test to test initialize error. * g++.dg/ext/sve-sizeless-2.C: Likewise. --- gcc

Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On 11/30/24 3:30 AM, Christophe Lyon wrote: Hi! On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU vectors and have the same semantics with operations that are defined on GNU vectors. gcc

Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On 12/2/24 3:20 PM, Andrew Pinski wrote: On Mon, Dec 2, 2024 at 1:47 AM Tejas Belagod wrote: On 11/30/24 3:30 AM, Christophe Lyon wrote: Hi! On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU

Re: [Ping^2][PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

Ping^2 Thanks, Tejas. On 11/4/24 10:06 AM, Tejas Belagod wrote: Ping. Thanks, Tejas. On 10/18/24 11:59 AM, Tejas Belagod wrote: Hi Jakub, Just wanted to add that I'm sorry for the delay in respinning the patchset - I was caught up with another piece of work. Thanks for the reviews s

Re: [PATCH v2 01/12] OpenMP/PolyInt: Pass poly-int structures by address to OMP libs.

On 1/21/25 10:16 PM, Jakub Jelinek wrote: On Fri, Oct 18, 2024 at 11:52:22AM +0530, Tejas Belagod wrote: Currently poly-int type structures are passed by value to OpenMP runtime functions for shared clauses etc. This patch improves on this by passing around poly-int structures by address to

Re: [PATCH v2 01/12] OpenMP/PolyInt: Pass poly-int structures by address to OMP libs.

On 1/22/25 4:37 PM, Jakub Jelinek wrote: On Wed, Jan 22, 2025 at 04:19:37PM +0530, Tejas Belagod wrote: On 1/21/25 10:16 PM, Jakub Jelinek wrote: On Fri, Oct 18, 2024 at 11:52:22AM +0530, Tejas Belagod wrote: Currently poly-int type structures are passed by value to OpenMP runtime functions

Re: [PATCH v2 01/12] OpenMP/PolyInt: Pass poly-int structures by address to OMP libs.

On 1/23/25 4:06 PM, Tejas Belagod wrote: On 1/22/25 4:37 PM, Jakub Jelinek wrote: On Wed, Jan 22, 2025 at 04:19:37PM +0530, Tejas Belagod wrote: On 1/21/25 10:16 PM, Jakub Jelinek wrote: On Fri, Oct 18, 2024 at 11:52:22AM +0530, Tejas Belagod wrote: Currently poly-int type structures are

[PATCH v4 2/3] Add function to strip pointer type and get down to the actual pointee type.

Add a function to traverse down the pointer layers to the pointee type. gcc/ChangeLog: * tree.h (strip_pointer_types): New. --- gcc/tree.h | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/tree.h b/gcc/tree.h index 6f45359f103..77eddc4515c 100644 --- a/gcc/tree.h +++ b/gcc/

[PATCH v4 3/3] AArch64: Diagnose OpenMP offloading when SVE types involved.

The target clause in OpenMP is used to offload loop kernels to accelarator peripeherals. target's 'map' clause is used to move data from and to the accelarator. When the data is SVE type, it may not be suitable because of various reasons i.e. the two SVE targets may not agree on vector size or so

Re: [PATCH v3 3/3] AArch64: Diagnose OpenMP offloading when SVE types involved.

On 3/7/25 5:33 PM, Jakub Jelinek wrote: On Fri, Mar 07, 2025 at 11:49:37AM +, Richard Sandiford wrote: +case TCTX_OMP_DEVICE_ADDR: + if (!silent_p) + error_at (loc, "SVE type %qT not allowed in target device clauses", type); Is the final error message accurate? This TCTX v

[PATCH v4 1/3] gomp: Various fixes for SVE types [PR101018]

be hard to test. Co-authored-by: Tejas Belagod gcc/ PR middle-end/101018 * poly-int.h (can_and_p): New function. * fold-const.cc (poly_int_binop): Use it to optimize BIT_AND_EXPRs involving POLY_INT_CSTs. * gimplify.cc (omp_notice_variable): Use poly_int_tree

[PATCH 2/2] libgomp: Add AArch64 SVE target tests to libgomp.

Add AArch64 SVE target exectute tests to test various workshare constructs and clauses with SVE types. libgomp/ChangeLog: * testsuite/libgomp.c-target/aarch64/aarch64.exp: Test driver. * testsuite/libgomp.c-target/aarch64/firstprivate.c: New test. * testsuite/libgomp.c-tar

Re: [PATCH v5 5/5] libgomp: Add AArch64 SVE target tests to libgomp.

On 4/7/25 3:33 PM, Jakub Jelinek wrote: On Mon, Apr 07, 2025 at 03:28:29PM +0530, Tejas Belagod wrote: Add AArch64 SVE target exectute tests to test various workshare constructs and clauses with SVE types. libgomp/ChangeLog: * testsuite/libgomp.c-target/aarch64/aarch64.exp: Test

Re: [PATCH] libgomp: Update SVE tests

On 4/10/25 5:56 PM, Richard Sandiford wrote: Tejas Belagod writes: On 4/10/25 5:13 PM, Tejas Belagod wrote: On 4/9/25 4:13 PM, Jakub Jelinek wrote: On Wed, Apr 09, 2025 at 04:01:49PM +0530, Tejas Belagod wrote: It also looks like there might be a missing "+" in simd_reduction:  

Re: [PATCH] libgomp: Update SVE tests

On 4/10/25 5:13 PM, Tejas Belagod wrote: On 4/9/25 4:13 PM, Jakub Jelinek wrote: On Wed, Apr 09, 2025 at 04:01:49PM +0530, Tejas Belagod wrote: It also looks like there might be a missing "+" in simd_reduction:     #pragma omp simd reduction (+:va, i)     for (j = 0; j < 16;

Re: [PATCH] libgomp: Update SVE tests

On 4/9/25 4:13 PM, Jakub Jelinek wrote: On Wed, Apr 09, 2025 at 04:01:49PM +0530, Tejas Belagod wrote: It also looks like there might be a missing "+" in simd_reduction: #pragma omp simd reduction (+:va, i) for (j = 0; j < 16; j++) va = svld1_s32 (svptrue_b32 (),

Re: [PATCH v4 0/3] [AArch64, OpenMP] Support SVE types with various OpenMP clauses and constructs

Ping. Thanks, Tejas. On 3/18/25 11:27 AM, Tejas Belagod wrote: This series is based on a previous thread and review comments from RichardS and Jakub upstream: https://gcc.gnu.org/pipermail/gcc-patches/2025-March/677072.html The changes suggested are cosmetic in nature. As suggested in the

[PATCH v5 5/5] libgomp: Add AArch64 SVE target tests to libgomp.

Add AArch64 SVE target exectute tests to test various workshare constructs and clauses with SVE types. libgomp/ChangeLog: * testsuite/libgomp.c-target/aarch64/aarch64.exp: Test driver. * testsuite/libgomp.c-target/aarch64/firstprivate.c: New test. * testsuite/libgomp.c-tar

[PATCH v5 0/5] [AArch64, OpenMP] Support SVE types with various OpenMP clauses and constructs

r the reviews. Patches 1-4 have been OKed with the suggested changes. Patch 5 is yet to get an OK - so will wait until it is Oked before applying. Thanks, Tejas. Richard Sandiford (1): gomp: Various fixes for SVE types [PR101018] Tejas Belagod (4): Add function to strip pointer type and get

[PATCH v5 4/5] AArch64: Add OpenMP target compile error tests

Add compile-only OpenMP error tests for target clause used with SVE types. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/gomp/gomp.exp: Test driver. * gcc.target/aarch64/sve/gomp/target-device.c: New test. * gcc.target/aarch64/sve/gomp/target-link.c: Likewise.

Re: [PATCH] libgomp: Update SVE tests

On 4/9/25 2:32 AM, Richard Sandiford wrote: The new SVE tests didn't explicitly force SVE to be enabled, which meant that they wouldn't work on targets that aren't configured for SVE by default. The least invasive way of fixing that is to add a pragma, which works for most tests. However, for ud

[PATCH] libgomp: Update SVE test

Fix udr-sve.c target test that to check for the correct results based on the OpenMP clauses used. The test was first written with a misunderstood functionality of the reduction clause. Tested with aarch64-linux-gnu. OK for trunk? libgomp/ChangeLog: * testsuite/libgomp.c-target/aarch64/u

Re: [PATCH] libgomp: Update SVE tests

On 4/10/25 5:29 PM, Jakub Jelinek wrote: On Thu, Apr 10, 2025 at 05:13:12PM +0530, Tejas Belagod wrote: Thanks for the explanation. I looked into why some of the tests may have failed - my flawed understanding of the reduction clause was why I didn't have the += in the loops - it might

[PATCH v5 2/5] Add function to strip pointer type and get down to the actual pointee type.

Add a function to traverse down the pointer layers to the pointee type. gcc/ChangeLog: * tree.h (strip_pointer_types): New. --- gcc/tree.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/gcc/tree.h b/gcc/tree.h index 55f97f9f999..99f26177628 100644 --- a/gcc/tree.h +++ b/

[PATCH v5 1/5] gomp: Various fixes for SVE types [PR101018]

be hard to test. Co-authored-by: Tejas Belagod gcc/ PR middle-end/101018 * poly-int.h (can_and_p): New function. * fold-const.cc (poly_int_binop): Use it to optimize BIT_AND_EXPRs involving POLY_INT_CSTs. * gimplify.cc (omp_notice_variable): Use poly_int_tree

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