Re: [PATCH][RFC] Radically simplify emission of balanced tree for switch statements.

On 21/05/18 15:00, Rainer Orth wrote: Hi Martin, Thanks for opened eyes, following patch will fix that. It's quite obvious, I'll install it right after tests will finish. unfortunately, it didn't fix either issue: * The switchlower -> switchlower1 renames in the dg-final* lines (attached)

Re: [PATCH][AARCH64][PR target/84882] Add mno-strict-align

Hi Richard On 18/05/18 15:48, Richard Earnshaw (lists) wrote: On 27/03/18 13:58, Sudakshina Das wrote: Hi This patch adds the no variant to -mstrict-align and the corresponding function attribute. To enable the function attribute, I have modified aarch64_can_inline_p () to allow checks even

Re: [PATCH][RFC] Radically simplify emission of balanced tree for switch statements.

Hi Martin On 25/05/18 10:45, Martin Liška wrote: On 05/21/2018 04:42 PM, Sudakshina Das wrote: On 21/05/18 15:00, Rainer Orth wrote: Hi Martin, Thanks for opened eyes, following patch will fix that. It's quite obvious, I'll install it right after tests will finish. unfortu

Re: [PATCH][AArch64] Make use of FADDP in simple reductions

Hi Elen Thank you for doing this. You will need a maintainer's approval but I would like to add a couple of comments. Please find them inline. On 08/05/2019 14:36, Elen Kalda wrote: > Hi, > > This patch adds a pattern to support the FADDP (scalar) instruction. > > Before the patch, the C code

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi James On 29/11/18 16:47, Sudakshina Das wrote: > Hi > > On 13/11/18 14:47, Sudakshina Das wrote: >> Hi >> >> On 02/11/18 18:38, Sudakshina Das wrote: >>> Hi >>> >>> This patch is part of a series that enables ARMv8.5-A in GCC and >&

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi James On 19/12/18 3:40 PM, James Greenhalgh wrote: > On Fri, Dec 14, 2018 at 10:09:03AM -0600, Sudakshina Das wrote: > > > >> I have updated the patch according to our discussions offline. >> The md pattern is now split into 4 patterns and i have added a new >

Re: [PATCH] fortran/69121 -- Make IEEE_SCALB generic

Hi Steve On 21/12/18 8:01 PM, Steve Kargl wrote: > On Fri, Dec 21, 2018 at 07:39:45PM +, Joseph Myers wrote: >> On Fri, 21 Dec 2018, Steve Kargl wrote: >> >>> scalbln(double x, long n) >>> { >>> >>> return (scalbn(x, (n > NMAX) ? NMAX : (n < NMIN) ? NMIN : (int)n)); >>> } >>> >>> A se

Re: Fix devirtualization with LTO

Hi Jan On 22/12/18 8:08 PM, Jan Hubicka wrote: > Hi, > while fixing Firefox issues I also noticed that type simplification > completely disabled type based devirtualization on LTO path. Problem > is that method pointers now point to simplified type and > obj_type_ref_class is not ready for that. >

Re: [Committed] XFAIL gfortran.dg/ieee/ieee_9.f90

Hi On 25/12/18 5:13 PM, Steve Kargl wrote: > On Tue, Dec 25, 2018 at 09:51:03AM +0200, Janne Blomqvist wrote: >> On Mon, Dec 24, 2018 at 9:42 PM Steve Kargl < >> s...@troutmask.apl.washington.edu> wrote: >> >>> On Mon, Dec 24, 2018 at 09:29:50PM +0200, Janne Blomqvist wrote: On Mon, Dec 24, 2

Re: [PATCH] PR fortran/81509 and fortran/45513

Hi Steve On 23/12/18 6:49 PM, Steve Kargl wrote: > This is a re-submission of a patch I submitted 15 months ago. > See https://gcc.gnu.org/ml/fortran/2017-09/msg00124.html > > At that time one reviewer OK'd the patch for committing, > and one reviewer raised objections to the patch as I > chose to

Re: [PATCH] PR fortran/81509 and fortran/45513

Hi Steve On 27/12/18 8:58 PM, Steve Kargl wrote: > On Thu, Dec 27, 2018 at 11:24:07AM +0000, Sudakshina Das wrote: >> With the failure as: >> >> Excess errors: >> /build/src/gcc/libgomp/testsuite/libgomp.fortran/aligned1.f03:55:14: >> Error: Arguments of 'ian

Re: GCC 8 backports

Hi Martin On 27/12/18 12:32 PM, Martin Liška wrote: > On 11/20/18 11:58 AM, Martin Liška wrote: >> On 10/3/18 11:23 AM, Martin Liška wrote: >>> On 9/25/18 8:48 AM, Martin Liška wrote: Hi. One more tested patch. Martin >>> One more tested patch. >>> >>> Martin >>> >> H

Re: Fix devirtualiation in expanded thunks

Hi Jan On 21/12/18 7:20 PM, Jan Hubicka wrote: > Hi, > this patch fixes polymorphic call analysis in thunks. Unlike normal > methods, thunks take THIS pointer offsetted by a known constant. This > needs t be compensated for when calculating address of outer type. > > Bootstrapped/regtested x86_64

Re: [PATCH][GCC][Aarch64] Change expected bfxil count in gcc.target/aarch64/combine_bfxil.c to 18 (PR/87763)

Hi Sam On 04/01/19 10:26, Sam Tebbs wrote: > > On 12/19/18 4:47 PM, Sam Tebbs wrote: > >> Hi all, >> >> Since r265398 (combine: Do not combine moves from hard registers), the bfxil >> scan in gcc.target/aarch64/combine_bfxil.c has been failing. >> >> FAIL: gcc.target/aarch64/combine_bfxil.c scan

[PATCH, GCC, AARCH64, 2/6] Add new arch command line feaures from ARMv8.5-A

instructions. All of the above only effect the assembler and have already (or almost for a couple of cases) gone in the trunk of binutils. Bootstrapped and regression tested with aarch64-none-linux-gnu. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das

[PATCH, GCC, AARCH64, 1/6] Enable ARMv8.5-A in gcc

aarch64-none-linux-gnu. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das * config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for ARMv8.5-A. * gcc/config/aarch64/aarch64.h (AARCH64_FL_V8_5): New. (AARCH64_FL_FOR_ARCH8_5

[PATCH, GCC, AARCH64, 3/6] Restrict indirect tail calls to x16 and x17

*** gcc/ChangeLog*** 2018-xx-xx Sudakshina Das * config/aarch64/aarch64.c (aarch64_expand_prologue): Use new epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM. (aarch64_expand_epilogue): Likewise. (aarch64_output_mi_thunk): Likewise

[PATCH, GCC, AARCH64, 4/6] Enable BTI: Add new to -mbranch-protection.

to 2 since I am also adding a configure option in a later patch and a value different from 0 and 1 would help identify if its already been updated. Bootstrapped and regression tested with aarch64-none-linux-gnu. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina D

[PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

e we have already changed the use of indirect tail calls to only x16 and x17, we do not have to use "BTI JC". (check patch 3/6). Bootstrapped and regression tested with aarch64-none-linux-gnu. Added new tests. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2

[PATCH, GCC, AARCH64, 6/6] Enable BTI: Add configure option for BTI and PAC-RET

and without configure option with a BTI enabled aem. Only 2 regressions and these were because newlib requires patches to protect hand coded libraries with BTI. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das * config/aarch64/aarch64.c

Re: [PATCH, GCC, AARCH64, 1/6] Enable ARMv8.5-A in gcc

Hi On 02/11/18 18:37, Sudakshina Das wrote: > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > &g

Re: [PATCH, arm] Backport -- Fix ICE during thunk generation with -mlong-calls

Hi Mihail On 08/11/18 10:02, Ramana Radhakrishnan wrote: > On 07/11/2018 17:49, Mihail Ionescu wrote: >> Hi All, >> >> This is a backport from trunk for GCC 8 and 7. >> >> SVN revision: r264595. >> >> Regression tested on arm-none-eabi. >> >> >> gcc/ChangeLog >> >> 2018-11-02 Mihail Ionescu >>

[PATCH, GCC, ARM] Enable armv8.5-a and add +sb and +predres for previous ARMv8-a in ARM

tested with arm-none-linux-gnueabihf. Is this ok for trunk? Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das * config/arm/arm-cpus.in (armv8_5, sb, predres): New features. (ARMv8_5a): New fgroup. (armv8.5-a): New arch. (armv8-a, armv8.1-a, armv8.2-a, armv8.

[PATCH, GCC, AArch64] Branch Dilution Pass

Hi I am posting this patch on behalf of Carey (cc'ed). I also have some review comments that I will make as a reply to this later. This implements a new AArch64 specific back-end pass that helps optimize branch-dense code, which can be a bottleneck for performance on some Arm cores. This is achi

Re: [PATCH, GCC, ARM] Enable armv8.5-a and add +sb and +predres for previous ARMv8-a in ARM

Hi Kyrill On 09/11/18 18:21, Kyrill Tkachov wrote: > Hi Sudi, > > On 09/11/18 15:33, Sudakshina Das wrote: >> Hi >> >> This patch adds -march=armv8.5-a to the Arm backend. >> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration

Re: [PATCH 2/3][GCC][AARCH64] Add new -mbranch-protection option to combine pointer signing and BTI

Hi Sam On 02/11/18 17:31, Sam Tebbs wrote: > Hi all, > > The -mbranch-protection option combines the functionality of > -msign-return-address and the BTI features new in Armv8.5 to better reflect > their relationship. This new option therefore supersedes and deprecates the > existing -msign-retur

Re: [PATCH, GCC, AARCH64, 1/6] Enable ARMv8.5-A in gcc

Hi James On 07/11/18 15:16, James Greenhalgh wrote: > On Fri, Nov 02, 2018 at 01:37:33PM -0500, Sudakshina Das wrote: >> Hi >> >> This patch is part of a series that enables ARMv8.5-A in GCC and >> adds Branch Target Identification Mechanism. >> (https://develo

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi On 02/11/18 18:38, Sudakshina Das wrote: > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > This

Re: [PATCH, GCC, AARCH64, 6/6] Enable BTI: Add configure option for BTI and PAC-RET

Hi James On 07/11/18 15:36, James Greenhalgh wrote: > On Fri, Nov 02, 2018 at 01:38:46PM -0500, Sudakshina Das wrote: >> Hi >> >> This patch is part of a series that enables ARMv8.5-A in GCC and >> adds Branch Target Identification Mechanism. >> (https://develo

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi On 13/11/18 14:47, Sudakshina Das wrote: > Hi > > On 02/11/18 18:38, Sudakshina Das wrote: >> Hi >> >> This patch is part of a series that enables ARMv8.5-A in GCC and >> adds Branch Target Identification Mechanism. >> (https://developer.arm.com/p

Re: [PATCH, GCC, AARCH64, 3/6] Restrict indirect tail calls to x16 and x17

Hi On 02/11/18 18:37, Sudakshina Das wrote: > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > T

[PATCH, GCC, AArch64] Enable Transactional Memory Extension

y-extension-tme-intrinsics Builds and regression tested on aarch64-none-linux-gnu and added new tests for the new instructions. Is this okay for trunk? Thanks Sudi *** gcc/ChangeLog *** 2019-xx-xx Sudakshina Das * config/aarch64/aarch64-builtins.c (enum aarch64

[PATCH, GCC, AArch64] Fix a couple of bugs in BTI

/ChangeLog: 2019-xx-xx Sudakshina Das * config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti instruction if enabled. (aarch64_override_options): Remove reference to return address key. Is this ok for trunk? Sudi diff --git a/gcc/config/aarch64/aarch64.c

[PATCH, wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Hi This patch documents the addition of the new Armv8.5-A and corresponding extensions in the gcc-9/changes.html. As per https://gcc.gnu.org/about.html, I have used W3 Validator. Is this ok for cvs? Thanks Sudi Index: htdocs/gcc-9/changes.html

Re: [PATCH, GCC, AArch64] Fix a couple of bugs in BTI

On 21/02/2019 22:52, James Greenhalgh wrote: > On Thu, Feb 21, 2019 at 06:19:10AM -0600, Sudakshina Das wrote: >> Hi >> >> While doing more testing I found a couple of issues with my BTI patches. >> This patch fixes them: >> 1) Remove a reference to return ad

Re: [PATCH, wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Pinging and adding Gerald to the CC list. On 22/02/2019 10:45, Sudakshina Das wrote: > Hi > > This patch documents the addition of the new Armv8.5-A and corresponding > extensions in the gcc-9/changes.html. > As per https://gcc.gnu.org/about.html, I have used W3 Validator. >

Re: [PATCH, wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Hi Kyrill On 12/03/2019 12:03, Kyrill Tkachov wrote: > Hi Sudi, > > On 2/22/19 10:45 AM, Sudakshina Das wrote: >> Hi >> >> This patch documents the addition of the new Armv8.5-A and corresponding >> extensions in the gcc-9/changes.html. >> As per https:/

Re: [PATCH, wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Hi James On 22/03/2019 16:25, James Greenhalgh wrote: > On Wed, Mar 20, 2019 at 10:17:41AM +0000, Sudakshina Das wrote: >> Hi Kyrill >> >> On 12/03/2019 12:03, Kyrill Tkachov wrote: >>> Hi Sudi, >>> >>> On 2/22/19 10:45 AM, Sudakshina Das wrote: >

[PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

these in binutils are already approved and committed. https://sourceware.org/ml/binutils/2019-03/msg00072.html Bootstrapped and regression tested with aarch64-none-linux-gnu. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das * config/aarch64/aarch64

Re: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Hi Richard Thanks for the comments and pointing out the much cleaner existing asm output functions! On 29/03/2019 17:51, Richard Henderson wrote: >> +#define ASM_LONG "\t.long\t" > > Do not replicate targetm.asm_out.aligned_op.si, or integer_asm_op, really. > >> +aarch64_file_end_indicate_exec

Re: [PATCH, wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Hi James On 29/03/2019 13:41, Sudakshina Das wrote: > Hi James > > On 22/03/2019 16:25, James Greenhalgh wrote: >> On Wed, Mar 20, 2019 at 10:17:41AM +0000, Sudakshina Das wrote: >>> Hi Kyrill >>> >>> On 12/03/2019 12:03, Kyrill Tkachov wrote: &

Re: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Hi On 02/04/2019 03:27, H.J. Lu wrote: > On Tue, Apr 2, 2019 at 10:05 AM Richard Henderson wrote: >> >> On 4/1/19 8:53 PM, Sudakshina Das wrote: >>>> This could stand to use a comment, a moment's thinking about the sizes, >>>> and t

[PATCH, GCC, DOCS, AArch64] Add missing documenation for mbranch-protection

Hi This patch add the missing documentation bits for -mbranch-protection in both extend.texi and invoke.texi. Is this ok for trunk? Sudi *** gcc/ChangeLog *** 2019-xx-xx Sudakshina Das * doc/extend.texi: Add deprecated comment on sign-return-address function attribute and

Re: [PATCH, GCC, DOCS, AArch64] Add missing documenation for mbranch-protection

Hi Sandra On 02/04/2019 16:32, Sandra Loosemore wrote: > On 4/2/19 6:45 AM, Sudakshina Das wrote: >> Hi >> >> This patch add the missing documentation bits for -mbranch-protection in >> both extend.texi and invoke.texi. >> >> Is this ok for trunk? >>

Re: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Hi Richard On 02/04/2019 10:25, Sudakshina Das wrote: > Hi > > On 02/04/2019 03:27, H.J. Lu wrote: >> On Tue, Apr 2, 2019 at 10:05 AM Richard Henderson >> wrote: >>> >>> On 4/1/19 8:53 PM, Sudakshina Das wrote: >>>>> This could stand to use

Re: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Hi Richard On 03/04/2019 11:28, Richard Henderson wrote: > On 4/3/19 5:19 PM, Sudakshina Das wrote: >> + /* PT_NOTE header: namesz, descsz, type. >> + namesz = 4 ("GNU\0") >> + descsz = 16 (Size of the program property array) >> +

Re: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Ping. On 04/04/2019 17:01, Sudakshina Das wrote: > Hi Richard > > On 03/04/2019 11:28, Richard Henderson wrote: >> On 4/3/19 5:19 PM, Sudakshina Das wrote: >>> +  /* PT_NOTE header: namesz, descsz, type. >>> + namesz = 4 ("GNU\0") >>> +

RE: [PATCH, GCC, AARCH64] Add GNU note section with BTI and PAC.

Hi James -Original Message- From: James Greenhalgh Sent: 18 April 2019 09:56 To: Sudakshina Das Cc: Richard Henderson ; H.J. Lu ; Richard Henderson ; gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw ; Marcus Shawcroft ; ni...@redhat.com Subject: Re: [PATCH, GCC, AARCH64] Add GNU note

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi On 20/12/18 16:40, Sudakshina Das wrote: > Hi James > > On 19/12/18 3:40 PM, James Greenhalgh wrote: >> On Fri, Dec 14, 2018 at 10:09:03AM -0600, Sudakshina Das wrote: >> >> >> >>> I have updated the patch according to our discussions offline. >&

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

Hi Christophe On 10/01/19 15:46, Christophe Lyon wrote: > On Wed, 9 Jan 2019 at 15:42, Sudakshina Das wrote: >> >> Hi >> >> On 20/12/18 16:40, Sudakshina Das wrote: >>> Hi James >>> >>> On 19/12/18 3:40 PM, James Greenhalgh wrote: >>

[Committed, GCC, AArch64] Disable tests for ilp32.

the tests. *** gcc/testsuite/ChangeLog *** 2019-01-10 Sudakshina Das * gcc.target/aarch64/bti-1.c: Exempt for ilp32. * gcc.target/aarch64/bti-2.c: Likewise. * gcc.target/aarch64/bti-3.c: Likewise. Only test directive change, hence only tested the above tests with

Re: [PATCH 1/2][GCC][AArch64] Implement hint intrinsics for AArch64

Hi Srinath On 10/01/19 19:20, Srinath Parvathaneni wrote: > Hi All, > > This patch implements the ACLE hint intrinsics (nop, yield, wfe, wfi, > sev and sevl), for AArch64. > > The instructions are documented in the ArmARM[1] and the intrinsics > specification will be > published on the Arm websi

Re: [PATCH 2/2][GCC][ARM] Implement hint intrinsics for ARM

Hi Srinath On 10/01/19 19:20, Srinath Parvathaneni wrote: > Hi All, > > This patch implements the ACLE hint intrinsics (nop,yield,wfe,wfi,sev > and sevl), for all ARM targets. > > The intrinsics specification will be published on the Arm website [1]. > > [1] > http://infocenter.arm.com/help/top

[PATCH] aarch64: Fix PR97638

Is this ok for trunk and gcc 10 backport? Thanks Sudi gcc/ChangeLog: 2020-10-30 Sudakshina Das PR target/97638 * config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Update return value on INSN_P check. gcc/testsuite/ChangeLog: 2020-10-30 Sudakshina Das

RE: [PATCH] aarch64: Fix PR97638

Hi Richard > -Original Message- > From: Richard Sandiford > Sent: 02 November 2020 10:31 > To: Sudakshina Das > Cc: gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; > Richard Earnshaw > Subject: Re: [PATCH] aarch64: Fix PR97638 > > Sudakshina Das writes: &

RE: [PATCH] aarch64: Add backend support for expanding __builtin_memset

Hi Richard > -Original Message- > From: Richard Sandiford > Sent: 30 October 2020 19:56 > To: Sudakshina Das > Cc: Wilco Dijkstra ; gcc-patches@gcc.gnu.org; > Kyrylo Tkachov ; Richard Earnshaw > > Subject: Re: [PATCH] aarch64: Add backend support for expa

RE: [PATCH] aarch64: Add backend support for expanding __builtin_memset

Hi Richard > -Original Message- > From: Richard Sandiford > Sent: 03 November 2020 11:34 > To: Sudakshina Das > Cc: Wilco Dijkstra ; gcc-patches@gcc.gnu.org; > Kyrylo Tkachov ; Richard Earnshaw > > Subject: Re: [PATCH] aarch64: Add backend support for expa

RE: [PATCH] aarch64: Add backend support for expanding __builtin_memset

Hi Richard > -Original Message- > From: Richard Sandiford > Sent: 11 November 2020 17:52 > To: Sudakshina Das > Cc: Wilco Dijkstra ; gcc-patches@gcc.gnu.org; > Kyrylo Tkachov ; Richard Earnshaw > > Subject: Re: [PATCH] aarch64: Add backend support for expa

[PATCH] aarch64: Add backend support for expanding __builtin_memset

trunk? gcc/ChangeLog: 2020-xx-xx Sudakshina Das * config/aarch64/aarch64-protos.h (aarch64_expand_setmem): New declaration. * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case for E_V16QImode. (aarch64_set_one_block_and_progress_pointer): New

RE: [PATCH] aarch64: Add backend support for expanding __builtin_memset

Hi Richard Thank you for the review. Please find my comments inlined. > -Original Message- > From: Richard Sandiford > Sent: 30 October 2020 15:03 > To: Sudakshina Das > Cc: gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; > Richard Earnshaw > Subject: Re: [PATCH]

<    1   2