Hi Jackson
On Tuesday 10 July 2018 09:37 AM, Jackson Woodruff wrote:
Hi all,
This patch resolves PR86014. It does so by noticing that the last
load may clobber the address register without issue (regardless of
where it exists in the final ldp/stp sequence). That check has been
changed so
Hi Jackson
On 11/07/18 17:48, Jackson Woodruff wrote:
Hi Sudi,
Thanks for the review.
On 07/10/2018 10:56 AM, Sudakshina wrote:
Hi Jackson
- if (!MEM_P (mem_1) || aarch64_mem_pair_operand (mem_1, mode))
+ if (!MEM_P (mem[1]) || aarch64_mem_pair_operand (mem[1], mode))
mem_1 == mem[1]?
Hi Jackson
On 11/07/18 17:48, Jackson Woodruff wrote:
Hi Sudi,
On 07/10/2018 02:29 PM, Sudakshina Das wrote:
Hi Jackson
On Tuesday 10 July 2018 09:37 AM, Jackson Woodruff wrote:
Hi all,
This patch resolves PR86014. It does so by noticing that the last
load may clobber the address
Hi Matthew
On 12/07/18 11:18, Richard Sandiford wrote:
Looks good to me FWIW (not a maintainer), just a minor formatting thing:
Matthew Malcomson writes:
diff --git a/gcc/config/aarch64/aarch64-simd.md
b/gcc/config/aarch64/aarch64-simd.md
index
aac5fa146ed8dde4507a0eb4ad6a07ce78d2f0cd..67b2
Hi Eric
On 27/06/18 12:22, Wilco Dijkstra wrote:
Eric Botcazou wrote:
This test can easily be changed not to use optimize since it doesn't look
like it needs it. We really need to tests these builtins properly,
otherwise they will continue to fail on most targets.
As far as I can see PR targ
Hi Sam
On 13/07/18 17:09, Sam Tebbs wrote:
Hi all,
This patch adds an optimisation that exploits the AArch64 BFXIL instruction
when or-ing the result of two bitwise and operations with non-overlapping
bitmasks (e.g. (a & 0x) | (b & 0x)).
Example:
unsigned long long combine(uns
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND instruction from being
generated due to the pattern failing to be matched.
Example:
typedef cha
Hi Vlad
On Friday 20 July 2018 10:37 AM, Vlad Lazar wrote:
Hi,
The patch adds implementations for the NEON intrinsics vabsd_s64 and
vnegd_s64.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ihi0073/latest/arm-neon-intrinsics-reference-architecture-specificati
Hi Sam
On 25/07/18 14:08, Sam Tebbs wrote:
On 07/23/2018 05:01 PM, Sudakshina Das wrote:
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND
Hi Sam
On 25/07/18 14:08, Sam Tebbs wrote:
On 07/23/2018 05:01 PM, Sudakshina Das wrote:
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND
Hi Sam
On 01/08/18 10:12, Sam Tebbs wrote:
On 07/31/2018 11:16 PM, James Greenhalgh wrote:
On Thu, Jul 26, 2018 at 11:52:15AM -0500, Sam Tebbs wrote:
Thanks for making the changes and adding more test cases. I do however
see that you are only covering 2 out of 4 new
*aarch64_get_lane_zero
Hi
On 31/07/18 22:48, Andrew Pinski wrote:
On Tue, Jul 31, 2018 at 2:43 PM James Greenhalgh
wrote:
On Thu, Jul 12, 2018 at 12:01:09PM -0500, Sudakshina Das wrote:
Hi Eric
On 27/06/18 12:22, Wilco Dijkstra wrote:
Eric Botcazou wrote:
This test can easily be changed not to use optimize
not desirable?
Thanks
Sudi
gcc/ChangeLog:
2019-11-07 Sudakshina Das
* loop-unroll.c (decide_unroll_constant_iterations): Update condition
to check
loop->unroll.
(decide_unroll_runtime_iterations): Likewise.
(decide_unroll_stupid): Likewise.
diff --git a/gcc
Hi Eric
On 08/11/2019 19:16, Eric Botcazou wrote:
>> I was fiddling around with the loop unrolling pass and noticed a check
>> in decide_unroll_* functions (in the patch). The comment on top of this
>> check says
>> "/* If we were not asked to unroll this loop, just return back silently.
>>*/"
On 11/11/2019 14:50, Eric Botcazou wrote:
>> Thanks for the explanation. However, I do not understand why are we
>> returning with the default value.
>
> The regression you reported should be clear enough though: if we don't do
> that, we will unroll in cases where we would not have before. Try w
geLog
2019-xx-xx Sudakshina Das
* tree-vect-loop.c (vect_model_reduction_cost): Remove
reduction_type check from if condition.
Is this ok for trunk?
Thanks
Sudi
diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
index ca8c818..7469204 100644
--- a/gcc/tree-vect-loop.c
+++
Hi Richard
On 05/12/2019 17:04, Richard Sandiford wrote:
> Sudakshina Das writes:
>> Hi
>>
>> While looking at vect_model_reduction_cost function, it seems Richard's
>> change in a recent commit r278611 missed an update to the following if
>> condition. Sinc
. This gives a 3.42% boost to 525.x264_r in
Spec2017 for AArch64.
gcc/ChangeLog:
2019-xx-xx Sudakshina Das
Richard Sandiford
* tree-vect-stmt.c (vectorizable_shift): Condition ndts for
vect_model_simple_cost call on scalar_shift_arg.
gcc/testsuite/ChangeLog:
2019-xx
Hi Jeff
On 07/12/2019 17:44, Jeff Law wrote:
> On Fri, 2019-12-06 at 14:05 +0000, Sudakshina Das wrote:
>> Hi
>>
>> While looking at the vectorization for following example, we
>> realized
>> that even though vectorizable_shift function was distinguishing
&g
Hi Christophe
On 10/12/2019 09:01, Christophe Lyon wrote:
> Hi,
>
> On Mon, 9 Dec 2019 at 11:23, Sudakshina Das wrote:
>>
>> Hi Jeff
>>
>> On 07/12/2019 17:44, Jeff Law wrote:
>>> On Fri, 2019-12-06 at 14:05 +, Sudakshina Das wrote:
>>>&g
limiting the test to the target that I know pass.
Committed as obvious r279310.
gcc/testsuite/ChangeLog
2019-12-12 Sudakshina Das
PR testsuite/92870
* gcc.dg/vect/vect-shift-5.c: Add target to scan-tree-dump.
diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-5.c b/gcc/testsuite
n overall
code size reduction on most
SPEC2017 Int benchmarks on Neoverse N1 due to more LDP/STP Q pair registers.
Bootstrapped and regression tested on aarch64-none-linux-gnu.
Is this ok for trunk?
Thanks
Sudi
gcc/ChangeLog:
2020-07-23 Sudakshina Das
Kyrylo Tkachov
* co
Hi Richard
> -Original Message-
> From: Richard Sandiford
> Sent: 31 July 2020 16:14
> To: Sudakshina Das
> Cc: gcc-patches@gcc.gnu.org; Kyrylo Tkachov
> Subject: Re: [PATCH V2] aarch64: Use Q-reg loads/stores in movmem
> expansion
>
> Sudakshina Das writes
Sent: 05 August 2020 14:52
> To: Andreas Schwab
> Cc: Sudakshina Das ; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH V2] aarch64: Use Q-reg loads/stores in movmem
> expansion
>
> Andreas Schwab writes:
> > This breaks bootstrap.
>
> I've pushed the below
Hi Martin
> -Original Message-
> From: Martin Liška
> Sent: 21 May 2020 16:01
> To: gcc-patches@gcc.gnu.org
> Cc: Sudakshina Das
> Subject: [PATCH] Fix handling of OPT_mgeneral_regs_only in attribute.
>
> Hi.
>
> Similarly to:
>
> case
Sudakshina Das
PR88398
* cfgloop.h: Include target.h.
(lpt_dec): Move to...
* target.h (lpt_dec): ... Here.
* target.def: Define TARGET_LOOP_DECISION_ADJUST.
* loop-unroll.c (decide_unroll_runtime_iterations): Use new target hook
target hook and only for a specific case
(multiple exits).
Thanks
Sudi
From: Richard Biener
Sent: Friday, November 15, 2019 9:32 AM
To: Sudakshina Das
Cc: gcc-patches@gcc.gnu.org ; Kyrill Tkachov
; James Greenhalgh ;
Richard Earnshaw ; bin.ch...@linux.alibaba.com
;
o...@ucw.c
mmitted as obvious r278905
gcc/testsuite/ChangeLog:
2019-xx-xx Sudakshina Das
* g++.dg/ext/arm-fp16/arm-fp16-ops.h: Remove volatile keyword.
Thanks
Sudi
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h
index 320494e..a92e
Hi Matthew
On 01/08/18 10:25, matthew.malcom...@arm.com wrote:
My first patch included an incorrect ChangeLog entry -- the filename was
misspelt. This corrects it.
I think this counts as an obvious change. I have committed this on your
behalf.
Thanks
Sudi
Hi Matthew
On 02/08/18 17:26, matthew.malcom...@arm.com wrote:
Use the STLUR instruction introduced in Armv8.4-a.
This insruction has the store-release semantic like STLR but can take a
9-bit unscaled signed immediate offset.
Example test case:
```
void
foo ()
{
int32_t *atomic_vals = call
Hi Tamar
On 13/08/18 17:27, Tamar Christina wrote:
Hi Thomas,
Thanks for the review.
I’ll correct the typo before committing if I have no other changes required by
a maintainer.
Regards,
Tamar.
I am not a maintainer but I would like to point out something in your
patch. I think you test c
filled out the form! :)
Sudi
Kyrill
*** gcc/testsuite/ChangeLog ***
2017-11-22 Sudakshina Das
* gcc.target/arm/armv8_2-fp16-move-1.c: Add -mfloat-abi=hard option.
From: Kyrill Tkachov
Sent: Monday, November 20, 2017 2:20 PM
To: Christophe Lyon
Cc: Sudi Das; gcc-patches@gcc.gnu.
Added myself as GCC maintainer with r255071
*** ChangeLog ***
2017-11-22 Sudakshina Das
* MAINTAINERS (Write After Approval): Add myself.
Thanks
Sudi
diff --git a/ChangeLog b/ChangeLog
index 13b0321..adaec62 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2017-11-22
s this ok for trunk?
Sudi
ChangeLog entry are as follow:
*** gcc/ChangeLog ***
2017-11-24 Sudakshina Das
* config/arm/vfp.md (*movhf_vfp_fp16): Add conds attribute.
*** gcc/testsuite/ChangeLog ***
2017-11-24 Sudakshina Das
* gcc.target/arm/armv8_2-fp16-move-2.c: New test
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01157.html
This patch fixed a test case switch-case-2.c. I am seeing
switch-case-1.c failing on
arm-none-linux-gnueabihf:
FAIL: gcc.dg/tree-prof/switch-case-1.c scan-rtl-dump-times expand ";;
basic block[^\\n]*count 2000" 1 (found 0 times)
aarch
On 30/11/17 11:03, Sudakshina Das wrote:
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01157.html
This patch fixed a test case switch-case-2.c. I am seeing
switch-case-1.c failing on
arm-none-linux-gnueabihf:
FAIL: gcc.dg/tree-prof/switch-case-1.c scan-rtl-dump-times expand ";;
basic
.
This patch fixes this problem by making *movhf_vfp_fp16 unconditional.
Testing done: Add a new test case and checked for regressions on
bootstrapped arm-none-linux-gnueabihf.
Is this ok for gcc-7?
Sudi
ChangeLog entry are as follow:
*** gcc/ChangeLog ***
2017-11-30 Sudakshi
n that branch as well if so?
I have tested the patch and also sent a new patch request for gcc-7
https://gcc.gnu.org/ml/gcc-patches/2017-11/msg02577.html
Thanks
Sudi
Thanks,
Kyrill
Sudi
ChangeLog entry are as follow:
*** gcc/ChangeLog ***
2017-11-24 Sudakshina Das
* config/arm/
On 30/11/17 16:07, Kyrill Tkachov wrote:
On 30/11/17 16:06, Sudakshina Das wrote:
Hi Kyrill
On 27/11/17 12:25, Kyrill Tkachov wrote:
> Hi Sudi,
>
> On 24/11/17 14:57, Sudi Das wrote:
>> Hi
>>
>> For the following test case:
>> __fp16
>> te
On 30/11/17 16:01, Sudakshina Das wrote:
Hi
This patch is the fix for gcc-7 for the same issue as mentioned in:
https://gcc.gnu.org/ml/gcc-patches/2017-11/msg02209.html
For the following test case:
__fp16
test_select (__fp16 a, __fp16 b, __fp16 c)
{
return (a < b) ? b : c;
}
when compi
Hi Christophe
On 12/12/17 09:59, Christophe Lyon wrote:
Hi,
On 11 December 2017 at 18:12, Sudakshina Das wrote:
On 30/11/17 16:01, Sudakshina Das wrote:
Hi
This patch is the fix for gcc-7 for the same issue as mentioned in:
https://gcc.gnu.org/ml/gcc-patches/2017-11/msg02209.html
For
bootstrapped
aarch64-none-linux-gnu and added a new compile time test case that gives
out LTGT to make sure it doesn't ICE.
Is this ok for trunk?
Thanks
Sudi
ChangeLog Entries:
*** gcc/ChangeLog ***
2017-12-13 Sudakshina Das
Bin Cheng
PR target/81228
* c
On 13/12/17 16:42, Sudakshina Das wrote:
Hi
This patch is a follow up to the existing discussions on
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01904.html
Bin had earlier submitted a patch to fix the ICE that occurs because of
the missing LTGT in aarch64-simd.md.
That discussion opened up
Hi
On 13/12/17 16:56, James Greenhalgh wrote:
On Wed, Dec 13, 2017 at 04:45:33PM +, Sudi Das wrote:
On 13/12/17 16:42, Sudakshina Das wrote:
Hi
This patch is a follow up to the existing discussions on
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01904.html
Bin had earlier submitted a
Hi
This patch is a follow up on my previous patch with r255536 that was a
back-port for fixing a wrong code generation
(https://gcc.gnu.org/ml/gcc-patches/2017-11/msg02209.html).
As pointed out by Christophe Lyon
(https://gcc.gnu.org/ml/gcc-patches/2017-12/msg00718.html) the test case
started
Hi
On 14/12/17 17:37, Christophe Lyon wrote:
On 14 December 2017 at 17:05, Sudakshina Das wrote:
Hi
This patch is a follow up on my previous patch with r255536 that was a
back-port for fixing a wrong code generation
(https://gcc.gnu.org/ml/gcc-patches/2017-11/msg02209.html).
As pointed out
Hi
On 14/12/17 18:26, Kyrill Tkachov wrote:
On 14/12/17 18:17, Sudi Das wrote:
Hi
On 14/12/17 17:37, Christophe Lyon wrote:
> On 14 December 2017 at 17:05, Sudakshina Das wrote:
>> Hi
>>
>> This patch is a follow up on my previous patch with r255536 that was a
>
angeLog ***
2017-12-15 Sudakshina Das
PR target/81647
* config/aarch64/aarch64-simd.md (vec_cmp): Modify
instructions for
UNLT, UNLE, UNGT, UNGE, UNEQ, UNORDERED and ORDERED.
*** gcc/testsuite/ChangeLog ***
2017-12-15 Sudakshina Das
PR target/81647
* gcc
On 14/12/17 10:38, Sudakshina Das wrote:
Hi
On 13/12/17 16:56, James Greenhalgh wrote:
On Wed, Dec 13, 2017 at 04:45:33PM +, Sudi Das wrote:
On 13/12/17 16:42, Sudakshina Das wrote:
Hi
This patch is a follow up to the existing discussions on
https://gcc.gnu.org/ml/gcc-patches/2017-07
Hi Martin
On 19/12/17 10:49, Martin Liška wrote:
On 11/30/2017 12:03 PM, Sudakshina Das wrote:
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01157.html
This patch fixed a test case switch-case-2.c. I am seeing switch-case-1.c
failing on
arm-none-linux-gnueabihf:
FAIL: gcc.dg/tree-prof
or trunk?
Sudi
ChangeLog Entries:
*** gcc/ChangeLog ***
2017-01-03 Sudakshina Das
PR target/82439
* simplify-rtx.c (simplify_relational_operation_1): Add
simplifications of (x|y) == x for BICS pattern.
*** gcc/testsuite/ChangeLog ***
2017-01-03 Sudakshina Das
Hi
On 03/01/18 14:38, Segher Boessenkool wrote:
Hi!
On Wed, Jan 03, 2018 at 01:57:38PM +, Sudakshina Das wrote:
This patch add support for the missing transformation of (x | y) == x ->
(y & ~x) == 0.
Testing done: Checked for regressions on bootstrapped
aarch64-none-linux-gnu
added new test
cases.
Sudi
ChangeLog entries:
*** gcc/ChangeLog ***
2017-01-04 Sudakshina Das
PR target/82096
* optabs.c (expand_atomic_compare_and_swap): Change argument
to emit_store_flag_force.
*** gcc/testsuite/ChangeLog ***
2017-01-04 Sudakshina Das
Hi Jeff
On 04/01/18 18:30, Jeff Law wrote:
On 01/03/2018 06:57 AM, Sudakshina Das wrote:
Hi
This patch add support for the missing transformation of (x | y) == x ->
(y & ~x) == 0.
The transformation for (x & y) == x case already exists in
simplify-rtx.c since 2014 as of r218503 and
Hi Kyrill
On 04/01/18 16:36, Kyrill Tkachov wrote:
Hi Sudi,
On 04/01/18 15:35, Sudakshina Das wrote:
Hi
The bug reported a particular test di-longlong64-sync-1.c failing when
run on arm-linux-gnueabi with options -mthumb -march=armv5t -O[g,1,2,3]
and -mthumb -march=armv6 -O[g,1,2,3
PING
On 15/12/17 11:57, Sudakshina Das wrote:
Hi
This patch fixes the inconsistent behavior observed at -O3 for the
unordered comparisons. According to the online docs
(https://gcc.gnu.org/onlinedocs/gcc-7.2.0/gccint/Unary-and-Binary-Expressions.html),
all of the following should not raise
Hi Jeff
On 05/01/18 18:44, Jeff Law wrote:
On 01/04/2018 08:35 AM, Sudakshina Das wrote:
Hi
The bug reported a particular test di-longlong64-sync-1.c failing when
run on arm-linux-gnueabi with options -mthumb -march=armv5t -O[g,1,2,3]
and -mthumb -march=armv6 -O[g,1,2,3].
According to what I
On 23/05/18 18:21, Jason Merrill wrote:
The first patch implements the adjustments from core issues 616 and
1213 to the value category of subobjects of class prvalues: they were
considered prvalues themselves, but that was kind of nonsensical. Now
they are considered xvalues. Along with this, I
On 02/05/18 18:28, Jeff Law wrote:
On 03/14/2018 11:40 AM, Sudakshina Das wrote:
Hi
This patch is another partial fix for PR 84521. This is adding a
definition to one of the target hooks used in the SJLJ implemetation so
that AArch64 defines the hard_frame_pointer_rtx as the
re/execute/pr84521.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects execution test
Testing: Bootstrapped and regtested on aarch64-none-linux-gnu.
Is this ok for trunk?
Sudi
*** gcc/ChangeLog ***
2018-06-14 Sudakshina Das
PR target/84521
* config/aarch64
PING!
On 14/06/18 12:10, Sudakshina Das wrote:
Hi Eric
On 07/06/18 16:33, Eric Botcazou wrote:
Sorry this fell off my radar. I have reg-tested it on x86 and tried it
on the sparc machine from the gcc farm but I think I couldn't finished
the run and now its showing to he unreachable.
trunk?
Thanks
Sudi
ChangeLog Entries:
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das
Bin Cheng
Backport from mainline:
2017-12-14 Sudakshina Das
Bin Cheng
PR target/81228
* config/aarch64/aarch64.c (aarch64_select_cc_mode):
Hi Jeff
On 09/01/18 23:43, Jeff Law wrote:
On 01/05/2018 12:25 PM, Sudakshina Das wrote:
Hi Jeff
On 05/01/18 18:44, Jeff Law wrote:
On 01/04/2018 08:35 AM, Sudakshina Das wrote:
Hi
The bug reported a particular test di-longlong64-sync-1.c failing when
run on arm-linux-gnueabi with options
Hi Jeff
On 10/01/18 10:44, Sudakshina Das wrote:
Hi Jeff
On 09/01/18 23:43, Jeff Law wrote:
On 01/05/2018 12:25 PM, Sudakshina Das wrote:
Hi Jeff
On 05/01/18 18:44, Jeff Law wrote:
On 01/04/2018 08:35 AM, Sudakshina Das wrote:
Hi
The bug reported a particular test di-longlong64-sync-1.c
Hi Jeff
On 10/01/18 21:08, Jeff Law wrote:
On 01/10/2018 09:25 AM, Sudakshina Das wrote:
Hi Jeff
On 10/01/18 10:44, Sudakshina Das wrote:
Hi Jeff
On 09/01/18 23:43, Jeff Law wrote:
On 01/05/2018 12:25 PM, Sudakshina Das wrote:
Hi Jeff
On 05/01/18 18:44, Jeff Law wrote:
On 01/04/2018 08
confirm if this works for you?
Thanks
Sudi
gcc/testsuite/ChangeLog
2018-01-12 Sudakshina Das
* gcc.c-torture/compile/pr82096.c: Add dg-skip-if
directive.
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr82096.c b/gcc/testsuite/gcc.c-torture/compile/pr82096.c
index 9fed28c
Hi Christophe
On 12/01/18 18:32, Christophe Lyon wrote:
Le 12 janv. 2018 15:26, "Sudakshina Das" a écrit :
Hi
This patch fixes my earlier test case that fails for arm-none-eabi
with explicit user option for -mfloat-abi which conflict with
the test case options. I have added a gua
Hi Jeff
On 12/01/18 23:00, Jeff Law wrote:
On 01/12/2018 01:45 AM, Christophe Lyon wrote:
Hi,
On 11 January 2018 at 11:58, Sudakshina Das wrote:
Hi Jeff
On 10/01/18 21:08, Jeff Law wrote:
On 01/10/2018 09:25 AM, Sudakshina Das wrote:
Hi Jeff
On 10/01/18 10:44, Sudakshina Das wrote
Hi Kyrill
On 19/01/18 18:00, Kyrill Tkachov wrote:
On 16/01/18 10:31, Sudakshina Das wrote:
Hi Christophe
On 12/01/18 18:32, Christophe Lyon wrote:
Le 12 janv. 2018 15:26, "Sudakshina Das" a écrit :
Hi
This patch fixes my earlier test case that fails for arm-none-eabi
with exp
for gcc-7-branch?
Testing : Ran regression testing with bootstrapped arm-none-linux-gnueabihf.
Thanks
Sudi
ChangeLog entries:
*** gcc/ChangeLog ***
2018-01-22 Sudakshina Das
Backport from mainline:
2018-01-10 Sudakshina Das
PR target/82096
* expmed.c
PING
On 15/12/17 11:57, Sudakshina Das wrote:
Hi
This patch fixes the inconsistent behavior observed at -O3 for the
unordered comparisons. According to the online docs
(https://gcc.gnu.org/onlinedocs/gcc-7.2.0/gccint/Unary-and-Binary-Expressions.html),
all of the following should not raise
On 22/01/18 15:23, Richard Biener wrote:
On Mon, Jan 22, 2018 at 4:10 PM, Sudakshina Das wrote:
Hi
This is a patch to backport r256526 and r256941 (Fix case fix) of trunk to
fix emit_store_flag_force () function to fix the ICE. The original
discussion is at https://gcc.gnu.org/ml/gcc-patches
On 16/02/18 15:40, Sudakshina Das wrote:
On 22/01/18 15:23, Richard Biener wrote:
On Mon, Jan 22, 2018 at 4:10 PM, Sudakshina Das wrote:
Hi
This is a patch to backport r256526 and r256941 (Fix case fix) of
trunk to
fix emit_store_flag_force () function to fix the ICE. The original
On 09/01/18 15:37, Sudakshina Das wrote:
Hi
This patch is only adding the missing LTGT to plug the ICE. This is a
backport to r255625 of trunk.
Testing done: Checked for regressions on bootstrapped
aarch64-none-linux-gnu and added a new compile time test case that gives
out LTGT to make
/ChangeLog ***
2018-03-14 Sudakshina Das
* config/arm/neon.md (ashldi3_neon): Update ?s for constraints
to favor GPR over NEON registers.
(di3_neon): Likewise.
*** gcc/testsuite/ChangeLog ***
2018-03-14 Sudakshina Das
* gcc.target/arm/pr82989.c: New test.
diff
done for these builtins in the future.
Testing: Bootstrapped and regtested on aarch64-none-linux-gnu and added
new test.
Is this ok for trunk?
Sudi
*** gcc/ChangeLog ***
2018-03-14 Sudakshina Das
* builtins.c (expand_builtin_setjmp_receiver): Update condition
to restore
On 15/03/18 15:27, Sameera Deshpande wrote:
Ping!
On 28 February 2018 at 16:18, Sameera Deshpande
wrote:
On 27 February 2018 at 18:25, Ramana Radhakrishnan
wrote:
On Wed, Feb 14, 2018 at 8:30 AM, Sameera Deshpande
wrote:
Hi!
Please find attached the patch to fix bug in branches with offse
robably need a back-port to
gcc-7-branch as well.
OK.
Let it soak on trunk for a while before the backport.
Thanks. Committed to trunk as r258653. Will wait a week before backport.
Sudi
Thanks,
James
ChangeLog Entries:
*** gcc/ChangeLog ***
2017-12-15 Sudakshina Das
PR targe
Hi
On 20/03/18 08:13, Christophe Lyon wrote:
On 19 March 2018 at 19:55, Sudakshina Das wrote:
Hi
On 19/03/18 14:29, James Greenhalgh wrote:
On Fri, Dec 15, 2017 at 11:57:46AM +, Sudi Das wrote:
Hi
This patch fixes the inconsistent behavior observed at -O3 for the
unordered
Hi
On 20/03/18 10:03, Richard Earnshaw (lists) wrote:
On 14/03/18 10:11, Sudakshina Das wrote:
Hi
This patch fixes PR82989 so that we avoid NEON instructions when
-mneon-for-64bits is not enabled. This is more of a short term fix for
the real deeper problem of making and early decision of
as only AArch64 patch.
This also has a mid change so cc'ing more people for approval.
Sudi
Thanks,
James
*** gcc/ChangeLog ***
2018-03-14 Sudakshina Das
* builtins.c (expand_builtin_setjmp_receiver): Update condition
to restore frame pointer.
* config/aa
Hi
On 21/03/18 08:51, Christophe Lyon wrote:
On 20 March 2018 at 11:58, Sudakshina Das wrote:
Hi
On 20/03/18 10:03, Richard Earnshaw (lists) wrote:
On 14/03/18 10:11, Sudakshina Das wrote:
Hi
This patch fixes PR82989 so that we avoid NEON instructions when
-mneon-for-64bits is not
?
Thanks
Sudi
*** gcc/testsuite/ChangeLog ***
2018-03-21 Sudakshina Das
PR target/82989
* gcc.target/arm/pr82989.c: Change dg-scan-assembly directives.
diff --git a/gcc/testsuite/gcc.target/arm/pr82989.c b/gcc/testsuite/gcc.target/arm/pr82989.c
index 6f74dba..8519c3f 100644
--- a
Hi
On 21/03/18 17:03, Kyrill Tkachov wrote:
On 21/03/18 16:33, Christophe Lyon wrote:
On 21 March 2018 at 13:11, Sudakshina Das wrote:
Hi
The test pr82989.c which was added in one of previous commits is failing
for mthumb and big-endian configurations. The aim of this test was to
check
and added the reported test to the testsuite.
Is this ok for trunk?
Sudi
ChangeLog entries:
*** gcc/ChangeLog ***
2018-03-21 Sudakshina Das
PR target/84826
* config/arm/arm.h (machine_function): Add
static_chain_stack_bytes.
* config
hat is,
(offset < -1048576 || offset > 1048572), anything that can not be
represented in the 21-bit range.
Thanks
Sudi
On 16 March 2018 at 00:51, Sudakshina Das wrote:
On 15/03/18 15:27, Sameera Deshpande wrote:
Ping!
On 28 February 2018 at 16:18, Sameera Deshpande
wrote:
On 27 February
Hi Kyrill
On 22/03/18 16:08, Kyrill Tkachov wrote:
Hi Sudi,
On 21/03/18 17:44, Sudakshina Das wrote:
Hi
The ICE in the bug report was happening because the macro
USE_RETURN_INSN (FALSE) was returning different values at different
points in the compilation. This was internally occurring
Hi
On 22/03/18 16:52, Kyrill Tkachov wrote:
On 22/03/18 16:20, Sudakshina Das wrote:
Hi Kyrill
On 22/03/18 16:08, Kyrill Tkachov wrote:
Hi Sudi,
On 21/03/18 17:44, Sudakshina Das wrote:
Hi
The ICE in the bug report was happening because the macro
USE_RETURN_INSN (FALSE) was returning
On 23/03/18 09:12, Kyrill Tkachov wrote:
On 23/03/18 08:47, Christophe Lyon wrote:
Hi Sudi,
On 22 March 2018 at 18:26, Sudakshina Das wrote:
Hi
On 22/03/18 16:52, Kyrill Tkachov wrote:
On 22/03/18 16:20, Sudakshina Das wrote:
Hi Kyrill
On 22/03/18 16:08, Kyrill Tkachov wrote:
Hi
On 23/03/18 13:50, Kyrill Tkachov wrote:
On 23/03/18 13:31, Sudakshina Das wrote:
On 23/03/18 09:12, Kyrill Tkachov wrote:
On 23/03/18 08:47, Christophe Lyon wrote:
Hi Sudi,
On 22 March 2018 at 18:26, Sudakshina Das wrote:
Hi
On 22/03/18 16:52, Kyrill Tkachov wrote:
On 22/03/18 16
.
Testing: Bootstrapped, regtested and added new tests that are copies
of earlier tests checking -mstrict-align with opposite scan directives.
Is this ok for trunk?
Sudi
*** gcc/ChangeLog ***
2018-03-27 Sudakshina Das
* common/config/aarch64/aarch64-common.c (aarch64_handle_option
On 21/03/18 11:40, Sudakshina Das wrote:
Hi
On 21/03/18 08:51, Christophe Lyon wrote:
On 20 March 2018 at 11:58, Sudakshina Das wrote:
Hi
On 20/03/18 10:03, Richard Earnshaw (lists) wrote:
On 14/03/18 10:11, Sudakshina Das wrote:
Hi
This patch fixes PR82989 so that we avoid NEON
Hi
On 20/03/18 10:57, Sudakshina Das wrote:
Hi
On 20/03/18 08:13, Christophe Lyon wrote:
On 19 March 2018 at 19:55, Sudakshina Das wrote:
Hi
On 19/03/18 14:29, James Greenhalgh wrote:
On Fri, Dec 15, 2017 at 11:57:46AM +, Sudi Das wrote:
Hi
This patch fixes the inconsistent
-03/msg01120.html
Testing : Regtested on both the branches with arm-none-linux-gnueabihf
Is this ok for gcc-7 and gcc-6?
Sudi
ChangeLog entries:
*** gcc/ChangeLog ***
2018-03-28 Sudakshina Das
Backport from mainline
2018-03-22 Sudakshina Das
PR target/84826
Hi Kyrill
On 29/03/18 09:41, Kyrill Tkachov wrote:
Hi Sudi,
On 28/03/18 15:04, Sudakshina Das wrote:
Hi
This patch is a request to backport r258777 and r258805 to gcc-7-branch
and gcc-6-branch. The same ICE occurs in both the branches with
-fstack-check. Thus the test case directive has been
testcase. Ok for trunk?
Thank you so much for fixing the length as well along with you patch.
You mention a failing testcase? Maybe it would be helpful to add that
to the patch for the gcc testsuite.
Sudi
On 22 March 2018 at 19:06, Sudakshina Das wrote:
Hi Sameera
On 22/03/18 02:07, Sameera
Hi Sameera
On 10/04/18 11:20, Sameera Deshpande wrote:
On 7 April 2018 at 01:25, Christophe Lyon wrote:
Hi,
2018-04-06 12:15 GMT+02:00 Sameera Deshpande :
Hi Christophe,
Please find attached the updated patch with testcases.
Ok for trunk?
Thanks for the update.
Since the new intrinsics
Hi Sameera
On 11/04/18 09:04, Sameera Deshpande wrote:
On 10 April 2018 at 20:07, Sudakshina Das wrote:
Hi Sameera
On 10/04/18 11:20, Sameera Deshpande wrote:
On 7 April 2018 at 01:25, Christophe Lyon
wrote:
Hi,
2018-04-06 12:15 GMT+02:00 Sameera Deshpande
:
Hi Christophe,
Please
Hi Sameera
On 11/04/18 13:05, Sameera Deshpande wrote:
On 11 April 2018 at 15:53, Sudakshina Das wrote:
Hi Sameera
On 11/04/18 09:04, Sameera Deshpande wrote:
On 10 April 2018 at 20:07, Sudakshina Das wrote:
Hi Sameera
On 10/04/18 11:20, Sameera Deshpande wrote:
On 7 April 2018 at
Ping!
On 27/03/18 13:58, Sudakshina Das wrote:
Hi
This patch adds the no variant to -mstrict-align and the corresponding
function attribute. To enable the function attribute, I have modified
aarch64_can_inline_p () to allow checks even when the callee function
has no attribute. The need for
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