[PATCH] Add POLY_INT_CST support to fold_ctor_reference in gimple-fold.cc

Add POLY_INT_CST support to code within fold_ctor_reference. This code previously only supported INTEGER_CST which caused a bug when using VEC_PERM_EXPR with SVE vectors. gcc/ChangeLog: * gimple-fold.cc (fold_ctor_reference): Add support for Poly_int. ##

[committed] MAINTAINERS: Add myself to write after approval

Sponsored by Richard Sandiford ChangeLog: * MAINTAINERS: Add myself. ### diff --git a/MAINTAINERS b/MAINTAINERS index 49aa6bae73b..a8bb43f50c3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -332,6 +332,7 @@ David Ayers Prakhar

Re: [PATCH] Add POLY_INT_CST support to fold_ctor_reference in gimple-fold.cc

Thanks Richard, I've gone through the write access process and committed this. On 7/31/2023 10:56 AM, Richard Sandiford wrote: Richard Ball writes: Add POLY_INT_CST support to code within fold_ctor_reference. This code previously only supported INTEGER_CST which caused a bug when using VEC_PE

[PATCH] aarch64: SVE/NEON Bridging intrinsics

ACLE has added intrinsics to bridge between SVE and Neon. The NEON_SVE Bridge adds intrinsics that allow conversions between NEON and SVE vectors. This patch adds support to GCC for the following 3 intrinsics: svset_neonq, svget_neonq and svdup_neonq gcc/ChangeLog: * config.gcc: Adds n

[PATCH] aarch64: Replace manual swapping idiom with std::swap in aarch64.cc

Replace manual swapping idiom with std::swap in aarch64.cc gcc/config/aarch64/aarch64.cc has a few manual swapping idioms of the form: x = in0, in0 = in1, in1 = x; The preferred way is using the standard: std::swap (in0, in1); We should just fix these to use std::swap. This will also allow us

[PATCH][GCC] aarch64: Add support for Cortex-A520 CPU

This patch adds support for the Cortex-A520 CPU to GCC. No regressions on aarch64-none-elf. Ok for master? gcc/ChangeLog:     * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.     * config/aarch64/aarch64-tune.md: Regenerate.     * doc/invoke.texi: Document

[PATCH][GCC] aarch64: Add support for Cortex-A720 CPU

This patch adds support for the Cortex-A720 CPU to GCC. No regressions on aarch64-none-elf. Ok for master? gcc/ChangeLog: * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex- A720 CPU. * config/aarch64/aarch64-tune.md: Regenerate. * doc/invoke.texi: Do

[PATCH v2][GCC] aarch64: Add support for Cortex-A720 CPU

v2: Add missing PROFILE feature flag. This patch adds support for the Cortex-A720 CPU to GCC. No regressions on aarch64-none-elf. Ok for master? gcc/ChangeLog: * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex- A720 CPU. * config/aarch64/aarch64-tune.md: Re