testsuite/gcc.target/powerpc/loop_align.c fails with this patch. It just needs
a simple tweak to the scan-assembler line since we're no longer generating the
",,31" portion on the .p2align.
-Pat
testcase now passes, ok for trunk?
-Pat
testsuite/ChangeLog:
2018-07-26 Pat Haugen
PR target/86612
* gcc.target/powerpc/pr58673-2.c: Call strdup.
Index: testsuite/gcc.target/powerpc/pr58673-2.c
===
--- testsuite
On 2/3/20 2:17 AM, Jiufu Guo wrote:
> +/* { dg-final { scan-rtl-dump-times "REG_BR_PROB 937042044" 1
> "loop2_unroll"} } */
Sorry I didn't catch this addition to the original testcase earlier, but I
wonder how stable this test is going to be. If there are future changes to
default count/probabi
On 9/13/23 3:48 PM, Segher Boessenkool wrote:
- "TARGET_POWER10 && TARGET_POWERPC64"
+ "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO"
"vmoduq %0,%1,%2"
Did we ever test if this insn in fact is slower as well? I don't mean
either way, orthogonality is good, but ju
On 09/04/2013 04:20 AM, Richard Biener wrote:
Any help with benchmarking this on targets other than x86_64
is appreciated (I'll re-do x86_64).
I ran CPU2000 and CPU2006 on PowerPC comparing the patch. CPU2000 had 3
benchmarks degrade in the 4%-6%range (254.gap, 168.wupwise,
173.applu).CPU2006
This patch fixes a couple failures that occur if the testsuite is run
with -mvsx and the VSX scalar sqrt instructions are generated. Ok for trunk?
-Pat
testsuite/ChangeLog:
2012-10-01 Pat Haugen
* gcc.target/powerpc/pr46728-1.c: Accept xssqrtdp.
* gcc.target/powerpc/pr46728
The following fixes the gcc.target/powerpc/direct-move-*2.c executable
test failures. Committed as obvious.
2013-10-23 Pat Haugen
* gcc.target/powerpc/direct-move.h: Fix header for executable tests.
Index: gcc/testsuite/gcc.target/powerpc/direct-move.h
The following adds a couple missed Power9 assembler option entries.
Bootstrapped on ppc64. Ok for trunk?
-Pat
2016-01-20 Pat Haugen
* config/rs6000/aix71.h (ASM_CPU_SPEC): Add entry for Power9.
* config/rs6000/driver-rs6000.c (struct asm_names): Likewise.
Index: config
The following patch prevents static prediction if we don't have real
profile data. Testing on SPEC CPU2006 showed a couple improvements in
specint and specfp neutral. Bootstrap/regtest on powerpc64 with no new
regressions. Ok for trunk?
-Pat
2016-01-27 Pat Haugen
* config/r
The following patch fixes a few insns that were specifying an incorrect
'type' attribute.
Bootstrap/regtest on powerpc64-linux with no new regressions. Ok for trunk?
-Pat
2016-02-04 Pat Haugen
* config/rs6000/crypto.md (crypto_vpermxor_): Correct
insn type.
This patch fixes a problem where the attribute no_instrument_function
was being ignored and profile code was emitted. Testcase
gcc.target/powerpc/ppc64-abi-2.c exposed the issue.
Bootstrap/regtest with no new regressions, ok for trunk?
-Pat
2014-01-13 Pat Haugen
* config/rs6000
On 07/09/2015 04:43 PM, Martin Liška wrote:
This final version which I agreed with Richard Sandiford.
Hope this can be finally installed to trunk?
Patch can bootstrap and survive regression tests on x86_64-linux-gnu.
FWIW, I confirmed this version of the patch fixes the build issues on
powerpc6
On 09/25/2015 11:51 PM, Ajit Kumar Agarwal wrote:
I have made the following changes in the estimate_reg_pressure_cost function
used
by the loop invariant and IVOPTS.
Earlier the estimate_reg_pressure cost uses the cost of n_new variables that
are generated by the Loop Invariant
and IVOPTS. T
The following patch factors out some common code to its own function and also
moves the Power6 specific code to a new function.
Bootstrap/regtest on powerpc64le with no regressions. Ok for trunk?
-Pat
2019-11-18 Pat Haugen
* config/rs6000/rs6000.c (move_to_end_of_ready): New
regressions. Ok for trunk?
-Pat
2017-11-08 Pat Haugen
* rs6000/power9.md (power9-qpmul): New.
* rs6000/rs6000.md ("type" attr): Add qmul.
(mul3, fma4_hw, *fms4_hw, *nfma4_hw,
*nfms4_hw, mul3_odd, fma4_odd, *fms4_odd,
*nfma4_odd, *nfms4_odd): C
On 11/08/2017 11:30 AM, Segher Boessenkool wrote:
>> --- gcc/config/rs6000/power9.md (revision 254377)
>> +++ gcc/config/rs6000/power9.md (working copy)
>> @@ -436,6 +436,12 @@ (define_insn_reservation "power9-qpdiv"
>> (eq_attr "cpu" "power9"))
>>"DU_super_power9,dfu_power9")
On 09/27/2017 12:56 PM, Pat Haugen wrote:
> The following patch corrects some Power9 resource requirements and
> instruction latencies. Bootstrap/regtest on powerpc64le-linux with no
> new regressions. Ok for trunk?
Updated patch follows. Bootstrap/regtest on powerpc64le-linux (Power9
The following patch fixes a couple typos in ppc-asm.h. Committed as
obvious. Will also backport to GCC 6/7 branches.
-Pat
2017-11-21 Pat Haugen
* config/rs6000/ppc-asm.h (f50, vs50): Fix values.
Index: gcc/config/rs6000/ppc-asm.h
unk?
-Pat
2018-05-17 Pat Haugen
Segher Boessenkool
PR target/85698
* config/rs6000/rs6000.c (rs6000_output_move_128bit): Check dest
operand.
testsuite/ChangeLog:
2018-05-17 Pat Haugen
PR target/85698
* gcc.target/powerpc/pr85698.c: New tes
On 5/17/18 1:57 PM, Segher Boessenkool wrote:
> On Thu, May 17, 2018 at 07:58:20PM +0200, Richard Biener wrote:
>> On May 17, 2018 6:04:36 PM GMT+02:00, Segher Boessenkool
>> wrote:
>>> On Thu, May 17, 2018 at 10:42:46AM -0500, Pat Haugen wrote:
>>>> The
The following patch fixes recent failures with the tests after a
dg-options string was added to them which prevented the default options
from vmx.exp from being used.
Committed as obvious.
2014-10-08 Pat Haugen
gcc/testsuite:
* gcc.dg/vmx/3c-01a.c: Add default options from
On 05/12/2015 06:45 AM, Tom de Vries wrote:
Hmm, this causes an ice for s390 in gcc.dg/tree-ssa/stdarg-2.c:
...
gimplification failed:
&ap type 0x7f132f46b888 __va_list_tag>
sizes-gimplified BLK
size
unit size
align 32 symtab 0 alias set
The following patch fixes "excess errors" failures for implicit function
declarations (memcmp/random) for the direct-move-*/pack01 tests. Tested
on powerpc64le-unknown-linux-gnu.
Committed as obvious.
2015-02-25 Pat Haugen
gcc/testsuite:
* gcc.target/powerpc/direct-move.
k/4.9 branch?
-Pat
2015-02-26 Pat Haugen
gcc/testsuite:
* gcc.dg/vect/pr59354.c: Move vector producing code to separate
function.
Index: gcc.dg/vect/pr59354.c
===
--- gcc.dg/vect/pr59354.c(revision 221016)
+++ g
On 06/18/2015 06:10 AM, Richard Biener wrote:
You are right that we should call ::new just for classes that have
m_ignore_type_size == false.
>I've come up with following patch, that I tested slightly:
>
>diff --git a/gcc/alloc-pool.h b/gcc/alloc-pool.h
>index 1785df5..7da5f7a 100644
>--- a/gcc/
for
defined but unused variables. The following fixes that and was committed
as obvious.
-Pat
2014-11-04 Pat Haugen
* config/rs6000/rs6000.c (atomic_hold_decl, atomic_clear_decl,
atomic_update_decl): Guard declaration with #ifdef.
Index: gcc/config/rs6000/rs600
On 1/5/19 11:58 AM, Jan Hubicka wrote:
> @@ -791,7 +791,7 @@ want_inline_small_function_p (struct cgr
>ipa_hints hints = estimate_edge_hints (e);
>int big_speedup = -1; /* compute this lazily */
>
> - if (growth <= 0)
> + if (growth <= PARAM_VALUE (PARAM_VALUE (PARAM_MAX
regressions. Committed as obvious.
-Pat
2018-10-31 Pat Haugen
* tree-ssa-loop-ivcanon.c (try_peel_loop): Fix typo and remove dead
initialization.
Index: gcc/tree-ssa-loop-ivcanon.c
===
--- gcc/tree-ssa-loop-ivcanon.c
On 11/8/18 6:10 AM, Kyrill Tkachov wrote:
> The attached patch avoids that by making the alap calculation only
> look at true dependencies. This shouldn't be too bad, since we use
> INSN_PRIORITY as the final tie-breaker than that does take
> anti-dependencies into account.
>
> This reduces the n
On 11/19/18 11:54 AM, Kyrill Tkachov wrote:
> On 16/11/18 18:19, Pat Haugen wrote:
>> On 11/8/18 6:10 AM, Kyrill Tkachov wrote:
>>> The attached patch avoids that by making the alap calculation only
>>> look at true dependencies. This shouldn't be too bad, since
On 11/19/18 2:30 PM, Pat Haugen wrote:
>> This is a follow-up from
>> https://gcc.gnu.org/ml/gcc-patches/2018-11/msg01525.html
>> This version introduces an "artificial" property of the dependencies
>> produced in
>> sched-deps.c that
On 11/20/18 10:53 AM, Kyrill Tkachov wrote:
> On 20/11/18 16:48, Pat Haugen wrote:
>> On 11/19/18 2:30 PM, Pat Haugen wrote:
>>>> This is a follow-up from
>>>> https://gcc.gnu.org/ml/gcc-patches/2018-11/msg01525.html
>>>> This version introduces
e.
Ok for trunk?
-Pat
2018-11-28 Pat Haugen
PR rtl-optimization/68212
* cfgloopmanip.c (duplicate_loop_to_header_edge): Adjust scale factor.
testsuite/ChangeLog:
2018-11-28 Pat Haugen
PR rtl-optimization/68212
* gcc.dg/pr68212.c: New test.
hat a
SAD_EXPR was actually generated. So I've updated the tests also.
Ok for trunk?
-Pat
testsuite/ChangeLog:
2019-02-19 Pat Haugen
* lib/target-supports.exp (check_effective_target_vect_usad_char):
Add PowerPC support.
* gcc.dg/vect/slp-reduc-sad.c: Update s
no new regressions and testcase
now passing. Also ran cpu2006/cpu2017 benchmark comparisons with no notable
differences. Ok for trunk?
-Pat
2019-04-15 Pat Haugen
PR target/84369
* config/rs6000/power9.md: Add store forwarding bypass.
Index: gcc/config/rs6000/pow
The options were removed in May 2018 (r260109), but documentation was not
updated.
Bootstrap on powerpc64le. Ok for trunk?
-Pat
2019-02-12 Pat Haugen
* doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate
-maltivec. Delete -maltivec=be and -maltivec=le
On 07/29/2016 10:47 AM, Kelvin Nilsen wrote:
> + "xsxexpdp %0,%x1"
> + [(set_attr "type" "fp")])
Type should be 'integer'.
> + "xsxsigdp %0,%x1"
> + [(set_attr "type" "fp")])
'integer'
> + "xsiexpdp %x0,%1,%2"
> + [(set_attr "type" "fp")])
'fpsimple'
> + "xscmpexpdp %0,%x1,%x2"
> + [(
On 08/02/2016 03:15 PM, Segher Boessenkool wrote:
> On Tue, Aug 02, 2016 at 03:03:42PM -0500, Pat Haugen wrote:
>> On 07/29/2016 10:47 AM, Kelvin Nilsen wrote:
>>> + "xsxexpdp %0,%x1"
>>> + [(set_attr "type" "fp")])
>>
>> Type
On 08/04/2016 10:27 AM, Kelvin Nilsen wrote:
> + "xsxexpdp %0,%x1"
> + [(set_attr "type" "vecsimple")])
> + "xsxsigdp %0,%x1"
> + [(set_attr "type" "vecsimple")])
'integer' for both, reasoning in response on initial thread for this patch.
> + "xvxexp %x0,%x1"
> + [(set_attr "type" "fpsimpl
On 08/03/2016 11:33 PM, Michael Meissner wrote:
> {
> - if (BYTES_BIG_ENDIAN)
> -return "xxpermdi %x0,%x1,%x2,0";
> + if (which_alternative == 0)
> +return (BYTES_BIG_ENDIAN
> + ? "xxpermdi %x0,%x1,%x2,0"
> + : "xxpermdi %x0,%x2,%x1,0");
> +
> + else if (which_alternativ
On 08/05/2016 08:04 PM, Segher Boessenkool wrote:
> On Fri, Aug 05, 2016 at 04:27:36PM -0500, Pat Haugen wrote:
>> On 08/02/2016 03:15 PM, Segher Boessenkool wrote:
>>> On Tue, Aug 02, 2016 at 03:03:42PM -0500, Pat Haugen wrote:
>>>> On 07/29/2016 10:47 AM, Kelvin Ni
The following simplifies the given testcase so it is no longer sensitive to
subreg (and hopefully other) codegen changes. Tested on powerpc64, ok for trunk?
-Pat
testsuite/ChangeLog:
2016-05-24 Pat Haugen
PR target/71050
* gcc.target/powerpc/lhs-1.c: Fix testcase to avoid
This patch adds instruction scheduling support for the Power9 processor.
Bootstrap/regression tested on powerpc64/powerpc64le with no new failures. Ok
for trunk? Ok for backport to GCC 6 branch after successful bootstrap/regtest
there?
-Pat
2016-06-21 Pat Haugen
* config/rs6000
ions, instead?
> Maybe a value "fpmove" for the "type", even?
The following patch adds new insn 'type' values that will be used for the
Power9 patch to overcome the items listed above. There is no functional change
to existing processor types. Bootstrap/regtested
On 06/27/2016 03:41 PM, Segher Boessenkool wrote:
>> * config/rs6000/rs6000.md ('type' attribute): Add
>> > vec_logical,veccmp_fx,vec_extend,vecmove insn types.
> Those names are a bit irregular (underscore vs. no underscore after "vec",
> "extend" is called "exts" for integer, "vec
d")
>> + (eq_attr "update" "no")
>> + (match_operand:DF 0 "" "")
>> + (eq_attr "cpu" "power9"))
>> + "DU_slice_3_power9,LSU_power9")
>
> Using match_operand here is asking
64le-linux with no new regressions. Ok for
trunk?
-Pat
2017-08-28 Pat Haugen
* config/rs6000/rs6000.c (rs6000_emit_prolog_move_from_cr): Rename from
rs6000_emit_move_from_cr and call renamed function.
(rs6000_emit_prologue): Call renamed functions.
* config/rs6000
On 09/06/2017 11:24 AM, Carl Love wrote:
> + "fctiw %1,%1; mfvsrd %0,%1; extsw %0,%0"
> + [(set_attr "type" "integer")
> + (set_attr "length" "4")])
Should be type "three" and length "12".
-Pat
mitted a separate patch to fix those. Ok for
trunk?
-Pat
2016-12-20 Pat Haugen
PR rtl-optimization/11488
* common/config/rs6000/rs6000-common.c
(rs6000_option_optimization_table): Enable -fsched-pressure.
* config/rs6000/rs6000.c (TARGET_COMPUTE_PRESSURE_CLASSE
The following patch updates a few latencies in the Power9 machine description.
Bootstrap/regtest on powerpc64le with no new regressions. Ok for trunk?
-Pat
2017-01-18 Pat Haugen
* config/rs6000/power9.md (power9-alu): Remove 'cmp' type and add
define_bypass for
introduced in GCC 7 so no
need for backport.
-Pat
2017-03-31 Pat Haugen
PR target/80107
* config/rs6000/rs6000.md (extendhi2): Add test for
TARGET_VSX_SMALL_INTEGER.
testsuite/ChangeLog:
2017-03-31 Pat Haugen
* gfortran.dg/pr80107.f: New.
Index: config
On 03/31/2017 06:28 PM, Kelvin Nilsen wrote:
> +! { dg-do compile { target { powerpc*-*-* } } }
> +! { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
> "-mcpu=power9" } }
Shouldn't it be -mcpu=405 in the exclude string since that's what's
specified below?
> +! { dg-require-e
back to pairing like insns.
Bootstrap/regtest on powerpc64le-linux with no new regressions. I also
did a -mcpu=power9 build of CPU2006 with no errors. Ok for trunk and
backport to GCC 6 branch?
-Pat
2017-04-07 Pat Haugen
* rs6000/rs6000.c (vec_load_pendulum): Rename
On 04/12/2017 06:33 PM, Kelvin Nilsen wrote:
>
> 1. As input arguments, out_insn represents an rtl expression that
> potentially "produces" a store to memory and in_insn represents an rtl
> expression that potentially "consumes" a value recently stored to memory.
>
You have this reversed, the cod
On 09/08/2017 01:41 PM, Carl Love wrote:
> +(define_insn "fctid"
> + [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
> +(unspec:DI [(match_operand:DF 1 "gpc_reg_operand" "d")]
> + UNSPEC_FCTID_INST))]
> + ""
> + "fctid %0,%1")
> +
> +(define_insn "fctiw"
> + [(set (m
regressions. Ok for trunk?
-Pat
2017-09-14 Pat Haugen
* config/rs6000/rs6000.c (rs6000_set_up_by_prologue): Make sure the TOC
reg (r2) isn't in the set of registers defined in the prologue.
testsuite/ChangeLog:
2017-09-14 Pat Haugen
* gcc.target/powerpc/r2_shrink-w
On 09/14/2017 11:35 AM, Segher Boessenkool wrote:
> On Thu, Sep 14, 2017 at 10:18:55AM -0500, Pat Haugen wrote:
>> --- gcc/config/rs6000/rs6000.c (revision 252029)
>> +++ gcc/config/rs6000/rs6000.c (working copy)
>> @@ -37807,6 +37807,11 @@ rs6000_set_up_by_pr
The following patch corrects some Power9 resource requirements and
instruction latencies. Bootstrap/regtest on powerpc64le-linux with no
new regressions. Ok for trunk?
-Pat
2017-09-27 Pat Haugen
* config/rs6000/power9.md (DU_C2_3_power9): Remove an incorrect
combination
Power9 has efficient unaligned load insns. The following patch fixes the
cost to reflect that. There was no similar code for the unaligned_store
case. Bootstrap/regtest on powerpc64le-linux with no new regressions.
Ok for trunk?
-Pat
2017-10-09 Pat Haugen
* config/rs6000/power9.c
On 01/27/2017 06:55 AM, Bernd Schmidt wrote:
> I'd appreciate if someone ran full ppc tests with this though.
I've started testing it on PowerPC, will post results when I have them.
-Pat
On 01/27/2017 09:40 AM, Pat Haugen wrote:
> On 01/27/2017 06:55 AM, Bernd Schmidt wrote:
>> I'd appreciate if someone ran full ppc tests with this though.
> I've started testing it on PowerPC, will post results when I have them.
Bootstrap/regtest on PowerPC was fine.
-Pat
owerpc64le. Ok for trunk?
-Pat
testsuite/ChangeLog:
2017-02-02 Pat Haugen
PR target/79158
* gcc.target/powerpc/pr70669.c: Use 'r' in an expression to force back
to VSX reg.
Index: gcc.targ
The following patch fixes the pr by adding code for integer comparisons to
invert the condition and swap operands to avoid generation of a compound test.
Bootstrap/regtest on powerpc64-unknown-linux-gnu with no new regressions. Ok
for trunk?
-Pat
2017-02-08 Pat Haugen
PR target
On 02/14/2017 07:57 AM, Jan Hubicka wrote:
> So it seems that the frequency of the loop itself is unrealistically scaled
> down.
> Before vetorizing the frequency is 8500 and predicted number of iterations is
> 6.6. Now the loop is intereed via BB 8 with frequency 1148, so the loop, by
> exit pro
On 02/16/2017 11:48 AM, Bin Cheng wrote:
> BTW, it may also help PR78116? Hi Pat, could you please help verify this?
> Thanks!
The first testcase in pr78116 no longer contains loads from spill in the
loop even before your patch. When built with your patch, there are four
additional register cop
The following patch fixes the problem of generating a logical shift for
vec_sra of an unsigned v2di vector.
Bootstrap/regtest on powerpc64le-unknown-linux-gnu with no new
regressions. Ok for trunk? Ok for backport to 5/6 branches after testing?
-Pat
2017-02-24 Pat Haugen
PR target
Since I fixed both vec_sra and vec_vsrad, the testcase should be testing
both. Committed as obvious.
-Pat
2017-03-01 Pat Haugen
* gcc.target/powerpc/pr79544.c: Add test for vec_vsrad and fix up
scan string.
Index: gcc.target/powerpc/pr79544.c
This patch fixes the initialization of the wi
constraint, which in turn is used to set the value of the wj constraint.
Bootstrap/regtest on powerp64le and powerpc64 (-m32/-m64) with no new
regressions. Ok for trunk?
-Pat
2017-03-08 Pat Haugen
PR target/79907
* config/rs600
On 03/09/2017 04:26 PM, Segher Boessenkool wrote:
> That looks correct. Okay for trunk, thanks! Does it need backporting
> as well?
The -mupper-regs-di support is new in GCC 7 and I verified the testcase
compiles fine with GCC 5/6, so no backporting necessary.
-Pat
/regtest on powerpc64le with no new regressions. Ok for trunk?
Ok for backport to GCC 5/6 branches after testing?
-Pat
2017-03-15 Pat Haugen
PR target/79951
* config/rs6000/rs6000.md (copysign3_fcpsgn): Test
for VECTOR_UNIT_VSX_P (mode) too.
testsuite/ChangeLog:
2017-03-15
As stated in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68232, this
test needs -misel on powerpc to pass. Verified the following fixes the
test on both powerpc64/powerpc64le. Ok for trunk?
-Pat
testsuite/ChangeLog:
2016-03-14 Pat Haugen
* gcc.dg/ifcvt-4.c: Add -misel for powerpc
on powerpc64le, ok for trunk?
-Pat
2016-09-13 Pat Haugen
* config/rs6000/rs6000.md (div->recip splitter): Remove
optimize_insn_for_speed_p condition.
Index: config/rs6000/rs6000.md
===
--- config/rs6000/rs6
The following patch corrects a problem with setting the probability on the pred
edge instead of the newly created fallthru succ edge.
Bootstrap/regtest on powerpc64le with no new regressions. Committed as obvious.
-Pat
2016-09-14 Pat Haugen
* loop-unroll.c
for trunk?
-Pat
2016-09-20 Pat Haugen
PR rtl-optimization/68212
* cfgloopmanip.c (duplicate_loop_to_header_edge): Use preheader edge
frequency when computing scale factor for peeled copies.
* loop-unroll.c (unroll_loop_runtime_iterations): Fix freq/count
peeled
copy of the loop.
Bootstrap/regtest on powerpc64le with no new regressions. Ok for trunk?
2016-09-22 Pat Haugen
* loop-unroll.c (unroll_loop_runtime_iterations): Condition initial
loop peel to loops with exit test at the beginning.
Index: gcc/loop-unroll.c
On 09/28/2016 10:54 AM, Kyrill Tkachov wrote:
> +fstore-merging
> +Common Var(flag_store_merging) Optimization
> +Use the tree store merging pass.
> +
Did you purposely leave off "Report" for this option? I noticed the option
didn't show up in the "options enabled:" section of the .s file when
-
On 09/28/2016 10:59 AM, Bill Schmidt wrote:
>> Bill, could you or someone else with access to Power benchmarking try this
>> patch out on some benchmarks
>> > that you usually use? The new pass in this patch is on by default and can
>> > be turned off by -fno-store-merging
>> > if needed. Jakub
Ping for the following patch
https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01363.html
-Pat
Ping for the following patch
https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01612.html
-Pat
actually scaling
toward call_saved registers. The following patch corrects that by computing
call_saved regs per class and subtracting out some scaled portion of that.
Bootstrap/regtest on powerpc64le with no new failures. Ok for trunk?
-Pat
2016-10-07 Pat Haugen
* haifa-sched.c
On 10/14/2016 10:29 PM, Andrew Pinski wrote:
>>> >> This patch bumps the iteration count by 1 for loops with the exit at the
>>> >> end so that it represents the number of times the loop body is executed,
>>> >> and therefore removes the need to always execute that first peeled copy.
>>> >> With
On 10/17/2016 08:17 AM, Maxim Kuvyrkov wrote:
>> The patch here, https://gcc.gnu.org/ml/gcc-patches/2014-10/msg01872.html,
>> attempted to scale down the register limit used by -fsched-pressure for the
>> case where the block in question executes as frequently as the entry block
>> to just the c
On 10/18/2016 05:31 AM, Maxim Kuvyrkov wrote:
>> > I see your point and agree that current code isn't optimal. However, I
>> > don't think your patch is accurate either. Consider
>> > https://gcc.gnu.org/onlinedocs/gccint/Register-Basics.html and let's
>> > assume that FIXED_REGISTERS in class
. Ok for trunk if no new failures?
-Pat
2016-10-18 Pat Haugen
* haifa-sched.c (call_used_regs_num): Rename to...
(call_saved_regs_num): ...this.
(fixed_regs_num): New variable.
(sched_pressure_start_bb): Subtract out fixed_regs. Scale call_saved
regs
On 10/28/2016 06:38 AM, Bin.Cheng wrote:
> On Fri, Oct 28, 2016 at 12:27 PM, Tamar Christina
> wrote:
>> > Looking at it again,
>> >
>> > it seems to be that the testcase should be adjusted.
>> > There's no actual spilling. It just uses more registers than before due to
>> > the scheduling.
> Sor
The following patch corrects the constraint so that we only generate 'stxsiwx'
on Power8 or later hardware. Ok for trunk after successful bootstrap/regtest?
-Pat
2016-07-07 Pat Haugen
PR target/71800
* config/rs6000/rs6000.md (stfiwx): Change constraint
plied. Ok for trunk?
-Pat
testsuite/ChangeLog:
2016-12-20 Pat Haugen
* gcc.dg/sms-3.c: Add -fno-sched-pressure for powerpc.
* gcc.dg/sms-6.c: Likewise.
Index: gcc.dg/sms-3.c
===
--- gcc.dg/sms-3.c (revision 2
On 05/04/2016 10:20 AM, Wilco Dijkstra wrote:
> Also when people claim they can't see any benefit, did they check the
> codesize difference on SPEC2006?
> On AArch64 codesize reduced uniformly due to fewer moves (and in a few cases
> significantly so). I expect
> that to be true for other RISC ta
expander which exists in those releases) after bootstrap/regtest?
-Pat
2015-08-25 Pat Haugen
* config/rs6000/vector.md (vec_shr_): Fix to do a shift
instead of a rotate.
gcc/testsuite:
* gcc.target/powerpc/vec-shr.c: New.
Index: gcc/config/rs6000/vector.md
On 09/11/2015 02:49 PM, Segher Boessenkool wrote:
On PowerPC, this enables shrink-wrapping of about 2%-3% more functions.
I expected more, but in most cases this would help we cannot yet shrink-
wrap because there are non-volatile registers used, often in the first
block already.
I looked into sh
On 09/11/2015 05:40 PM, Segher Boessenkool wrote:
Another issue I saw for PowerPC that prevented shrink-wrapping was the
>case where non-volatile CR's are used somewhere in the function. This
>causes a 'mfcr' to be generated in the prolog to save the non-volatile
>CR's, which currently lists all
powerpc64le with no new regressions. Ok for trunk?
Note that the ira.c changes are not as complicated as what it looks, I only
added a few lines to invoke the target hook, the rest is just indentation
changes to move the existing code into the else leg.
-Pat
2016-11-04 Pat Haugen
regressions. Ok for trunk?
-Pat
2016-11-09 Pat Haugen
PR rtl-optimization/78241
* loop-unroll.c (unroll_loop_runtime_iterations): Don't adjust 'niter',
but
emit initial peel copy if niter expr is not reliable.
testsuite/ChangeLog:
2016-11-09 Pat Haugen
On 11/10/2016 06:54 PM, Andrew Pinski wrote:
> On Wed, Nov 9, 2016 at 2:13 PM, Pat Haugen
> wrote:
>> > The following fixes a problem introduced by my earlier loop unroller
>> > patch, https://gcc.gnu.org/ml/gcc-patches/2016-09/msg01612.html. In
>> > inst
(and 4.9/4.8 after bootstrap/regtest)?
2014-12-18 Pat Haugen
* config/rs6000/rs6000.md (boolc3_internal1): Fix operand
ordering.
Index: gcc/config/rs6000/rs6000.md
===
--- gcc/config/rs6000/rs6000.md (revision
On 12/19/2014 01:50 PM, Segher Boessenkool wrote:
On Fri, Dec 19, 2014 at 10:54:22AM -0600, Segher Boessenkool wrote:
>On Thu, Dec 18, 2014 at 02:48:46PM -0600, Pat Haugen wrote:
> > ;; 128-bit ANDC/ORC
> >+;; In the case where rs6000_split_logical is called, the NOT'd o
Following backport tested on 4.8/4.9 with no new regressions. Ok to
commit to those branches?
-Pat
2015-01-12 Pat Haugen
Backport from mainline
2014-12-20 Segher Boessenkool
PR target/64358
* config/rs6000/rs6000.c (rs6000_split_logical_inner): Swap the
The following patch restores the old default limits for loop peeling
that were recently changed to 100 and caused a 20% degradation in
454.calculix.
Bootstrap/regtest on powerpc64-linux with no new regressions. Ok for trunk?
-Pat
2012-12-06 Pat Haugen
* config/rs6000/rs6000.c
This patch adds instruction scheduling support for the Power8 processor.
Bootstrap/regression test with no new failures. Ok for trunk?
2013-06-07 Michael Meissner
Pat Haugen
Peter Bergner
* config/rs6000/power8.md: New.
* config/rs6000/rs6000-cpus.def (RS6000_CPU
/regtest with no new regressions, ok for trunk?
-Pat
2013-07-18 Pat Haugen
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Adjust flag
interaction for new Power8 flags and VSX.
Index: gcc/config/rs6000/rs6000.c
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