[SH][committed] Fix gcc.target/sh/pr54680.c test

Hi, The SH specific test gcc.target/sh/pr54680.c has started to fail recently. This is because of improved IPA optimizations. For this test the IPA optimization should be turned off. Tested with make -k check-gcc RUNTESTFLAGS="sh.exp=pr54680.c --target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m

Re: sh-*-linux build failure

On Tue, 2015-03-10 at 08:19 +0900, Kaz Kojima wrote: > Yoshinori Sato wrote: > >>* config/sh/t-linux (MULTILIB_EXCEPTIONS): Define for m2a cases. > [snip] > > It works fine. > > Thanks for checking. I've committed it on trunk as revision 221287. > > Regards, > kaz > I think the same

[SH][committed] Fix PR 65505

Hi, The attached patch is the same as posted in the PR with a test case added. Tested with on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" and on sh4-linux by Kaz. Committed as r221604. Cheers, Oleg gcc/ChangeLog:

[SH][committed] Setting MULTILIB_EXCEPTIONS in gcc/config/sh/t-linux causes problems

On Thu, 2015-03-26 at 09:45 +0900, Kaz Kojima wrote: > Oleg Endo wrote: > > Sorry, I'm a bit confused. Do you mean something like the attached > > patch? If so, it means that the original patch for this problem > > https://gcc.gnu.org/ml/gcc-patches/2015-03/msg00424.ht

[SH][committed] Fix PR 65979 / PR 66611

Hi, This fixes the problem of emitting an insn from within a peephole pattern which can't be recognized due to mismatching operand constraints. Tested by Kaz on sh4-linux. Committed to trunk as r224987. Backport to GCC 5 will follow. Cheers, Oleg gcc/ChangeLog: PR target/65979

Re: [SH][committed] Fix PR 65979 / PR 66611

On 26 Jun 2015, at 08:54, Oleg Endo wrote: > Hi, > > This fixes the problem of emitting an insn from within a peephole pattern > which can't be recognized due to mismatching operand constraints. Tested by > Kaz on sh4-linux. Committed to trunk as r224987. Backport to

Re: [Patch,microblaze]: Optimized usage of reserved stack space for function arguments.

Hi, Just some general comments... On 06 Jul 2015, at 22:05, Ajit Kumar Agarwal wrote: > +static bool > +microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type) > +{ > + enum machine_mode mode; 'enum' is not required in C++, please omit it. We've been trying

[SH][committed] PR 53988 - Fix wrong code

Hi, The attached patch fixes a wrong-code issue which was the result of the initial fix for PR 53988. Tested with make -k check RUNTESTFLAGS="--target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" and no new failures. Committed as 219623. Backports to 4.8 and 4.9 wi

[SH] Introduce treg_set_expr

Hi, The attached patch does a couple of things, which are based on the treg_set_expr (for an explanation/motivation see below). Somehow the stuff just kept piling on and it was difficult to make step-by-step patches for all the individual issues. Some patterns needed to be rewritten to keep the

Re: [SH] Introduce treg_set_expr

On Sat, 2015-01-17 at 22:40 +0900, Kaz Kojima wrote: > Oleg Endo wrote: > > Kaz, could you please test the patch on your sh4-linux setup and report > > your findings? Even though it's a bit late, I'd like to get this in for > > GCC 5, if it doesn't break to

[SH][committed] Fix PR 64652

Hi, The attached patch fixes PR 64652. Tested with make -k check-gcc RUNTESTFLAGS="sh-torture.exp --target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r219824. Cheers, Oleg gcc/ChangeLog: PR target/64652 * config/sh/sh.md (udivsi3_i4,

Re: [SH] Introduce treg_set_expr

On Sun, 2015-01-18 at 13:25 +0100, Oleg Endo wrote: > On Sat, 2015-01-17 at 22:40 +0900, Kaz Kojima wrote: > > Oleg Endo wrote: > > > Kaz, could you please test the patch on your sh4-linux setup and report > > > your findings? Even though it's a bit late, I'

Re: [SH] Introduce treg_set_expr

On Sun, 2015-01-18 at 13:25 +0100, Oleg Endo wrote: > On Sat, 2015-01-17 at 22:40 +0900, Kaz Kojima wrote: > > Oleg Endo wrote: > > > Kaz, could you please test the patch on your sh4-linux setup and report > > > your findings? Even though it's a bit late, I'

Re: [SH][committed] Fix PR 64652

On Sun, 2015-01-18 at 19:14 +0100, Oleg Endo wrote: > Hi, > > The attached patch fixes PR 64652. Tested with > make -k check-gcc RUNTESTFLAGS="sh-torture.exp --target_board=sh-sim > \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" > Committed as

Re: [SH] Introduce treg_set_expr

On Tue, 2015-01-20 at 20:05 +0900, Kaz Kojima wrote: > Oleg Endo wrote: > > The updated treg_set_expr patch is attached, which should fix the GBR > > issues. Tests here OK. > > Kaz, could you please try again? > > New tests that FAIL: > > libgomp.fortran/udr14

[SH] [libstdc++] Workaround for PR 29366

Hi, The attached patch is a temporary workaround for PR 29366. We've been having support for various atomics on SH for a while, but libstdc++'s configury makes it impossible to use when doing a cross build (PR 53579). Even if that worked, if I'm not mistaken, config/cpu/sh/atomicity.h overrides

Re: [SH] Introduce treg_set_expr

On Thu, 2015-01-22 at 01:51 +0100, Oleg Endo wrote: > On Tue, 2015-01-20 at 20:05 +0900, Kaz Kojima wrote: > > Oleg Endo wrote: > > > The updated treg_set_expr patch is attached, which should fix the GBR > > > issues. Tests here OK. > > > Kaz, could you pleas

[SH][committed] Add some more addc/subc tests

Hi, This adds some more addc/subc tests which are now working after the treg_set_expr patch. Tested with make -k check-gcc RUNTESTFLAGS="sh.exp=pr54236* --target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r220093. Cheers, Oleg gcc/testsuite/ChangeLog

Re: [SH] Introduce treg_set_expr

On Thu, 2015-01-22 at 23:46 +0100, Oleg Endo wrote: > I will install this the patch from > https://gcc.gnu.org/ml/gcc-patches/2015-01/msg01743.html > in 24h if there are no further objections. > The above mentioned patch has been committed as r220081. This is a small follow up patc

[SH][committed] Fix PR 64659

Hi, Attached patch allows the atomic ops on SH to utilize some of the immediate value insns, which can save an insn and reg sometimes. The actual changes are in the predicates, constraints and some adjustments to some of the asm snippets. While at it, I've changed uses of register_operand into a

[SH][committed] Add atomic not insns

Hi, This adds atomic not insns for SH. Although not directly supported by the atomic builtins, for things like atomic xor (-1) or atomic nand (-1) combine will happily try to simplify the insns into a unary not. Committed as r220317. Tested with make -k check-gcc RUNTESTFLAGS="sh.exp=pr64851* --

[SH][committed] Use shorter atomic sequences if result values are unused

Hi, When the result values of atomic ops, such as the previous value of an atomic_fetch_add, are unused, it's possible to use shorter asm sequences on SH. The attached patch does that by checking the reg unused notes of the insns in split1 and replacing them with the simpler variants, if the resu

[SH] Allow reg+disp address modes for atomics

Hi, The attached patch fixes the lost mem aliasing info for atomic ops on SH and allows the utilization of reg+disp address modes for atomic ops. Actually it was supposed to be a pretty straight forward patch that just replaces the open coded 'mem:QIHISI (match_operand:SI "arith_reg_operand")' ope

Re: [SH] Allow reg+disp address modes for atomics

On Tue, 2015-02-10 at 18:35 +0900, Kaz Kojima wrote: > Oleg Endo wrote: > > The attached patch fixes the lost mem aliasing info for atomic ops on SH > > and allows the utilization of reg+disp address modes for atomic ops. > > Actually it was supposed to be a pretty straig

[SH][committed] Fix PR 64793

Hi, The attached patch fixes PR 64793. For some reason the SH port would pretend that it can do annulled branch true insns in the delay slot of conditional branches, which then got pulled out from the delay slot by the SH reorg pass. I believe there were some misunderstandings regarding the matt

[SH][committed] Add new option -mcbranch-force-delay-slot

Hi, On some early SH2E versions such as SH7055, there is a hardware bug related to conditional branches without delay slots. The recommended workaround for the bug is not to use conditional branches without delay slots. This is what GCC has been doing, but the comments around those parts were a

[wwwdocs][committed] SH changes update

Hi, This mentions some more SH changes for GCC 5. Committed. Cheers, Oleg ? sh_changes_50_1.patch Index: htdocs/gcc-5/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v retrieving revision 1.80 diff -u -r1.80 cha

Re: [PATCH, BUILDROBOT] SH: Fix unused variable warning (was: [SH][committed] PR 53513 - Add __builtin_sh_get_fpscr, __builtin_sh_set_fpscr)

On 4 Nov 2014, at 11:50, Jan-Benedict Glaw wrote: > On Sat, 2014-10-18 12:54:33 +0200, Oleg Endo wrote: >> Hi, >> >> As discussed in the PR, this adds two new SH built-in functions >> __builtin_sh_get_fpscr __builtin_sh_set_fpscr. Tested on r216173 with >&g

Re: [PATCH] RX: Add rx-*-linux target

On Sun, 2019-06-02 at 20:26 +0900, Yoshinori Sato wrote: > On Fri, 31 May 2019 09:16:18 +0900, > Jeff Law wrote: > > > > On 5/29/19 12:27 PM, Jeff Law wrote: > > > On 5/23/19 6:05 AM, Yoshinori Sato wrote: > > > > I ported linux kernel to Renesas RX. > > > > > > > > rx-*-elf target output a binar

Re: [PATCH] RX: Add rx-*-linux target

On Sun, 2019-06-02 at 12:37 -0500, Segher Boessenkool wrote: > > This is -m64bit-doubles/-m32bit-doubles, and t-rx already multilibs > that? Yes, it does. > And the default is 32-bit. So why does rx-linux need something > different? > You could make a point for wanting 64-bit doubles as default

Re: [1/9] Simplify the implementation of HARD_REG_SET

On Mon, 2019-09-09 at 19:05 +0100, Richard Sandiford wrote: > > Yeah. I might come back to this later and look at a fuller > transition > to C++ (or at least to try to get rid of CLEAR_HARD_REG_SET). > Maybe you can just typedef it to std::bitset ;) Cheers, Oleg

Re: [PATCH 26/30] Changes to sh

On Tue, 2019-06-25 at 15:22 -0500, acsaw...@linux.ibm.com wrote: > From: Aaron Sawdey > > * config/sh/sh.md (movmemsi): Change name to cpymemsi. > --- > gcc/config/sh/sh.md | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md >

Re: Recent combine change causing regressions

On Mon, 2019-05-13 at 09:38 -0500, Segher Boessenkool wrote: > On Mon, May 13, 2019 at 08:27:15AM -0600, Jeff Law wrote: > > sh3-linux-gnu and sh3eb-linux-gnu: > > I test sh2 and sh4, but not sh3 :-) > > > Tests that now fail, but worked before (3 tests): > > > > gcc.target/sh/pr51244-11.c scan-

Re: protected alloca class for malloc fallback

On Fri, 2016-08-05 at 19:55 +0200, Richard Biener wrote: > > Please don't use std::string. For string building you can use > obstacks. > Just out of curiosity ... why? I remember there was some discussion about it, what was the conclusion? Is that now a general rule or does it depend on the

Re: protected alloca class for malloc fallback

On Mon, 2016-08-08 at 13:39 -0400, Trevor Saunders wrote: > First sizeof std::string is 32 on x86_64, a char *, a size_t for the > length, and a 16 byte union of a size_t for allocated size and a 16 > byte buffer for short strings. I suppose some of this is required by > the C++ standard, I r

Re: protected alloca class for malloc fallback

On Tue, 2016-08-09 at 13:41 -0400, Trevor Saunders wrote: > If what you want is the ability to put the buffer on the stack > instead of the heap then I think a stack_string class that > interoperates with your string class is the thing you want. I'd avoid a separate stack_string class. Instead

Re: protected alloca class for malloc fallback

On Wed, 2016-08-10 at 21:31 -0400, Trevor Saunders wrote: > > Well, I'd say the compromises made in std::string make it pretty > terrible for general purpose use accept where perf and memory doesn't > matter at all. > > std::vector isn't very great size wise either, imho the size / > capacity f

Re: [wwwdocs] superh.com has gone poker(?)

On Mon, 2016-08-22 at 14:27 +0200, Gerald Pfeifer wrote: > It appears www.superh.com no longer has anything to do with > processors, > but poker. Better remove this (old) link. Yeah, I think I've removed one of those links from some other page a while ago. Also, note that SH5 support has been re

Re: [RX] Add support for atomic operations

On Mon, 2016-05-09 at 15:18 +0100, Nick Clifton wrote: > > gcc/ChangeLog: > > * config/rx/rx-protos.h (is_interrupt_func, > > is_fast_interrupt_func): > > Forward declare. > > (rx_atomic_sequence): New class. > > * config/rx/rx.c (rx_print_operand): Use symbolic names for PSW > > b

Re: [RX] Add support for atomic operations

On Tue, 2016-05-31 at 14:17 +0100, Nick Clifton wrote: > > Sorry, but my original patch was buggy. There are two problems: > > Thanks for your diligence in checking the patch. Just eating my own dogfood here ... :) > Approved - please apply. Committed as r236926. Cheers, Oleg

[SH][committed] Simplify DImode add, sub, neg patterns

Hi, The attached patch simplifies some DImode patterns on SH. The force_reg in the expand patterns can also be expressed by using the appropriate predicate, which eliminates the need for the expand patterns altogether. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/

[SH][committeð] Remove SH5 target regs leftovers

Hi, The attached patch removes the SH5 target register leftovers. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r236928. Cheers, Oleg gcc/ChangeLog: * config/sh/constraints.md (b): Rem

[SH][committed] Use default ASM_OUTPUT_SYMBOL_REF

Hi, Since the SH5 stuff is gone, there's no need to override the ASM_OUTPUT_SYMBOL_REF target macro anymore. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r236930. Cheers, Oleg gcc/ChangeLog:

[SH][committed] Avoid potential slient wrong-code with reg+reg addr. modes

Hi, The attached patch removes the hardcoded "r0" when printing reg+reg addressing mode mems on SH. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r237088. Cheers, Oleg gcc/ChangeLog: *

[SH][committed] Fix build after changes for PR 52171

Hi, The recent changes for PR 52171 didn't update the users of the renamed function 'move_by_pieces_ninsns'. The attached patch fixes this. Tested with "make all". Committed as r237090. Cheers, Oleg gcc/ChangeLog: PR tree-optimization/52171 * config/sh/sh.c (sh_use_by_

Re: [PATCH 12/17] Add server.h and server.c

On Mon, 2017-07-24 at 16:05 -0400, David Malcolm wrote: >  > + > +You should have received a copy of the GNU General Public License > +along with GCC; see the file COPYING3.  If not see > +.  */ > + > +#ifndef GCC_SERVER_H > +#define GCC_SERVER_H > + > +/* Wrapper arou

Re: [PATCH 6/6] qsort comparator consistency checking

On Thu, 2017-08-03 at 19:23 +0300, Alexander Monakov wrote: >  > Note that with vec::qsort -> vec::sort renaming (which should be less > controversial, STL also has std::vector::sort) No it doesn't?  One uses std::sort from on a pair of random access iterators to sort a std::vector. Cheers, Oleg

Re: [PATCH 6/6] qsort comparator consistency checking

On Thu, 2017-08-03 at 19:31 +0300, Alexander Monakov wrote: >  > My mistake, but the main point remains: STL uses 'sort' without the > 'q'. I think it'd be better if GCC's custom containers somewhat tried to follow C++ standard container idioms.  Chopping off the 'q' is one step towards it. Cheer

Re: Limit SH strncmp inline expansion (PR target/78460)

On Tue, 2017-08-15 at 21:15 +, Joseph Myers wrote: > GCC mainline built for sh4-linux-gnu runs out of memory building a > glibc test, which calls strncmp with very large constant size > argument, resulting in the SH inline strncmp expansion trying to > inline a fully unrolled expansion of strnc

Re: Limit SH strncmp inline expansion (PR target/78460)

On Tue, 2017-08-15 at 23:44 +, Joseph Myers wrote: >  > > This is an older issue.  Please also add a reference to PR 67712 in > > your commit.  Can you also apply it to GCC 6 branch please? > I can't reproduce the problem with GCC 6 branch; the glibc testsuite  > builds fine without out-of-mem

Re: [PATCH] Fix buffer overflow in SH expand_cbranchdi4 (PR target/79462)

On Tue, 2017-02-14 at 09:22 +0100, Jakub Jelinek wrote: > Hi! > > The following patch fixes a buffer overflow in the SH backend. > r235698 removed an operand (clobber of match_scratch) from the > various > cbranch pattersn that called expand_cbranchdi4 as well as all but > one references to operan

Re: [PATCH 6/6] sh: Fixes for RTL checking

On Tue, 2017-02-21 at 14:48 +, Segher Boessenkool wrote: > 2017-02-21  Segher Boessenkool   > > * config/sh/sh.md (tstsi_t): If operands[0] is a SUBREG instead of > a REG, look at the REG it is a SUBREG of. > (splitter for cmpeqsi_t): Ditto. > > --- >  gcc/config/sh/sh.md |

Re: [PATCH] Change replace_rtx if from is a REG (PR target/70245, take 2)

On Thu, 2016-03-17 at 12:16 +0100, Jakub Jelinek wrote: > Thus, I've reverted the patch (kept the testcase), and after some > discussions on IRC bootstrapped/regtested on x86_64-linux and i686 > -linux following version, which right now should change behavior just > for the i?86 case and nothing

[SH][committed] Fix PR 70416

Hi, The attached patch fixes PR 70416. For details, please see the PR audit trail. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" and no new failures. Committed to trunk as r234702. Backport to GCC 5 branch

Re: [SH][committed] Fix PR 70416

On Sun, 2016-04-03 at 21:55 +0900, Oleg Endo wrote: > The attached patch fixes PR 70416. For details, please see the PR > audit trail. > > Tested on sh-elf with > make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, > -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Mon, 2016-04-18 at 17:00 +, Wilco Dijkstra wrote: > Optimize strchr (s, 0) to s + strlen (s). strchr (s, 0) appears a > common > idiom for finding the end of a string, however it is not a very > efficient > way of doing so. Strlen is a much simpler operation which is > significantly > fast

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Tue, 2016-09-13 at 12:36 +, Wilco Dijkstra wrote: > Richard Biener wrote: > > > > On Wed, May 18, 2016 at 2:29 PM, Wilco Dijkstra > .com> wrote: > > > > > > Richard Biener wrote: > > > > > > > > > > > Yeah ;)  I'm currently bootstrapping/testing the patch that > > > > makes it possible

Re: [PATCH v3] Optimize strchr to strlen

On Fri, 2016-09-23 at 14:07 +, Wilco Dijkstra wrote: > After discussion (https://gcc.gnu.org/ml/gcc-patches/2016-09/msg00718 > .html) > here is the latest version of the strchr patch.  This uses a gimple > statement for > the pointer addition so the gsi_prev always points at the strlen > call.

[SH][committed] Fix cset_zero pattern regressions

Hi, This fixes a fallout that actually goes back to 5.0 but went unnoticed. The costs for movt and movrt type of insns were not correctly reported and ifcvt thus made some bad choices for SH.  A new cset_zero pattern variant is also required to fix the matching for some recent changes in the middl

Re: [SH][committed] Fix cset_zero pattern regressions

On Sun, 2016-09-25 at 16:06 +0900, Oleg Endo wrote: >  > This fixes a fallout that actually goes back to 5.0 but went > unnoticed.  The costs for movt and movrt type of insns were not > correctly reported and ifcvt thus made some bad choices for SH.  A > new cset_zero pattern

Re: [PATCH v3] Optimize strchr to strlen

On Fri, 2016-09-23 at 23:10 +0900, Oleg Endo wrote: > On Fri, 2016-09-23 at 14:07 +, Wilco Dijkstra wrote: > > > > After discussion (https://gcc.gnu.org/ml/gcc-patches/2016-09/msg007 > > 18 > > .html) > > here is the latest version of the strchr patch.  Thi

Re: [RFC][PATCH] Canonicalize address multiplies

On Tue, 2016-10-04 at 12:53 +, Wilco Dijkstra wrote: > GCC currently doesn't canonicalize address expressions. As a result > inefficient code is generated even for trivial index address > expressions, > blocking CSE and other optimizations: > > int f(int *p, int i) { return p[i+2] + p[i+1]; }

Re: [PATCH] Add constexpr to iterator adaptors, array and range access

On Sat, 2016-07-16 at 00:09 +0100, Jonathan Wakely wrote: > This patch implements http://wg21.link/p0031 which adds constexpr to > most operations on std::reverse_iterator, std::move_iterator, > std::array, as well as std::advance, std::distance, and the > range-access functions std::begin, std::rb

Re: [PATCH v3] Do not simplify "(and (reg) (const bit))" to if_then_else.

On Mon, 2016-12-05 at 04:00 -0600, Segher Boessenkool wrote: > On Mon, Dec 05, 2016 at 10:22:13AM +0100, Dominik Vogt wrote: > > > > On Sat, Dec 03, 2016 at 07:19:13PM -0600, Segher Boessenkool wrote: > > > > > > [ I did not see this patch before, sorry. ] > > > > > > This causes the second half

Re: config/ sync with binutils vs. removing gcc targets.

Hi, Yeah, my SH5/SH64 removal procedures might have been a little too radical, sorry about that.  However ... On Wed, 2016-12-07 at 09:10 +1030, Alan Modra wrote: > I understand that config/ in the gcc repository is the master source > for binutils-gdb config/.  If that's the case then people rem

[SH][committed] Remove SH5 support in compiler

Hi, The removal of SH5 support from GCC has been announced here https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html The attached patch removes support for SH5 in the compiler back end. There are still some leftovers and new simplification opportunities. These will be addressed in later follow up

Re: [SH][committed] Remove SH5 support in compiler

On Thu, 2016-04-28 at 10:27 +0900, Oleg Endo wrote: > The removal of SH5 support from GCC has been announced here > https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html > > The attached patch removes support for SH5 in the compiler back end. > There are still some leftovers and new

Re: [SH][committed] Remove SH5 support in compiler

On Fri, 2016-04-29 at 19:45 +0900, Oleg Endo wrote: > On Thu, 2016-04-28 at 10:27 +0900, Oleg Endo wrote: > > > The removal of SH5 support from GCC has been announced here > > https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html > > > > The attached patch removes suppor

Re: [SH][committed] Remove SH5 support in compiler

On Fri, 2016-04-29 at 23:11 +0900, Oleg Endo wrote: > On Fri, 2016-04-29 at 19:45 +0900, Oleg Endo wrote: > > On Thu, 2016-04-28 at 10:27 +0900, Oleg Endo wrote: > > > > > The removal of SH5 support from GCC has been announced here > > > https://gcc.gnu

Re: [SH][committed] Remove SH5 support in compiler

On Sat, 2016-04-30 at 10:58 +0900, Oleg Endo wrote: > On Fri, 2016-04-29 at 23:11 +0900, Oleg Endo wrote: > > On Fri, 2016-04-29 at 19:45 +0900, Oleg Endo wrote: > > > On Thu, 2016-04-28 at 10:27 +0900, Oleg Endo wrote: > > > > > > > The removal of SH5 s

Re: [SH][committed] Remove SH5 support in compiler

On Sat, 2016-04-30 at 14:44 +0900, Oleg Endo wrote: > On Sat, 2016-04-30 at 10:58 +0900, Oleg Endo wrote: > > On Fri, 2016-04-29 at 23:11 +0900, Oleg Endo wrote: > > > On Fri, 2016-04-29 at 19:45 +0900, Oleg Endo wrote: > > > > On Thu, 2016-04-28 a

Re: [SH][committed] Remove SH5 support in compiler

Joseph, Thanks for keeping an eye on that. On Sat, 2016-04-30 at 09:39 +, Joseph Myers wrote: > On Sat, 30 Apr 2016, Oleg Endo wrote: > > > * config.guess: Remove SH5 support. > > * config.sub: Likewise. > > Please revert. These files must come verbatim fr

[SH][committed] Simplify some predicates

Hi, The attached patch mainly simplifies some of the predicates. There is no functional change, except the removal of the "mov_nop" pattern, which resulted in a few +- 4/8 byte code size changes in the CSiBE set, which look like register allocation choices. But not sure what the original purpose

Re: Remove SH_DIV_CALL2

On Sun, 2016-05-01 at 12:43 +0900, Yoshinori Sato wrote: > Build failed on sh-*-linux and sh-*-netbsd. > Please update. Thanks for spotting it and for the patch. I've committed it as r235688 on your behalf. Cheers, Oleg > > diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h > index 09e9

[SH][committed] Use TARGET_FPU_DOUBLE condition

Hi, The attach patch simplifies the 'TARGET_SH4 || TARGET_SH2A_DOUBLE' checks to 'TARGET_FPU_DOUBLE'. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"; Committed as r235689. Cheers, Oleg gcc/ChangeLog:

[SH][committed] Remove constraints in expanders

Hi, Constraints in expanders do nothing, so we can remove them. That's what the patch does. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"; Committed as r235691. Cheers, Oleg gcc/ChangeLog: * con

Re: [SH][committed] Simplify some predicates

On Sun, 2016-05-01 at 17:05 -0500, Segher Boessenkool wrote: > On Sun, May 01, 2016 at 12:40:15PM +0900, Oleg Endo wrote: > > The attached patch mainly simplifies some of the predicates. There > > is > > no functional change, except the removal of the "mov_nop" p

[SH][committed] Remove defunct mcbranchdi, mcmpeqdi options

Hi, The attached patch removes the defunct mcmpeqdi and mcmpeqdi options, which have been obsoleted a while ago. Moreover, it seems that the cbranchdi4 patterns can be simplified. CSiBE shows some code motion and some +/- 4/8 bytes code size changes, but I didn't spot anything special. Tested o

[SH][committed] Remove *negnegt, *movtt patterns

Hi, The *negnegt, *movtt patterns seem to have no effect anymore. Removing them doesn't show any changes in the CSiBE set and the known related test cases in the testsuite pass. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m

Re: [PATCH] Fix spec-options.c test case

On Mon, 2016-05-02 at 16:13 +0200, Bernd Schmidt wrote: > On 05/02/2016 03:43 PM, Bernd Edlinger wrote: > > Yes, you are right. Only the original use-case seems to be > > sh-superh-elf specific. But there are also spec strings > > that are always available. I think adding -DFOO to > > "cpp_uniqu

[SH][committed] Cleanup div and mul patterns

Hi, The attached patch cleans up the SH div and mul patterns a bit. Almost no changes in CSiBE, except for a few minor improvements. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235803. Chee

[SH][committed] Add support for additional SH2A post-inc/pre-dec addressing modes

Hi, The attached patch adds support for the following SH2A addressing modes: mov.b @-Rm,R0 mov.w @-Rm,R0 mov.l @-Rm,R0 mov.b R0,@Rn+ mov.w R0,@Rn+ mov.l R0,@Rn+ The patch also tweaks the post-inc/pre-dec addressing mode usage on non -SH2

[SH][committed] Add another rotcr variant

Hi, The attached patch adds another combine pattern variant for the SH rotcr instruction. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235950. Cheers, Oleg gcc/ChangeLog: PR target/

[SH][committed] Add some more missing div0s cases

Hi, The attached patch addresses some of the remaining things as mentioned in the PR. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235952. Cheers, Oleg gcc/ChangeLog: PR target/5293

[SH][committed] Fix PR 58219

Hi, The attached patch fixes PR 58219. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235954. gcc/ChangeLog: PR target/58219 * config/sh/predicates.md (long_displacement_mem_op

[SH][committed] Remove some workaround combine patterns

Hi, The attached patch removes some workaround combine patterns. As far as I remember this issue has been addressed by some match.pd patterns. In any case, CSiBE code size shows no difference and the SH specific testcases mentioned in the code pass without the patterns. Tested on sh-elf with m

[SH][committed] Fix length of ic_invalidate_line_sh4a pattern

Hi, The attached patch fixes the length of the ic_invalidate_line_sh4a pattern. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r235957. Cheers, Oleg gcc/ChangeLog: * config/sh/sh.md (i

[SH][committed] Remove deprecated options

Hi, The attached patch removes some deprecated SH options. Tested on sh-elf with 'make all-gcc' and with 'make info dvi pdf'. Committed as r235960. Cheers, Oleg gcc/ChangeLog: * config/sh/sh.opt (madjust-unroll, minvalid-symbols, msoft-atomic, mspace): Remove deprecated options.

[SH][committed] Improve utilization of zero-displacement conditional branches

Hi, On SH a conditional branch with a (physical) zero displacement jumps over the next instruction. On some SH hardware implementations these branches are handled in a special way which allows using it for conditional execution. A while ago I've added some hardcoded asm patterns to utilize this.

[RX] Add support for atomic operations

Hi, The attached patch adds some rudimentary support for atomic operations. On the original RX there is one truly atomic insn "xchg". All other operations have to implement atomicity in some other way. One straight forward option which is already being done on SH is to disable interrupts for th

[SH][committed] Various cleanups

Hi, The attached patch performs various cleanups in the SH code. No functional changes. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r236008. Cheers, Oleg gcc/ChangeLog: * config/sh/

[SH][committed] Convert GET_SH_ARG_CLASS into a function

Hi, The attached patch converts the GET_SH_ARG_CLASS macro into a function. No functional change. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb, -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r236009. Cheers, Oleg gcc/ChangeLog: *

Re: [SH][committed] Remove SH5 support in compiler

On Wed, 2016-05-04 at 00:42 +0200, Eric Botcazou wrote: > > Did that. Looks there are no changes after regeneration. > > Not in the libada directory: > > eric@polaris:~/svn/gcc/libada> svn info configure configure.ac > Path: configure > Name: configure > Working Copy Root Path: /home/eric/svn/gc

Re: [PATCH][4/N] Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION

On 19 Aug 2015, at 22:35, Jeff Law wrote: > On 08/19/2015 06:29 AM, David Sherwood wrote: >>> I asked Richard S. to give this a once-over which he did. However, he >>> technically can't approve due to the way his maintainership position was >>> worded. >>> >>> The one request would be a functi

Re: [PATCH][4/N] Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION

On 26 Aug 2015, at 23:27, Oleg Endo wrote: > > On 19 Aug 2015, at 22:35, Jeff Law wrote: > >> On 08/19/2015 06:29 AM, David Sherwood wrote: >>>> I asked Richard S. to give this a once-over which he did. However, he >>>> technically can't approv

Re: [PATCH][4/N] Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION

s, Oleg >> -----Original Message- >> From: Oleg Endo [mailto:oleg.e...@t-online.de] >> Sent: 26 August 2015 15:53 >> To: Jeff Law >> Cc: David Sherwood; GCC Patches >> Subject: Re: [PATCH][4/N] Introduce new inline functions for >> GET_MODE_UNIT_SIZE and

Re: [PATCH] fix --with-cpu for sh targets

On 30 Aug 2015, at 19:41, Kaz Kojima wrote: > Rich Felker wrote: >> A missing * in the pattern for sh targets prevents the --with-cpu >> configure option from being accepted for certain targets (e.g. ones >> with explicit endianness, like sh2eb). > > Looks good to me, though we need the trunk

Re: [PATCH] add initial support for J2 core to sh target

Hi Rich, On 01 Sep 2015, at 02:49, Rich Felker wrote: > The J2 Core is an open hardware cpu implementing the SH-2 instruction > set, with the addition of barrel shift instructions and an atomic > compare-and-swap instruction. This patch adds a cpu model option -mj2 > to the sh target. Presently

Re: [PATCH] add initial support for J2 core to sh target

On 01 Sep 2015, at 23:18, Rich Felker wrote: > On Tue, Sep 01, 2015 at 10:45:10PM +0900, Oleg Endo wrote: >> It seems that this J2 atomic instruction(s ?) is not available to >> the public. I've skimmed through the currently available J2 hardware >> sources, but could

Re: [PATCH] add initial support for J2 core to sh target

On 02 Sep 2015, at 02:08, Rich Felker wrote: > On Wed, Sep 02, 2015 at 01:24:55AM +0900, Oleg Endo wrote: >>> I'm not sure what the best way to achieve multiple goals is, but the >>> current behavior makes it so you need --isa=any (and a final binary >>> w

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