On 20 August 2013 12:21, Tejas Belagod wrote:
> Hi,
>
> This patch replaces all inline asm implementations of vget_low_* in
> arm_neon.h with optimized implementations using other neon intrinsics.
>
> Tested with aarch64-none-elf.
>
> OK?
This is OK. /Marcus
On 20 August 2013 16:04, Vidya Praveen wrote:
>> 2013-08-20 Vidya Praveen
>>
>> * config/aarch64/aarch64.md (unspec): Add UNSPEC_SISD_SSHL,
>> UNSPEC_SISD_USHL, UNSPEC_USHL_2S, UNSPEC_SSHL_2S, UNSPEC_SISD_NEG.
>> (3_insn): Remove.
>> (aarch64_ashl_sisd_or_int_3)
Hi Venkat,
On 3 August 2013 19:01, Venkataramanan Kumar
wrote:
> This patch adds macros to support gprof in Aarch64. The difference
> from the previous patch is that the compiler, while generating
> "mcount" routine for an instrumented function, also passes the return
> address as argument.
>
>
On 9 August 2013 10:48, James Greenhalgh wrote:
> ---
> gcc/
>
> 2013-08-09 James Greenhalgh
>
> * config/aarch64/aarch64-simd-builtins.def
> (dup_lane_scalar): Remove.
> * config/aarch64/aarch64-simd.md
> (aarch64_simd_dup): Add 'w->w' alternative.
> (a
On 4 September 2013 17:42, Ian Bolton wrote:
> (This patch supercedes this one:
> http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01462.html)
> 2013-09-04 Ian Bolton
>
> gcc/
> * config/aarch64/aarch64.c (aarch64_preferred_reload_class):
> Return NO_REGS for immediate that can't b
On 3 September 2013 12:30, James Greenhalgh wrote:
> 2013-09-03 James Greenhalgh
>
> * config/aarch64/aarch64.md
> (type): Remove frecpe, frecps, frecpx.
> (aarch64_frecp): Move to aarch64-simd.md,
> fix to be a TARGET_SIMD instruction.
> (aarch64_frecp
On 4 September 2013 15:47, Yufeng Zhang wrote:
> gcc/
>
> * config/aarch64/aarch64-option-extensions.def: Add
> AARCH64_OPT_EXTENSION of 'crc'.
> * config/aarch64/aarch64.h (AARCH64_FL_CRC): New define.
> (AARCH64_ISA_CRC): Ditto.
> * doc/invoke.texi (-marc
On 6 September 2013 09:18, James Greenhalgh wrote:
>
> Hi,
>
> Most of the vector-by-element instructions in AArch64 have the restriction
> that, if the vector they are taking an element from has type "h"
> then it must be in a register from the lower half of the vector register
> set (i.e. v0-v15
On 5 September 2013 17:21, Tejas Belagod wrote:
>
> Hi,
>
> This patch fixes vdup_lane_* intrinsics in arm_neon.h to have the
> correct lane parameter as opposed to the present '0'.
>
> Tested on aarch64-none-elf. OK for trunk?
>
> Thanks,
> Tejas Belagod
> ARM.
>
> Changelog:
>
> 2013-09-05 Teja
On 6 September 2013 11:45, James Greenhalgh wrote:
> The signed variants of the qtbl and qtbx intrinsics currently
> take an int8x<8,16> for their control vector parameter.
> This should be a uint8x<8,16> parameter.
>
> Fixed as attached and checked against aarch64.exp on aarch64-none-elf
> with
On 10 September 2013 09:23, James Greenhalgh wrote:
> 2013-09-10 James Greenhalgh
>
> * config/aarch64/aarch64.md (generic_sched): New.
> * config/aarch64/aarch64-generic.md (load): Make conditional
> on generic_sched attribute.
> (nonload): Likewise.
OK
/Marcu
On 13/09/13 19:39, James Greenhalgh wrote:
Hi,
This patch adds intrinsics for vcopy_lane_<8,16,32,64>.
These are implemented in an optimal way using the vget_lane and vset_lane
intrinsics and a combine pattern.
I've added a testcase and run a full regression run for aarch64-none-elf.
OK?
Th
On 13/09/13 19:28, James Greenhalgh wrote:
Hi,
This patch converts the vmul_lane_<16,32,64> intrinsics
in arm_neon.h to a C implementation.
OK
/Marcus
On 13/09/13 19:31, James Greenhalgh wrote:
Hi,
This patch reimpliments the vml_lane and the fm
intrinsics in C, and adds new combiner patterns to support
this.
OK
/Marcus
On 06/09/13 16:06, James Greenhalgh wrote:
gcc/
2013-09-06 James Greenhalgh
* config/aarch64/arm_neon.h
(vcvtx_high_f32_f64): Fix parameters.
OK
/Marcus
On 20 September 2013 15:18, Renlin Li wrote:
> 2013-09-20 Renlin Li
>
> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant.
> (aarch64_expand_epilogue): Likewise.
> (aarch64_legitimize_reload_address): Likewise.
OK
/Marcus
On 10 September 2013 18:12, Yufeng Zhang wrote:
> gcc/
>
> * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args):
> Call aarch64_simd_expand_args to update op[argc].
OK
/Marcus
On 4 June 2013 20:49, Steve Ellcey wrote:
> This patch allows me to build libgfortran for a cross-compiling toolchain
> using newlib. Currently the checks done by AC_CHECK_FUNCS_ONCE fail with
> my toolchain because the compile/link fails due to the configure script not
> using the needed linker
s not regress the tree can be found.
Thoughts?
2013-09-26 Marcus Shawcroft
* configure.ac (AC_CHECK_FUNCS_ONCE): Make if statement
dependent on gcc_no_link.
Cheers
/Marcusdiff --git a/libgfortran/configure.ac b/libgfortran/configure.ac
index 4609eba..411ab38 100644
--- a/libgfo
On 28 September 2013 11:57, Venkataramanan Kumar
wrote:
> 2013-10-28 Venkataramanan Kumar
>
>* config/aarch64/aarch64.h (MCOUNT_NAME): Define.
>(NO_PROFILE_COUNTERS): Likewise.
>(PROFILE_HOOK): Likewise.
>(FUNCTION_PROFILER): Likewise.
>* config/aarch64
On 30 September 2013 09:52, James Greenhalgh wrote:
>
> Hi,
>
> aarch64-common.c. These functions expect a particular form
You meant aarch-common.c here and in the title ;-)
This is fine by me, but as a config/arm/ change needs OK from Ramana or Richard.
/Marcus
> 2013-09-30 James Greenhalgh
On 27/09/13 17:08, Steve Ellcey wrote:
On Thu, 2013-09-26 at 14:47 +0100, Marcus Shawcroft wrote:
I'm in two minds about whether further sticky tape of this form is the
right approach or whether the original patch should be reverted until a
proper fix that does not regress the tree c
On 30 September 2013 14:23, Renlin Li wrote:
> OK for trunk?
>
> Kind regards,
> Renlin Li
>
> gcc/ChangeLog:
>
> 2013-09-30 Renlin Li
>
> * config/arm/arm.c (arm_output_mi_thunk): Use plus_constant.
OK
/Marcus
On 30 September 2013 14:20, Renlin Li wrote:
> gcc/ChangeLog:
>
> 2013-09-30 Renlin Li
>
> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant.
> (aarch64_expand_epilogue): Likewise.
OK
/Marcus
On 30/09/13 13:40, Marcus Shawcroft wrote:
Well, I thought this patch would work for me, but it does not. It looks
like gcc_no_link is set to 'no' on my target because, technically, I can
link even if I don't use a linker script. I just can't find any
functions.
In
> 2013-09-30 Vidya Praveen
>
> * aarch64-simd.md
> (aarch64_l2_internal): Rename to
> ...
> (aarch64_l_hi_internal): ... this;
> Insert '\t' to output template.
> (aarch64_l_lo_internal): New.
> (aarch64_saddl2, aarch64_uaddl2): Modify to call
>
On 11/09/12 15:02, Chris Schlumberger-Socha wrote:
This patch adds predefines for AArch64 code models. These code models are
added as an effective target for the AArch64 platform.
I've committed this patch to aarch64-trunk.
/Marcus
On 05/10/12 16:52, James Greenhalgh wrote:
Hi,
This patch refactors the initialisation code for the Advanced
SIMD builtins under the AArch64 target. The patch has been
regression tested on aarch64-none-elf.
OK for aarch64-branch?
(If yes, someone will have to commit this for me as I do not
ha
On 09/10/12 12:08, James Greenhalgh wrote:
Hi,
This patch adds support for vcond and vcondu to the AArch64
backend.
Tested with no regressions on aarch64-none-elf.
OK for aarch64-branch?
(If so, someone will have to commit for me, as I do not
have commit rights.)
Thanks
James Greenhalgh
--
I've just committed this patch to aarch64-trunk to resolve an ICE in
aarch64_split_doubleword_move when attempting to split v->v moves.
/Marcus
2012-10-16 Marcus Shawcroft
* config/aarch64/aarch64-protos.h (aarch64_split_doubleword_move):
Rename to aarch64_split_128
On 15/10/12 11:03, Marcus Shawcroft wrote:
On 11/09/12 15:02, Chris Schlumberger-Socha wrote:
This patch adds predefines for AArch64 code models. These code models are
added as an effective target for the AArch64 platform.
I've committed this patch to aarch64-trunk.
/Marcus
.. and
On 16/10/12 16:10, Marcus Shawcroft wrote:
I've just committed this patch to aarch64-trunk to resolve an ICE in
aarch64_split_doubleword_move when attempting to split v->v moves.
/Marcus
2012-10-16 Marcus Shawcroft
* config/aarch64/aarch64-protos.h (aarch64_split_doublew
Folks,
We would like to request the merge of aarch64-branch into trunk.
This series of patches represents the delta from gcc trunk @r192445 to
aarch64-branch @r192535.
The patch set is broken down as follows:
[1/10] gcc configury
This patch contains the adjustments to top level gcc configur
This patch contains the adjustments to top level gcc configury required
to enable the AArch64 port.
Proposed ChangeLog:
* config.gcc: Add AArch64.
* configure.ac: Add AArch64 TLS support detection.
* configure: Regenerate.
diff --git a/gcc/config.gcc b/gcc/config.gc
This patch contains the additions to the gcc/doc files to document
the AArch64 port.
Proposed ChangeLog:
* doc/invoke.texi (AArch64 Options): New.
* doc/md.texi (Machine Constraints): Add AArch64.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index
a9a79343985bdc6bcd0
This patch adjusts the libatomic configury for AArch64.
Proposed ChangeLog:
* configure.tgt: Mark libatomic unsupported.diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index
847ac41ebed81efff601fcb966d76f35d228dda2..0caa0f42ff99766d1020acd8d966509d0f3447ce
100644
--- a/
This patch contains the adjustments to the existing test suite to
support AArch64.
Proposed ChangeLog:
* lib/target-supports.exp
(check_profiling_available): Add AArch64.
(check_effective_target_vect_int): Likewise.
(check_effective_target_vect_shift): Likewis
This patch adjusts the libcpp configury for AArch64.
Proposed ChangeLog:
* configure.ac: Enable AArch64.
* configure: Regenerate.diff --git a/libcpp/configure.ac b/libcpp/configure.ac
index
29bd8c5e6f1a7bddb628f415f3138dfeaa69a483..e62da06ce278f832084ff2080d694c99e24f8532
10064
This patch adjusts the libgomp configury for AArch64.
Proposed ChangeLog:
* configure.tgt: Add AArch64.diff --git a/libgomp/configure.tgt b/libgomp/configure.tgt
index
d5a1480e4812634ae280238684cb2187b2c618f8..2eecc93a349f3afe9e0afbbc2e98194065873498
100644
--- a/libgomp/configure.tgt
This patch provides the AArch64 libstdc++-v3 port, it contains both the
required configury adjustment to config.host and the new file introduced
by the AArch64 port.
Proposed ChangeLog:
* config/cpu/aarch64/cxxabi_tweaks.h: New file.
* configure.host: Enable aarch64.diff --git
This patch provides the AArch64 libgcc port, it contains both the
required configury adjustment to config.host and the new files
introduced by the AArch64 port.
Proposed ChangeLog:
* config.host (aarch64*-*-elf, aarch64*-*-linux*): New.
* config/aarch64/crti.S: New file.
On 23/10/12 16:38, Jeff Law wrote:
Given that you and Richard Earnshaw are the approved maintainers for the
AAarch64 port, I'm going to give this an OK without diving into it. I'm
going to assume you and Richard will iterate with anyone who does dive
deeply into the port and has comments/sugges
On 23/10/12 16:14, Jeff Law wrote:
On 10/23/2012 03:42 AM, Marcus Shawcroft wrote:
This patch adjusts the libatomic configury for AArch64.
Proposed ChangeLog:
* configure.tgt: Mark libatomic unsupported.
This is good. Please install. Presumably at some point in the not too
On 23/10/12 15:39, Joseph S. Myers wrote:
On Tue, 23 Oct 2012, Marcus Shawcroft wrote:
+@item -mcmodel=tiny
+@opindex mcmodel=tiny
+Generate code for the tiny code model. The program and its statically defined
+symbols must be within 1GB of each other. Pointers are 64 bits. Programs can
+be
On 23/10/12 10:42, Marcus Shawcroft wrote:
Folks,
We would like to request the merge of aarch64-branch into trunk.
All of the patches approved by Jeff and Jakub are now committed, with
the documentation correction requested by Joseph.
/Marcus
Hi, This patch was actually written by Ian, I'm submitting it on his
behalf.
/Marcus
In draft revisions of the A64 ISA it was not possible to use SP on the
right hand side of a register + register add. This meant that we needed
two scratch registers when a large constant was being added to
Shawcroft
PR target/58460
* config/aarch64/aarch64.md (*adds_mul_imm_)
(*subs_mul_imm_)
(*add__, *add__si_uxtw,*add_mul_imm_)
(*sub__)
(*sub__si_uxtw,*sub_mul_imm_, *sub_mul_imm_si_uxtw):
Remove k constraint.
2013-10-03 Marcus Shawcroft
On 03/10/13 11:54, Marcus Shawcroft wrote:
This fixes PR58460, the add and sub shifted register instruction forms
in AArch64 do not permit the stack register. This patch removes k
constraint from the relevant patterns and adds reduced form of the test
case.
Regression test aarch64-none-elf
On 3 October 2013 23:43, Michael Hudson-Doyle wrote:
> Hi,
>
> As libatomic builds for and the tests pass on AArch64 (built on x86_64
> but tested on a foundation model, logs and summary:
>
> http://people.linaro.org/~mwhudson/libatomic.sum.txt
> http://people.linaro.org/~mwhudson/runtest-
On 1 October 2013 12:40, Marcus Shawcroft wrote:
> Patch attached.
>
> /Marcus
>
> 2013-10-01 Marcus Shawcroft
>
> * configure.ac (AC_CHECK_FUNCS_ONCE): Add for exit() then make
> existing AC_CHECK_FUNCS_ONCE dependent on outcome.
Ping.
On 8 October 2013 17:10, Alex Velenko wrote:
> gcc/testsuite/
>
> 2013-10-08 Alex Velenko
>
> * gcc.target/aarch64/vneg_f.c: New testcase.
> * gcc.target/aarch64/vneg_s.c: New testcase.
>
> gcc/
>
> 2013-10-08 Alex Velenko
>
> * config/aarch64/arm_neon.h (vneg_f32):
On 8 October 2013 17:25, Alex Velenko wrote:
> gcc/testsuite/
>
> 2013-09-10 Alex Velenko
>
> * gcc.target/aarch64/vdiv_f.c: New testcase.
>
> gcc/
>
> 2013-09-10 Alex Velenko
>
> * config/aarch64/arm_neon.h (vdiv_f64): Added.
OK. I fixed the date format for the pro
On 8 October 2013 17:35, Alex Velenko wrote:
> 2013-10-08 Alex Velenko
>
> * gcc.target/aarch64/vadd_f64.c: New testcase.
> * gcc.target/aarch64/vsub_f64.c: New testcase.
>
> gcc/
>
> 2013-10-08 Alex Velenko
>
> * config/aarch64/arm_neon.h (vadd_f64): Implementation
On 8 October 2013 17:45, Alex Velenko wrote:
>
> 2013-10-08 Alex Velenko
>
> * gcc.target/aarch64/vclz.c: New testcase.
>
> gcc/
>
> 2013-10-08 Alex Velenko
>
> * config/aarch64/arm_neon.h (vclz_s8): Asm replaced with C
> (vclz_s16): Likewise.
>
The test case add here:
http://gcc.gnu.org/ml/gcc-patches/2013-10/msg00474.html
Introduced an unprototyped call to abort() resulting in failures due to
unexepected warnings in aarch64-none-elf cross testing.
Committed to trunk as obvious.
Cheers
/Marcus
2013-10-09 Marcus Shawcroft
Hi,
The libstdc++-v3 testcase atomic/cons/49445.cc fails for a variety of
arm configurations that do not provide atomic builtins because the test
is not gated by dg-require-atomic-builtins
OK ?
/M
2013-10-10 Marcus Shawcroft
* testsuite/29_atomics/atomic/cons/49445.cc
On 11 October 2013 17:45, James Greenhalgh wrote:
>
> Hi,
>
> The vtbx intrinsics are implemented in assembly without noting
> that their tmp1 operand is early-clobber. This can, when the
> wind blows the wrong way, result in us making a total mess of
> the state of registers.
>
> Fix by marking t
On 1 October 2013 12:40, Marcus Shawcroft wrote:
> On 30/09/13 13:40, Marcus Shawcroft wrote:
>
>>> Well, I thought this patch would work for me, but it does not. It looks
>>> like gcc_no_link is set to 'no' on my target because, technically, I can
>>&g
leave this on the list 24h before committing.
/Marcus
2013-10-16 Marcus Shawcroft
* config/aarch64/aarch64.c (aarch64_preferred_reload_class): Adjust
handling of STACK_REG.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index da3962f..7fce7a0 100644
---
that includes SP.
Regressed aarch64-none-elf, committed.
/Marcus
2013-10-16 Marcus Shawcroft
* config/aarch64/aarch64.c (aarch64_regno_regclass): Classify
FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config
On 16 October 2013 15:58, James Greenhalgh wrote:
>
> Hi,
>
> To move a scalar char/short/int around in the vector registers there
> is no such instruction as:
> dup v0, v0.h[0]
> But there is:
> dup h0, v0.h[0]
> (Alternately there is dup v0.4h, v0.h[0], but I don't think that
> is what we ar
On 17 October 2013 10:43, Michael Hudson-Doyle
wrote:
> Resending as the previous attempt went missing...
>
> 2013-10-04 Michael Hudson-Doyle
>
> * libatomic/configure.tgt (aarch64*): Remove code preventing
> build.
>
> * gcc/testsuite/lib/target-supports
the list for a few days before
committing to give folks knowledgable on reload and the associated
target hooks the opportunity to comment.
Thanks
/Marcus
2013-10-17 Ian Bolton
Marcus Shawcroft
* config/aarch64/aarch64.c (aarch64_preferred_reload_class):
Special cas
On 17 October 2013 12:13, Kyrill Tkachov wrote:
> [gcc/]
> 2013-10-17 Kyrylo Tkachov
>
> * config/aarch64/aarch64.c (aarch64_print_operand): Handle 'c'.
>
> [gcc/testsuite]
> 2013-10-17 Kyrylo Tkachov
>
> * gcc.target/aarch64/c-output-template.c: New testcase.
> * gcc.target/aar
On 17 October 2013 17:27, James Greenhalgh wrote:
>
> Hi,
>
> I spotted that the types of arguments to these intrinsics are wrong,
> which results in all sorts of fun issues!
>
> Fixed thusly, regression tested with aarch64.exp on aarch64-none-elf
> with no issues.
>
> OK?
>
> Thanks,
> James
>
>
On 21 October 2013 09:41, Kyrill Tkachov wrote:
> [gcc/testsuite]
> 2013-10-21 Kyrylo Tkachov
>
> * gcc.target/aarch64/c-output-mod-2.c: Fix for -fPIC.
> * gcc.target/aarch64/c-output-mod-3.c: Likewise.
OK
/Marcus
On 15 October 2013 22:35, Mike Stump wrote:
> Would be nice for a build/config person to weigh in or to upgrade and make
> bullet proof the system against such failures. My take, by default, the
> compile line should do something useful, and that should be enough for
> autoconf style tests to
On 11 January 2016 at 11:53, James Greenhalgh wrote:
>
> ---
> 2015-12-10 James Greenhalgh
>
> * config/aarch64/aarch64.c (use_rsqrt_p): Always use software
> reciprocal sqrt for -mlow-precision-recip-sqrt.
>
OK /Marcus
On 20 January 2016 at 15:22, James Greenhalgh wrote:
> gcc/
>
> 2016-01-20 James Greenhalgh
> Ramana Radhakrishnan
>
> * config/aarch64/aarch64.c (aarch64_expand_vector_init): Refactor,
> always use lane loads to construct non-constant vectors.
>
> gcc/testsuite/
On 26 January 2016 at 16:04, James Greenhalgh wrote:
> 2016-01-25 James Greenhalgh
>
> * config/aarch64/aarch64.md
> (arch64_sqrdmlh_lane): Fix register
> constraints for operand 3.
> (aarch64_sqrdmlh_laneq): Likewise.
>
OK /Marcus
On 11 January 2016 at 12:04, James Greenhalgh wrote:
> 2015-12-11 James Greenhalgh
>
> * config/aarch64/aarch64.c (cortexa57_tunings): Remove
> AARCH64_EXTRA_TUNE_RECIP_SQRT.
>
OK /Marcus
On 1 December 2013 19:55, Michael Hudson-Doyle
wrote:
> Ian Lance Taylor writes:
>
>> I've gotten a patch from Michael Hudson-Doyle to set GOARCH to arm64
>> on an Aarch64 system (https://codereview.appspot.com/34830045/).
>
> Haha, go us.
>
>> I've gotten a patch from Matthias Klose to set GOARC
On 2 December 2013 23:44, Vladimir Makarov wrote:
> If somebody with the rights approves, I can commit it tomorrow.
>
> 2013-12-02 Vladimir Makarov
>
> * config/aarch64/aarch64.c (aarch64_frame_pointer_required): Check
> LR_REGNUM.
> (aarch64_can_eliminate): Don't check
Hi
On 3 December 2013 21:24, Andrew Pinski wrote:
> +(define_insn "trap"
> + [(trap_if (const_int 1) (const_int 8))]
> + ""
> + "brk #1000")
Please add a type attribute to the pattern. The type attributes are
now shared between arm and aarch64 backends.You should use the
type value intr
On 3 December 2013 21:24, Andrew Pinski wrote:
> * config/aarch64/t-aarch64 (MULTILIB_OPTIONS): Fix definition so
> that options are conflicting ones.
Looks fine to me, commit it.
/Marcus
On 6 December 2013 17:35, Tejas Belagod wrote:
> 2013-12-06 Tejas Belagod
>
> * config/aarch64/aarch64.h (TARGET_CRYPTO): New.
> (__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true.
OK, but don;t apply until the rest of this patch series is approved.
/Marcus
On 6 December 2013 17:35, Tejas Belagod wrote:
> * config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
> crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
> crypto_sha256_slow): New.
Looks ok to me, but get an ack from Ramana.
Note that part of this
On 6 December 2013 17:36, Tejas Belagod wrote:
> * gcc.target/aarch64/aes.c: New.
Add _1 on the test case file name (see http://gcc.gnu.org/wiki/TestCaseWriting)
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index dc56170..9f35e09 100644
> --- a/gcc/con
Same comments as previous patch:
On 6 December 2013 17:36, Tejas Belagod wrote:
> testsuite/
> * gcc.target/aarch64/sha1.c: New.
Add _1 on the test case file name (see http://gcc.gnu.org/wiki/TestCaseWriting)
> +static __inline uint32x4_t
> +vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t
On 6 December 2013 17:36, Tejas Belagod wrote:
>
> Hi,
>
> The attached patch implements support for crypto sha256.
Same comments as previous crypto patch.
/Marcus
On 3 December 2013 21:24, Andrew Pinski wrote:
>
> While compiling some programs, GCC and glibc (and newlib)'s definitions of
> size_t
> were not agreeing and causing format warnings to happen. The simple testcase
> for this is:
> #include
> #include
>
> int main(void)
> {
> ssize_t t = 0x1
Hi,
On 10 December 2013 01:52, Andrew Pinski wrote:
> On Mon, Dec 9, 2013 at 12:12 PM, Yufeng Zhang wrote:
>> To be more explicit and consistent, the name of the ILP32 loader shall have
>> 'ilp32' instead of '32'. The extension field shall be appended to
>> 'aarch64', separated by '_', and we
On 10/12/13 20:23, Kugan wrote:
gcc/
+2013-12-11 Kugan Vivekanandarajah
+ * configure.ac: Add check for aarch64 assembler -mabi support.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * config/aarch64/aarch64-elf.h (ASM_MABI_SPEC): New define.
+ (ASM_SP
On 18 December 2013 12:23, James Greenhalgh wrote:
> 2013-12-18 James Greenhalgh
>
> * config/aarch64/aarch64-cores.def: Add new column for
> SCHEDULER_IDENT.
> * config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle
> SCHEDULER_IDENT.
> * config/aarch64/
On 18 December 2013 12:23, James Greenhalgh wrote:
> 2013-12-18 James Greenhalgh
>
> * common/config/aarch64/aarch64-common.c
> (aarch64_rewrite_selected_cpu): New.
> (aarch64_rewrite_mcpu): New.
> * config/aarch64/aarch64-protos.h
> (aarch64_rewrite_sel
On 18 December 2013 12:23, James Greenhalgh wrote:
> 2013-12-18 James Greenhalgh
>
> * config/aarch64/aarch64-cores.def: Add support for
> -mcpu=cortex-a57.cortex-a53.
> * config/aarch64/aarch64-tune.md: Regenerate.
> * doc/invoke.texi: Document -mcpu=cortex-a57
On 18 December 2013 15:28, Tejas Belagod wrote:
> 2013-12-18 Tejas Belagod
>
>
> gcc/
> * config/aarch64/aarch64-simd-builtins.def: Update builtins table.
> * config/aarch64/aarch64-builtins.c
> (aarch64_types_binopu_qualifiers,
> TYPES_BINOPU): New.
>
> * confi
On 18 December 2013 15:28, Tejas Belagod wrote:
> 2013-12-18 Tejas Belagod
>
> gcc/
> * config/aarch64/aarch64-simd-builtins.def: Update builtins table.
> * config/aarch64/aarch64-builtins.c
> (aarch64_types_ternopu_qualifiers,
> TYPES_TERNOPU): New.
>
> * confi
On 18 December 2013 15:28, Tejas Belagod wrote:
> 2013-12-18 Tejas Belagod
>
>
> gcc/
> * config/aarch64/aarch64-simd-builtins.def: Update builtins table.
> * config/aarch64/aarch64-simd.md
> (aarch64_crypto_sha256hv4si,
> aarch64_crypto_sha256su0v4si, aarch64_crypto_sh
On 18 December 2013 15:28, Tejas Belagod wrote:
>> 2013-12-06 Tejas Belagod
>>
>> gcc/
>> * config/aarch64/aarch64-builtins.c: Define builtin types for
>> poly64_t
>> poly128_t.
>> * aarch64/aarch64-simd-builtins.def: Update builtins table.
>> * config/aarch64/a
Hi,
This patch defines the AArch64 BE loader name. Corresponding patches
for glibc and binutils have been posted on the relevant lists.
/Marcus
* config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): Expand
loader
name using mbig-endian.
(LINUX_TARGET_LINK_SPEC): Pas
On 07/01/14 17:02, James Greenhalgh wrote:
Ugh.
Now we have two ASM_SPECs which try to handle -mcpu as input.
One of them just returns the input, the other does the cpu rewriting
we actually want, so we can end up with:
gcc -mcpu=cortex-a57.cortex-a53
Getting passed through to the assembl
On 6 January 2014 12:30, Yufeng Zhang wrote:
> This patch fixes the implementation of vcvtmd_s64_f64 and vcvtpd_s64_f64 in
> arm_neon.h to use llfloor and llceil instead, which are ILP32-friendly.
>
> This patch will fix the following test failure in the ILP32 mode:
>
> FAIL: gcc.target/aarch64/ve
On 15 January 2014 00:09, Andrew Pinski
wrote:
> ChangeLog:
> * config/aarch64/aarch64.c (aarch64_register_move_cost): Correct cost
> of moving from/to the STACK_REG register class.
+ /* Moving between GPR and stack cost is the same as GP2GP. */
Don't forget the double space after period.
Oth
On 7 July 2015 at 13:33, Jiong Wang wrote:
> 2015-07-06 Jiong Wang
>
> gcc/
> * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Mark mem as
> READONLY and NOTRAP for PIC symbol.
>
> gcc/testsuite/
> * gcc.target/aarch64/got_mem_hoist.c: New test.
Looks, OK to me. Follow t
On 21 July 2015 at 16:37, James Greenhalgh wrote:
> On Thu, Jul 16, 2015 at 04:20:59PM +0100, Kyrill Tkachov wrote:
>> +static bool
>> +aarch64_process_one_target_attr (char *arg_str, const char* pragma_or_attr)
>> +{
>> + bool ret;
>> + bool invert = false;
>> +
>> + int len = strlen (arg_str
On 22 July 2015 at 18:13, Szabolcs Nagy wrote:
> Same as
> https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01387.html
> but for AArch64.
>
> -dynamic-linker is only passed to the linker if !static && !shared.
>
> -rdynamic handling is changed too to be consistent with arm:
> only pass -export-dynami
On 22 July 2015 at 18:22, Szabolcs Nagy wrote:
> 2015-07-22 Szabolcs Nagy
>
> * config/aarch64/aarch64-elf-raw.h (LINK_SPEC): Handle -h, -static,
> -shared, -symbolic, -rdynamic.
OK, this should be back ported to 5 and 4.9 aswell.
Thanks
/Marcus
On 16 September 2015 at 08:40, James Greenhalgh
wrote:
>
> Hi,
>
> This patch adds expanders for copysigndf3 and copysignsf3 to the AArch64
> backend. These use the BSL/BIT/BIF insn to save us from the default
> expansion pattern.
>
> Bootstrapped on aarch64-none-linux-gnu with no issues, and chec
Hi,
Thanks for your work on this. There are a bunch of predominantly
style nits in line below. My none nit comments on this patch are:
This should be left turned off for all cores where we have not seen
benchmark numbers to indicate that this optimization is a benefit, we
can take patches for e
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