On Fri, May 24, 2024 at 9:27 AM Richard Biener wrote:
>
> On Thu, 23 May 2024, Manolis Tsamis wrote:
>
> > This pass detects cases of expensive store forwarding and tries to avoid
> > them
> > by reordering the stores and using suitable bit insertion sequences.
>
et/aarch64/ifcvt_multiple_sets_arithm.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v4:
- Remove unnecessary hardcoded list of allowed ops in
bb_ok_for_noce_convert_multiple_sets.
- Set need_cmov based on BB live_out instead of REG_DEAD notes.
- Fix preexisting issues and i
unnecessary hardcoded list of allowed ops in
bb_ok_for_noce_convert_multiple_sets.
- Set need_cmov based on BB live_out instead of REG_DEAD notes.
- Fix preexisting issues and improve the code that sets read_comparison.
Manolis Tsamis (3):
[RFC] ifcvt: handle sequences that
bbers): Use modified_in_p instead.
(noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
Refactor the code that sets read_comparison.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc | 106 -
(struct noce_multiple_sets_info): Introduce new struct
noce_multiple_sets_info to store info for noce_convert_multiple_sets.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc
-off-by: Manolis Tsamis
---
.../aarch64/vect-slp-two-operator.c | 42
gcc/tree-vect-slp.cc | 234 ++
2 files changed, 276 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/vect-slp-two-operator.c
diff --git a/gcc/testsuite
.
* gcc.target/aarch64/avoid-store-forwarding-3.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-4.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-5.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v5:
- Fix bug with BIG_ENDIAN targets
: Manolis Tsamis
---
gcc/ifcvt.cc | 6 ++-
gcc/testsuite/gcc.target/i386/pr116353.c | 55
2 files changed, 59 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr116353.c
diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc
372.c: New test.
* gcc.dg/pr116405.c: New test.
Signed-off-by: Manolis Tsamis
---
gcc/ifcvt.cc| 22 ++
gcc/testsuite/gcc.dg/pr116372.c | 13 +
gcc/testsuite/gcc.dg/pr116405.c | 17 +
3 files changed, 48 insertions(+), 4
On Tue, Aug 13, 2024 at 10:48 PM Jeff Law wrote:
>
>
>
> On 8/13/24 5:57 AM, Manolis Tsamis wrote:
> > Now that more operations are allowed for noce_convert_multiple_sets, we
> > need to
> > check noce_can_force_operand on the sequence before calling
> >
vt.cc (noce_convert_multiple_sets): Disallow call insns.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pr116358.c: New test.
Signed-off-by: Manolis Tsamis
---
gcc/ifcvt.cc| 2 +-
gcc/testsuite/gcc.target/aarch64/pr116358.c | 15 +++
2 files changed, 16 insertions(
Hi Richard,
Thanks a lot for the extensive review and useful suggestions (and
sorry for the late reply). I have implemented most of these for a next
version, so let me address your individual comments below:
On Fri, Aug 16, 2024 at 5:33 PM Richard Sandiford
wrote:
>
> Manolis Tsamis
On Wed, Jun 5, 2024 at 2:00 PM Richard Sandiford
wrote:
>
> Sorry for the slow review.
>
> Manolis Tsamis writes:
> > This is an extension of what was done in PR106590.
> >
> > Currently if a sequence generated in noce_convert_multiple_sets clobbers the
> >
-2.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-3.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-4.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v2:
- Allow modes that are not scalar_int_mode.
- Introduce simple costing to avoid
On Fri, May 24, 2024 at 9:27 AM Richard Biener wrote:
>
> On Thu, 23 May 2024, Manolis Tsamis wrote:
>
> > This pass detects cases of expensive store forwarding and tries to avoid
> > them
> > by reordering the stores and using suitable bit insertion sequences.
>
On Sat, Jun 8, 2024 at 1:31 AM Jeff Law wrote:
>
>
>
> On 6/6/24 4:10 AM, Manolis Tsamis wrote:
> > This pass detects cases of expensive store forwarding and tries to avoid
> > them
> > by reordering the stores and using suitable bit insertion sequences.
> &g
On Sun, Jun 9, 2024 at 5:29 PM Jeff Law wrote:
>
>
>
> On 6/7/24 4:31 PM, Jeff Law wrote:
>
> >
> > I've actually added it to my tester just to see if there's any fallout.
> > It'll take a week to churn through the long running targets that
> > bootstrap in QEMU, but the crosses should have data M
On Wed, Jun 5, 2024 at 11:07 AM Richard Biener wrote:
>
> On Tue, 4 Jun 2024, Manolis Tsamis wrote:
>
> > This change adds a function that checks for SLP nodes with multiple
> > occurrences
> > of the same statement (e.g. {A, B, A, B, ...}) and tries to rearrange the
On Mon, Jun 10, 2024 at 9:27 PM Philipp Tomsich
wrote:
>
> On Mon, 10 Jun 2024 at 20:03, Jeff Law wrote:
> >
> >
> >
> > On 6/10/24 1:55 AM, Manolis Tsamis wrote:
> >
> > >>
> > > There was an older submission of a load-pair specific pass
-2.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-3.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-4.c: New test.
* gcc.target/aarch64/avoid-store-forwarding-5.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v3:
- Only emit SUBREG
On Sun, Jun 9, 2024 at 5:29 PM Jeff Law wrote:
>
>
>
> On 6/7/24 4:31 PM, Jeff Law wrote:
>
> >
> > I've actually added it to my tester just to see if there's any fallout.
> > It'll take a week to churn through the long running targets that
> > bootstrap in QEMU, but the crosses should have data M
=98138
gcc/ChangeLog:
* tree-vect-slp.cc: Avoid duplicates in two_operators nodes.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vect-slp-two-operator.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v2:
- Do not use predefined patterns; support rearrangement of
n 26, 2024 at 3:06 PM Manolis Tsamis wrote:
>
> This change checks when a two_operators SLP node has multiple occurrences of
> the same statement (e.g. {A, B, A, B, ...}) and tries to rearrange the
> operands
> so that there are no duplicates. Two vec_perm expressions are then introdu
On Wed, Jun 5, 2024 at 11:07 AM Richard Biener wrote:
>
> On Tue, 4 Jun 2024, Manolis Tsamis wrote:
>
> > This change adds a function that checks for SLP nodes with multiple
> > occurrences
> > of the same statement (e.g. {A, B, A, B, ...}) and tries to rearrange the
-related bug when SEQ modifies COND.
Manolis Tsamis (3):
[RFC] ifcvt: handle sequences that clobber flags in
noce_convert_multiple_sets
[RFC] ifcvt: Allow more operations in multiple set if conversion
[RFC] ifcvt: Handle multiple rewired regs and refactor
noce_convert_multiple_sets
gcc
et/aarch64/ifcvt_multiple_sets_arithm.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v5:
- Loop over SEQ and check modified_in_p for all instructions.
- Fix x86-related bug when SEQ modifies COND.
gcc/ifcvt.cc | 34 +++-
.../aarch64/ifcvt_multiple_set
(struct noce_multiple_sets_info): Introduce new struct
noce_multiple_sets_info to store info for noce_convert_multiple_sets.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc
f the
if_then_else emitted more robust.
gcc/ChangeLog:
* ifcvt.cc (check_for_cc_cmp_clobbers): Use modified_in_p instead.
(noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
Punt if seq clobbers cond. Refactor the code that sets read_comparison.
Signed-off-b
On Thu, Jul 11, 2024 at 1:03 AM Jeff Law wrote:
>
>
>
> On 6/3/24 5:34 AM, Manolis Tsamis wrote:
> > This is an extension of what was done in PR106590.
> >
> > Currently if a sequence generated in noce_convert_multiple_sets clobbers the
> > condition rtx (cc_
On Wed, Jun 5, 2024 at 2:00 PM Richard Sandiford
wrote:
>
> Sorry for the slow review.
>
> Manolis Tsamis writes:
> > This is an extension of what was done in PR106590.
> >
> > Currently if a sequence generated in noce_convert_multiple_sets clobbers the
> >
f the
if_then_else emitted more robust.
gcc/ChangeLog:
* ifcvt.cc (check_for_cc_cmp_clobbers): Use modified_in_p instead.
(noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
Punt if seq clobbers cond. Refactor the code that sets read_comparison.
Signed-off-b
SEQ and check modified_in_p for all instructions.
- Fix x86-related bug when SEQ modifies COND.
Manolis Tsamis (3):
ifcvt: handle sequences that clobber flags in
noce_convert_multiple_sets
ifcvt: Allow more operations in multiple set if conversion
ifcvt: Handle multiple rewired
et/aarch64/ifcvt_multiple_sets_arithm.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v5:
- Loop over SEQ and check modified_in_p for all instructions.
- Fix x86-related bug when SEQ modifies COND.
gcc/ifcvt.cc | 34 +++-
.../aarch64/ifcvt_multiple_set
(struct noce_multiple_sets_info): Introduce new struct
noce_multiple_sets_info to store info for noce_convert_multiple_sets.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc
Pinging this for a review and/or further feedback.
Thanks,
Manolis
On Wed, Jun 26, 2024 at 3:06 PM Manolis Tsamis wrote:
>
> This change checks when a two_operators SLP node has multiple occurrences of
> the same statement (e.g. {A, B, A, B, ...}) and tries to rearrange the
> o
s no change needed for that comment.
> I can't comment on ifcvt changes to say if they're OK or not otherwise,
> sorry.
>
> >
> > Thanks,
> > Philipp.
> >
> >
> > On Fri, 26 Jul 2024 at 12:50, Sam James wrote:
> >>
> >> Mano
ned-off-by: Manolis Tsamis
---
gcc/match.pd| 30 ++
gcc/testsuite/gcc.dg/pr109393.c | 16
2 files changed, 46 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/pr109393.c
diff --git a/gcc/match.pd b/gcc/match.pd
index d401e7503e6..1
unnecessary hardcoded list of allowed ops in
bb_ok_for_noce_convert_multiple_sets.
- Set need_cmov based on BB live_out instead of REG_DEAD notes.
- Fix preexisting issues and improve the code that sets read_comparison.
Manolis Tsamis (3):
[RFC] ifcvt: handle sequences that
bbers): Use modified_in_p instead.
(noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
Refactor the code that sets read_comparison.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc | 106 -
(struct noce_multiple_sets_info): Introduce new struct
noce_multiple_sets_info to store info for noce_convert_multiple_sets.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test.
Signed-off-by: Manolis Tsamis
---
(no changes since v1)
gcc/ifcvt.cc
et/aarch64/ifcvt_multiple_sets_arithm.c: New test.
Signed-off-by: Manolis Tsamis
---
Changes in v4:
- Remove unnecessary hardcoded list of allowed ops in
bb_ok_for_noce_convert_multiple_sets.
- Set need_cmov based on BB live_out instead of REG_DEAD notes.
- Fix preexisting issues and i
On Thu, Oct 19, 2023 at 10:41 PM Richard Sandiford
wrote:
>
> Manolis Tsamis writes:
> > This is an extension of what was done in PR106590.
> >
> > Currently if a sequence generated in noce_convert_multiple_sets clobbers the
> > condition rtx (cc_cmp or rev_
On Thu, Oct 19, 2023 at 10:46 PM Richard Sandiford
wrote:
>
> Manolis Tsamis writes:
> > Currently the operations allowed for if conversion of a basic block with
> > multiple sets are few, namely REG, SUBREG and CONST_INT (as controlled by
> > bb_ok_for_noce_convert_mult
On Thu, Nov 23, 2023 at 11:01 PM Richard Sandiford
wrote:
>
> Manolis Tsamis writes:
> > The existing implementation of need_cmov_or_rewire and
> > noce_convert_multiple_sets_1 assumes that sets are either REG or SUBREG.
> > This commit enchances them so they can han
On Thu, Apr 25, 2024 at 2:40 AM Hans-Peter Nilsson wrote:
>
> On Tue, 23 Apr 2024, Manolis Tsamis wrote:
> > diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c
> > b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c
> ...
> > +/*
On Thu, May 2, 2024 at 4:00 PM Richard Biener wrote:
>
> On Tue, 23 Apr 2024, Manolis Tsamis wrote:
>
> > The original motivation for this pattern was that the following function
> > does
> > not fold to 'return 1':
> >
> > int foo(int *a, int j
map per SLP instance.
gcc/testsuite/ChangeLog:
* gcc.dg/pr116352.c: New test.
Signed-off-by: Manolis Tsamis
---
gcc/testsuite/gcc.dg/pr116352.c | 18 ++
gcc/tree-vect-slp.cc| 12 +++-
2 files changed, 25 insertions(+), 5 deletions(-)
create
h the code,
this looked like a general issue to me and hence I'm proposing this
fix.
Thanks,
Manolis
On Fri, Aug 30, 2024 at 1:46 PM Manolis Tsamis wrote:
>
> Currently we do SLP CSE after permute optimization using a single map across
> all SLP instances. These SLP instances c
On Thu, Aug 29, 2024 at 9:16 PM Richard Sandiford
wrote:
>
> Manolis Tsamis writes:
> > On Fri, Aug 16, 2024 at 5:33 PM Richard Sandiford
> > wrote:
> >> Manolis Tsamis writes:
> >> > +}
> >> > +
> >> > + virtual
On Fri, Aug 30, 2024 at 2:24 PM Richard Biener wrote:
>
> On Fri, 30 Aug 2024, Manolis Tsamis wrote:
>
> > For more context please see
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116352#c11.
> >
> > I've sent this as an RFC because it's hard to be s
ble): Likewise.
> > (ipa_fn_summary_t::duplicate): Likewise.
> > (analyze_function_body): Likewise.
> > (estimate_edge_size_and_time): Likewise.
> > (remap_edge_summaries): Likewise.
> > * ipa-inline-transform.cc (inline
On Sun, Nov 13, 2022 at 3:33 AM Jeff Law via Gcc-patches
wrote:
>
>
> On 11/7/22 15:07, Palmer Dabbelt wrote:
> > On Thu, 03 Nov 2022 15:23:28 PDT (-0700), j...@ventanamicro.com wrote:
> >>
> >> On 11/2/22 18:26, Palmer Dabbelt wrote:
> >>>
> > I also tried to remove that restriction but it lo
Signed-off-by: Manolis Tsamis
gcc/ChangeLog:
* config/riscv/riscv.cc (struct machine_function): Add array to store
register wrapping information.
(riscv_for_each_saved_reg): Skip registers that are wrapped separetely.
(riscv_get_separate_components): New function
On Thu, Nov 17, 2022 at 4:09 AM Jeff Law wrote:
>
>
> On 11/16/22 03:26, Manolis Tsamis wrote:
> > On Sun, Nov 13, 2022 at 3:33 AM Jeff Law via Gcc-patches
> > wrote:
> >>
> >> On 11/7/22 15:07, Palmer Dabbelt wrote:
> >>> On Thu, 03 Nov 202
On Fri, Jan 13, 2023 at 7:49 PM Martin Jambor wrote:
>
> Hello,
>
> sorry for getting to this quite late. I have only had a quick glance at
> ipa-cp.cc hunks so far.
>
Hi Martin,
Thanks for taking the time to review these.
> On Fri, Dec 16 2022, Manolis Tsamis wrote
cmp w2, w1
bhi .L20
The effect is similar for x86-64.
Signed-off-by: Manolis Tsamis
gcc/ChangeLog:
* match.pd: Simplify vector shift + bit_and + multiply in some cases.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/swar_to_vec_cmp.c: New test
Hi all,
based on everyone's comments I have sent a v2 of this patch that can
be found here
https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607472.html
As per Richard's comments the pattern now uses vec_cond_expr instead and
includes other fixes as requested.
Also based on Tamar's suggest
On Wed, Nov 30, 2022 at 9:44 AM Richard Biener
wrote:
>
> On Tue, Nov 29, 2022 at 11:05 AM Manolis Tsamis
> wrote:
> >
> > When using SWAR (SIMD in a register) techniques a comparison operation
> > within
> > such a register can be made by using a combinatio
On Wed, Nov 30, 2022 at 9:44 AM Richard Biener
wrote:
>
> On Tue, Nov 29, 2022 at 11:05 AM Manolis Tsamis
> wrote:
> >
> > When using SWAR (SIMD in a register) techniques a comparison operation
> > within
> > such a register can be made by using a combinatio
.
Signed-off-by: Manolis Tsamis
---
gcc/tree-ssa-forwprop.cc | 41 +++-
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
index e34f0888954..93d5043821b 100644
--- a/gcc/tree-ssa-forwprop.cc
+++ b
On Fri, Mar 17, 2023 at 10:31 AM Richard Biener
wrote:
>
> On Thu, Mar 16, 2023 at 4:27 PM Manolis Tsamis
> wrote:
> >
> > For this C testcase:
> >
> > void g();
> > void f(unsigned int *a)
> > {
> > if (++*a == 1)
> > g();
>
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