Hi,
This patch is one of patch set to add a new port (National Instruments CR16) in
gdb.
This patch will,
- Remove "gdb" from noconfigdirs in top-level configure.ac.
- Add target-lobgloss
- Make target OS independent in config.sub
OK for gcc and binutils?
Regards,
Kaushik
2012-10-0
ling list
2012-10-05 Kaushik Phatak
Changelog
* configure.ac (noconfigdirs): Remove gdb.
* configure: Regenerate.
--- ./gdb_src.orig/configure2012-06-28 17:20:52.0 +0530
+++ ./gdb_src/configure 2012-08-17 16:56:10.0 +0530
@@ -3447,7 +3447,7 @
,
Kaushik
p.s. Kindly ignore any disclaimers at end of this e-mail as they are
auto-inserted.
Apologies for the same.
2016-02-05 Kaushik Phatak
* config/rl78/bit-count.S: Use clrw/clrb where possible.
* config/rl78/cmpsi2.S: Likewise.
* config/rl78
Hi Nick,
Please let me know if you have had a chance to look at the following patch,
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00415.html
Best Regards,
Kaushik
-Original Message-
From: Kaushik Phatak
Sent: Friday, February 05, 2016 6:26 PM
To: 'gcc-patches@gcc.gnu.org'
correctly in hex along with
their register name
references (, etc.)
Please let me know if this updated patch is OK.
Best Regards,
Kaushik
gcc/ChangeLog
2015-12-07 Kaushik Phatak
* config/rl78/rl78.c (rl78_expand_prologue): Save the MDUC related
registers in all interrupt
atch is OK.
Regards,
Kaushik M Phatak
2018-02-01 Kaushik Phatak
PR target/83789
* config/rs6000/rs6000.c (altivec_expand_builtin): Provide
support for 32-bit target for altivec builtin.
Index: gcc/config/rs600
Hi,
Thanks for your quick reply.
>> I think you should use altivec_lvx_v4si_2op_si instead?
I will look into this. I had used v4si_internal as this was generated in older
versions (> And the same needs to be done for v8hi, v16qi, v4sf, maybe more?
I did observe some other testcase failures for 32-
To: Peter Bergner
Cc: GCC Patches ; Kaushik Phatak
; Bill Schmidt
Subject: Re: [PATCH, rs6000] Fix PR83789: __builtin_altivec_lvx fails for
powerpc for altivec-4.c
Hi!
On Sun, Mar 11, 2018 at 10:23:02AM -0500, Peter Bergner wrote:
> PR83789 shows a problem in the builtin expansion code
Hi DJ,
>> I assume this should be "doubles" not "double" though...
I had made this change as suggested, however we had some issue while integrating
the tools with our eclipse plug-ins.
The RX toolchain has a similar patch where the option is "doubles" while the
folder name is "double".
Would it
main code as well as interrupts.
This patch has been regression tested with simulator as well as hardware.
Please review the same and let me know if OK to commit?
Best Regards,
Kaushik Phatak
2015-06-05 Kaushik Phatak
* config/rl78/rl78.md (mulhi3_g13): Disable interrupts in
,
Kaushik
p.s. Kindly ignore any disclaimers at end of this e-mail as they are
auto-inserted.
Apologies for the same.
2016-04-06 Kaushik Phatak
* config/rl78/bit-count.S: Use clrw/clrb where possible.
* config/rl78/cmpsi2.S: Likewise.
* config/rl78/divmodhi.S Likewise
contain specific information about these registers
from the G13 variant of the RL78 target. We can try and request Renesas to add
information
about the same along with the option required for this.
Nick, do you have any thoughts on this? (assuming this version of patch is
closer to acceptanc
he hunks in divmodhi and divmodqi are not critical, however the
one in divmodsi is critical as the processor runs away to undefined
space and crashes.
This is regression tested for RL78 -msim. Please let me know if it is
OK to commit.
Best Regards,
Kaushik
Changelog:
2015-08-21 Kaushik Phatak
interrupts during the
mul/div routines in project as per their requirement.
This has been regression tested for ""-mg13 -msim -msave-mduc-in-interrupts"
Best Regards,
Kaushik
gcc/ChangeLog
2015-08-27 Kaushik Phatak
* config/rl78/rl78-real.md (movqi_from_mduc,movhi_fr
ycle check for nop's.
Please let me know if this is OK to commit.
Regards,
Kaushik
2013-05-10 Kaushik Phatak
* config/rl78/rl78.md (mulsi3_g13): Add additional 'nop' required
in multiply-accumulate mode
diff -uprN /home/kpit/fsfsrc/gcc-4.8.0-20
et me know if ok to commit.
Regards,
Kaushik
2013-05-13 Kaushik Phatak
* config/rl78/rl78.md (mulsi3_g13): Add additional 'nop' required
in multiply-accumulate mode
--- /home/fsfsrc/gcc-4.8.0-20121219/gcc/config/rl78/rl78.md 2013-01-25
16:26:27.0 +0
lator with no additional regressions.
Kindly review the same.
Thanks,
Kaushik
2013-05-15 Kaushik Phatak
* config/rl78/rl78.md (mulqi3,mulhi3): New define_expands.
(mulqi3_rl78,mulhi3_rl78,mulhi3_g13): New define_insns.
Index: gcc/config/rl
ested changes. Please find below an updated version of this
patch.
Let me know if OK to commit the same.
Regards,
Kaushik
2013-05-20 Kaushik Phatak
* config/rl78/rl78.md (mulqi3,mulhi3): New define_expands.
(mulqi3_rl78,mulhi3_rl78,mulhi3_g13): New define_ins
Ping.
Can I commit this with below changes?
Thanks,
Kaushik
-Original Message-
From: Kaushik Phatak
Sent: 20 May 2013 20:17
To: gcc-patches@gcc.gnu.org
Cc: 'Richard Henderson'; DJ Delorie (d...@redhat.com)
Subject: RE: [PATCH:RL78] Add new insn for mulqi3 and mulhi3
Hi Richa
to 'umul'.
Would that be the correct setting as 'macax' is used for the other SI
multiplication insns which seem to also include accumulation?
Please let me know if OK.
Thanks & Regards,
Kaushik
2013-06-10 Kaushik Phatak
* config/rl78/constraints.md (U): Ne
Hi DJ,
> "umul" is used when the insn takes two operands in A and X, and computes a
> value into AX.
> "macax" is used when the insn pattern itself reads from two virtual registers
> and writes to a
> virtual register (i.e. V = V op V), but clobbers AX anx BC in the process.
Thanks for the cl
>> +;; [(set_attr "valloc" "umul")]
>I think this one needs to be macax also, since the constraints have "v" in
>them but the opcodes use ax.
> Other than that, it's OK.
Committed with above change.
Thanks for the quick review.
Regards,
Kaushik
ting the linker script.
Please let me know if any modifications are required. Below patch is identical
to one submitted earlier.
Regards,
Kaushik
2014-05-12 Kaushik Phatak
* config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define
__RL78_64BIT_DOUBLES__ or
f the below version is OK to commit.
Thanks,
Kaushik
2014-05-14 Kaushik Phatak
* config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define
__RL78_64BIT_DOUBLES__ or __RL78_32BIT_DOUBLES__.
(ASM_SPEC): Pass -m64bit-doubles or -m32bit-doubles on
to the assembler.
/2014/msg00151.html
https://sourceware.org/ml/binutils/2014-05/msg00140.html
Let me know if below patch is ok to commit (also attached).
Thanks,
Kaushik
2014-05-26 Kaushik Phatak
* config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define
__RL78_64BIT_DOUBLES__ or
Hi DJ,
> This is OK. Thanks! Do you need someone to commit it for you?
Thanks, I can commit these changes.
>> +MULTILIB_DIRNAMES = g10 64-bit-double
> I assume this should be "doubles" not "double" though...
Yes, will make that change and commit it.
Best Regards,
Kaushik
.
Thanks & Best Regards,
Kaushik
2013-03-06 Kaushik Phatak
* config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define
__RL78_64BIT_DOUBLES__ or __RL78_32BIT_DOUBLES__.
(ASM_SPEC): Pass -m64bit-doubles or -m32bit-doubles on
to the assembler.
(DOUBLE_TYPE_
if you have any comments on the same.
Thanks,
Kaushik
2013-01-15 Kaushik Phatak
* configure.ac (cr16-*-*): Adding cr16 target.
* configure (cr16-*-*): Regenerate.
Index: configure
===
RCS file: /cvs/src/src/con
which occurs at
'-O1'.
The other insn's are reordered to give preference to bit instructions using
existing
constraints.
Ok to apply?
Thanks & Regards,
Kaushik Phatak
www.kpitgnutools.com
2011-06-09 Kaushik Phatak
* config/h8300/h8300.md (bsetqi_msx, bclrqi_msx,
Hi Jeff,
Thanks for the quick review.
>> the right test is rtx_equal_p(operands[0], operands[1])
Committed with above changes to the bsetqi_msx, bclrqi_msx and bnotqi_msx
patterns.
Thanks & Regards,
Kaushik Phatak
www.kpitgnutools.com
-Original Message-
From: Jeff Law
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