RFA: RISC-V: Make riscv_vector::legitimize_move adjust SRC in the caller. (Was: Remove mem-to-mem VLS move pattern[PR111566])

2023-09-30 Thread Joern Rennecke
ation of the alignment test for using scalars values spanning multiple addressable units. Make riscv_vector::legitimize_move adjust SRC in the caller. 2023-09-29 Joern Rennecke Juzhe-Zhong PR target/111566 gcc/ * config/riscv/riscv-protos.h (riscv_vector::legit

Re: committed [RISC-V]: Harden test scan patterns

2023-09-30 Thread Joern Rennecke
On Fri, 29 Sept 2023 at 14:54, Jeff Law wrote: > So I recommend we go forward with Joern's approach (so consider that an > ACK for the trunk). Joern can you post a follow-up manual twiddle so > that other ports can follow your example and avoid this problem? The manual... so not in the genera

Committed: Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .

2023-10-01 Thread Joern Rennecke
Committed as obvious (RE doesn't compile without patch, and I know what I meant when I wrote it). commit 5f3da480e7541a9c29d655dccb2463fc5f3cf2c4 Author: Joern Rennecke Date: Sun Oct 1 22:46:43 2023 +0100 Fix typo in add_options_for_riscv_v, add_options_for_risc

[RISC-V]: Re: cpymem for RISCV with v extension

2023-10-01 Thread Joern Rennecke
Attached is the committed version. commit 9464e72bcc9123b619215af8cfef491772a3ebd9 Author: Joern Rennecke Date: Mon Oct 2 03:16:09 2023 +0100 cpymem for RISC-V with v extension gcc/ * config/riscv/riscv-protos.h (riscv_vector::expand_block_move): Declare. * config/riscv/ri

Re: [RISC-V]: Re: cpymem for RISCV with v extension

2023-10-04 Thread Joern Rennecke
On Wed, 4 Oct 2023 at 18:38, Patrick O'Neill wrote: > > Hi Joern, > > I'm seeing new failures introduced by this patch > (9464e72bcc9123b619215af8cfef491772a3ebd9). > > On rv64gcv: > FAIL: gcc.dg/pr90263.c scan-assembler memcpy My testing didn't flag this because I used elf targets. The expected

Re: committed [RISC-V]: Harden test scan patterns

2023-10-10 Thread Joern Rennecke
On Sat, 30 Sept 2023 at 22:12, Joern Rennecke wrote: > Also, we might have different directives for not scanning in LTO sections - > or just ignoring .ascii . Or maybe the other way round - you have to do > something special if you want to scan inside strings, and by default we >

Re: committed [RISC-V]: Harden test scan patterns

2023-10-11 Thread Joern Rennecke
On Wed, 11 Oct 2023 at 05:48, Joern Rennecke wrote: > So I propose we look at the first character of the regexp, and if it's neither > ^ nor \ (neither caret nor backslash), we consider the regexp un-anchored, > and prepend ^[^"]* , so it won't allow a match after a doubl

Committed: Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c .

2023-07-17 Thread Joern Rennecke
Committed as obvious. commit 6bab2772dbc42ce7a1b29b03ae84e6e434e23c4e Author: Joern Rennecke Date: Tue Jul 18 04:28:55 2023 +0100 Tighten regexps in gcc.target/riscv/_Float16-zhinx-1.c . The original "mv" regexp would match .ascii "\254\254\375\002e2N6\013\

cpymem for RISCV with v extension

2023-07-17 Thread Joern Rennecke
p64d riscv-sim/-march=rv64imafdcv_zicsr_zifencei_zfh_zba_zbb_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b/-mabi=lp64d riscv-sim/-march=rv64imafdcv_zicsr_zifencei_zfh_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b/-mabi=lp64d 2023-07-12 Ju-Zhe Zhong

RISCV test infrastructure for d / v / zfh extensions

2023-07-17 Thread Joern Rennecke
ou can use check_effective_target_riscv_v_ok to check if that's ok, and then add_options_for_riscv_v to add the appropriate -march option. Examples how this can be used can be found athttps://github.com/embecosm/rvv-gcc/tree/rvv-12/gcc/testsuite 2023-04-17 Joern Rennecke gcc/testsuite/ * lib/targ

Re: RISCV test infrastructure for d / v / zfh extensions

2023-08-14 Thread Joern Rennecke
could still construe a multi-word option that uses a string starting with -march as a pathname or similar, but I suppose you'd deserve whatever you get then. I don't see a bobby tables scenario here.) I also found one comment pasto. I have attached the amended patch - not tested yet.

Re: cpymem for RISCV with v extension

2023-08-14 Thread Joern Rennecke
On Fri, 4 Aug 2023 at 21:52, Jeff Law wrote: > > diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc > > index b4884a30872..e61110fa3ad 100644 > > --- a/gcc/config/riscv/riscv-v.cc > > +++ b/gcc/config/riscv/riscv-v.cc > > @@ -49,6 +49,7 @@ > > #include "tm-constrs.h" > > #

Re: Re: cpymem for RISCV with v extension

2023-08-15 Thread Joern Rennecke
rength reduction of the opaque pattern version for -O3, though. Would people also like to see that expanded into RTL? Or should I just drop in the opaque pattern for that? Or not at all, because everyone uses Superscalar Out-Of-Order execution? commit 1f4b7a8e6798acab1f79de38e85d9d080a76eb4a Autho

Re: [v2] RISC-V: Remove masking third operand of rotate instructions

2023-05-18 Thread Joern Rennecke
On Thu, 18 May 2023 at 16:37, Joern Rennecke wrote in https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618928.html : > > This breaks building libstdc++-v3 for > -march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b > -mabi=ilp32f

Call for testers: shrink wrapping without a prologue

2022-03-14 Thread Joern Rennecke
ction didn't actually return early (doing things with an array of N elements where N might be zero... but it isn't for the actual data). Does someone have a benchmark / computing load where the early return is beneficial? Or conversely, harmful? 2022-03-14 Joern Rennecke * com

RFA: crc builtin functions & optimizations

2022-03-14 Thread Joern Rennecke
n the tree, we'll get more contributions of suitable named patterns for various ports. bootstrapped on x86_64-pc-linux-gnu . 2022-03-14 Jon Beniston Joern Rennecke * Makefile.in (OBJS): Add tree-crc.o . * builtin-types.def (BT_FN_UINT16_UINT16_UINT8_CONS

Fwd: RFA: crc builtin functions & optimizations

2022-03-15 Thread Joern Rennecke
Oops, that was meant to go to the list too. On Tue, 15 Mar 2022 at 01:04, Andrew Pinski wrote: > > On Mon, Mar 14, 2022 at 5:33 PM Joern Rennecke > wrote: > > > > Most microprocessors have efficient ways to perform CRC operations, be > > that with lookup table

Re: RFA: crc builtin functions & optimizations

2022-03-15 Thread Joern Rennecke
On Tue, 15 Mar 2022 at 02:17, Oleg Endo wrote: > > In my own CRC library I've got ~30 'commonly used' CRC types, based on > the following generic definition: > > This being a library makes it relatively easy to tune and customize for > various systems. ... > How would that work together with you

semi-finished patch: dead zero/sign extension elimination

2022-03-15 Thread Joern Rennecke
This misses some documentation and testing, but it appears to work well with 64 bit RISC-V. -fext-dce is best used with aggressive unrolling and/or inlining. It deletes zero/sign extensiions where the part of the register that the zero/sign extension pertains to is dead. This is not about multi-

Re: RFA: crc builtin functions & optimizations

2022-03-15 Thread Joern Rennecke
On 15/03/2022, Richard Biener wrote: > Why's this a new pass? Every walk over all insns costs time. If should typically scan considerably less than all the insns. > The pass > lacks any comments as to what CFG / stmt structure is matched. I've put a file in: config/riscv/tree-crc-doc.txt wo

Re: RFA: crc builtin functions & optimizations

2022-03-15 Thread Joern Rennecke
On 15/03/2022, Richard Biener wrote: > Why's this a new pass? Every walk over all insns costs time. The pass > lacks any comments as to what CFG / stmt structure is matched. From > a quick look it seems like it first(?) statically matches a stmt sequence > without considering intermediate stmt

Re: RFA: crc builtin functions & optimizations

2022-03-16 Thread Joern Rennecke
On Wed, 16 Mar 2022 at 08:15, Richard Biener wrote: > The canonical place to transform loops into builtins would be loop > distribution. > Another place would be final value replacement since you basically replace > the reduction result with a call to the builtin, but I think > loop-distribution

Re: RFA: crc builtin functions & optimizations

2022-03-16 Thread Joern Rennecke
> and there needs to be code to actually expand the builtin using optabs. > And something needs to be done to make match.pd work on the output. Never mind that bit, that was just due to a function argument type mismatch on the last argument of the crc built-in functions.

RFA: Fix match_scratch bug in define_subst

2021-05-16 Thread Joern Rennecke
Bootstrapped on x86_64-pc-linux-gnu. 2020-12-10 Joern Rennecke Fix bug in the define_subst handling that made match_scratch unusable for multi-alternative patterns. diff --git a/gcc/gensupport.c b/gcc/gensupport.c index e1ca06dbc1e..4022c661adb 100644 --- a/gcc/gensupport.c +++ b/gcc

RFA: Improve message for wrong number of alternatives

2021-05-16 Thread Joern Rennecke
e too many. By making genoutput tell you what the argument counts are, this gets a little bit easier. Bootstrapped on x86_64-pc-linux-gnu. 2021-01-13 Joern Rennecke Make "wrong number of alternatives" message a bit more specific. diff --git a/gcc/genoutput.c b/gcc/genoutput

[no subject]

2021-05-16 Thread Joern Rennecke
e attached patch fixes this. Bootstrapped on x86_64-pc-linux-gnu. 2020-12-12 Joern Rennecke Fix match_dup bug of define_cond_exec. * gensupport.c (alter_predicate_for_insn): Handle MATCH_DUP. diff --git a/gcc/gensupport.c b/gcc/gensupport.c index e1ca06dbc1e..92275358078 100644

RFA: Fix match_dup numbering bug in define_cond_exec

2021-05-16 Thread Joern Rennecke
hat's not only wrong, but can also be impossible when the pattern should apply to multiple patterns with different operand numbers. The attached patch fixes this. Bootstrapped on x86_64-pc-linux-gnu. 2020-12-12 Joern Rennecke Fix match_dup bug of define_cond_exec. * ge

RFA: Support cobbers in define_cond_exec

2021-05-16 Thread Joern Rennecke
MATCH_SCRATCH in alter_predicate_for_insn. This makes most sense together with the previous patch for MATCH_DUP support, although the latter can also be used stand-alone, so have posted and tested these patches separately. Bootstrapped on x86_64-pc-linux-gnu. 2020-12-12 Joern Rennecke Fix

RFA: reduce lra spill failures by splitting likely-spilled-reg hogging pseudo

2021-05-16 Thread Joern Rennecke
Bootstrapped regtested and on x86_64-pc-linux-gnu. 2021-02-22 Joern Rennecke lra fix to reduce fatal spill failures. * lra-constraints.c (split_reg): No longer static. * lra-int.h (split_reg): Declare. * lra-assigns.c (lra_split_hard_reg_for): Add strategy

RFA: Add option -fretry-compilation

2021-05-16 Thread Joern Rennecke
retry, which is implemented in the compiler driver. Bootstrapped on x86_64-pc-linux-gnu. 2021-05-16 Joern Rennecke * common.opt: New option -fretry-compilation=. * gcc.c (execute): Implement -fretry-compilation. * doc/invoke.texi: Document -fretry-compilation. diff --git

RFA: Don't squash target character arrays into a narrower host string

2021-05-16 Thread Joern Rennecke
64-pc-linux-gnu. FWIW, we also have patches for cpplib / lexer / parser char and string handling to make 8 -> 16 bit char cross-compiling work, but they can't be ported forward easily because the parser has changed since gcc9. 2021-04-16 Joern Rennecke * c-fami

Re: RFA: Improve message for wrong number of alternatives

2021-05-17 Thread Joern Rennecke
of the error message and the recap of the number of alternatives of operand 0. So I propose the attached patch now. Bootstrapped on x86_64-pc-linux-gnu. 2021-05-17 Joern Rennecke Make "wrong number of alternatives" message more specific, and remove assumption

Re: RFA: Add option -fretry-compilation

2021-05-17 Thread Joern Rennecke
On Mon, 17 May 2021 at 08:36, Richard Biener wrote: > > On Sun, May 16, 2021 at 8:53 PM Joern Rennecke > wrote: > > > > For architectures with likely spilled register classes, neither > > register allocator is guaranteed > > to succeed when using optimization.

Re: RFA: Add option -fretry-compilation

2021-05-17 Thread Joern Rennecke
On Mon, 17 May 2021 at 11:59, Richard Biener wrote: > The plan for reload is to axe it similar to CC0 support. Sooner than later, > but > give it's still used exclusively by a lot of target means it might > take some time. > So for you it's always just -fretry-compilation -m[no-]lra? Given -m

RFA: avoid infinite lra loop for constant addresses

2021-05-18 Thread Joern Rennecke
I find that when compiling some files, lra goes into an infinite loop reloading constant addresses. This patch allows them to just be recognized as matching addresses immediately, which also saves a bit of space for a few other files. Bootstrapped and regression tested on x86_64-pc-linux-gnu. gcc

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

2023-11-30 Thread Joern Rennecke
On Thu, 30 Nov 2023 at 17:53, Jeff Law wrote: > > * ext-dce.c: Fixes for carry handling. > > > > * ext-dce.c (safe_for_live_propagation): Handle MINUS. > >(ext_dce_process_uses): Break out carry handling into .. > >(carry_backpropagate): This new function. > >Bet

Re: [PATCH v4 02/34] RISC-V: Add vlex_2.c

2023-01-05 Thread Joern Rennecke
On Wed, Jun 1, 2022 at 02:28:45 GMT 2022, zhongjuzhe wrote: > gcc/testsuite/ChangeLog: > >* gcc.target/riscv/rvv/intrinsic/vlex_2.c: New test. These intrinsic test cases look like they have been machine generated. And if they aren't, they probably should (have) be(en). I've been working

RFC: RISC-V sign extension dead code elimination

2023-08-29 Thread Joern Rennecke
In the patch call we talked about sign extsnsion elimination, so I dug up this patch set that I did a while ago. It is still lacking some documentation and testing in a more recent base version; I only adjusted the common.opt part context for the patch to apply. Author: Joern Rennecke Date

RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)

2023-11-08 Thread Joern Rennecke
aram=riscv-autovec-preference=scalable riscv-sim/-march=rv64imac/-mabi=lp64 2023-11-08 Joern Rennecke gcc/testsuite/ * lib/scanasm.exp (scan-assembler-times): Disregard LTO sections. (scan-assembler-dem, scan-assembler-dem-not): Likewise. (dg-scan): Likewise, if nam

RFA: RISC-V: Add support for XCVhwlp extension in CV32E40P

2023-11-18 Thread Joern Rennecke
sh-elf Add support for XCVhwlp extension in CV32E40P 2023-11-18 Joern Rennecke gcc/ * common/config/riscv/riscv-common.cc (riscv_ext_version_table): Add xcvhwlp. (riscv_ext_flag_table): Likewise. * config.gcc (riscv*): Add corev.o to extra_objs. * co

Re: [RFA] New pass for sign/zero extension elimination

2023-11-27 Thread Joern Rennecke
On 11/20/23 11:26, Richard Sandiford wrote: >> + >> + mask = GET_MODE_MASK (GET_MODE (SUBREG_REG (x))) << bit; >> + if (!mask) >> + mask = -0x1ULL; > > Not sure I follow this. What does the -0x1ULL constant indicate? > Also, isn't it the mask of the outer register that i

Re: [RFA] New pass for sign/zero extension elimination

2023-11-27 Thread Joern Rennecke
On 11/20/23 11:26, Richard Sandiford wrote: >> + /* ?!? What is the point of this adjustment to DST_MASK? */ >> + if (code == PLUS || code == MINUS >> + || code == MULT || code == ASHIFT) >> + dst_mask >> + = dst_mask ? ((2ULL << floor_log2 (dst_mask)) - 1) : 0; > > Yeah, sympathise w

Re: [RFA] New pass for sign/zero extension elimination

2023-11-27 Thread Joern Rennecke
You are applying PATTERN to an INSN_LIST. diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc index 52032b50951..4523654538c 100644 --- a/gcc/ext-dce.cc +++ b/gcc/ext-dce.cc @@ -122,10 +122,9 @@ safe_for_live_propagation (rtx_code code) optimziation phase during use handling will be. */ static voi

Re: [RFA] New pass for sign/zero extension elimination

2023-11-28 Thread Joern Rennecke
On Mon, 27 Nov 2023 at 20:03, Richard Sandiford wrote: > > Joern Rennecke writes: > > On 11/20/23 11:26, Richard Sandiford wrote: > >>> + /* ?!? What is the point of this adjustment to DST_MASK? */ > >>> + if (code == PLUS || code == MINUS > &

Re: [RFA] New pass for sign/zero extension elimination

2023-11-28 Thread Joern Rennecke
On Mon, 27 Nov 2023 at 20:18, Jeff Law wrote: > > > > On 11/27/23 13:03, Richard Sandiford wrote: > > Joern Rennecke writes: > >> On 11/20/23 11:26, Richard Sandiford wrote: > >>>> + /* ?!? What is the point of this adjustment to DST_MASK?

Re: [RFA] New pass for sign/zero extension elimination

2023-11-28 Thread Joern Rennecke
On Tue, 28 Nov 2023 at 13:36, Joern Rennecke wrote: > For the saturating truncation operations, we have the high-to-low propagation, > but no low-to-high propagation, so that would be something separate to model. P.S.: For unsigned saturating truncation, the propagation from higher to

Re: [RFA] New pass for sign/zero extension elimination

2023-11-29 Thread Joern Rennecke
Why did you leave out MINUS from safe_for_live_propagation ?

[V2] New pass for sign/zero extension elimination -- not ready for "final" review

2023-11-29 Thread Joern Rennecke
5ef9c Author: Joern Rennecke Date: Wed Nov 29 18:46:06 2023 + * ext-dce.c: Fixes for carry handling. * ext-dce.c (safe_for_live_propagation): Handle MINUS. (ext_dce_process_uses): Break out carry handling into .. (carry_backpropagate): This new function. B

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

2023-11-29 Thread Joern Rennecke
On Wed, 29 Nov 2023 at 19:57, Joern Rennecke wrote: > > Attached is what I have for carry_backpropagate . > > The utility of special handling for SS_ASHIFT / US_ASHIFT seems > somewhat marginal. > > I suspect it'd be more useful to add handling of LSHIFTRT and ASHIFTRT

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

2023-11-29 Thread Joern Rennecke
On Wed, 29 Nov 2023 at 20:05, Joern Rennecke wrote: > > I suspect it'd be more useful to add handling of LSHIFTRT and ASHIFTRT > > . Some ports do > > a lot of static shifting. > > > +case SS_ASHIFT: > > +case US_ASHIFT: > > +

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

2023-11-29 Thread Joern Rennecke
I originally computed mmask in carry_backpropagate from XEXP (x, 0), but abandoned that when I realized we also get called for RTX_OBJ things. I forgot to adjust the SIGN_EXTEND code, though. Fixed in the attached revised patch. Also made sure to not make inputs of LSHIFTRT / ASHIFTRT live if t

Re: RISC-V: Added support for CRC.

2023-09-23 Thread Joern Rennecke
Mariam Harutyunyan: +++ b/gcc/ChangeLog @@ -1,3 +1,45 @@ +2023-08-03 Mariam Arutunian + It is common courtesy to include all authors in the list of authors for the ChangeLog; also, this may help people in the future understand the history of the code better. While must of your patch is new, it

Re: RISC-V: Added support for CRC.

2023-09-24 Thread Joern Rennecke
On Sun, 24 Sept 2023 at 12:41, Alexander Monakov wrote: > > > On Sun, 24 Sep 2023, Joern Rennecke wrote: > > > It is a stated goal of coremark to test performance for CRC. > > I would expect a good CRC benchmark to print CRC throughput in > bytes per cycle or megabytes

Re: RISC-V: Added support for CRC.

2023-09-26 Thread Joern Rennecke
On Tue, 26 Sept 2023 at 14:18, Jeff Law wrote: > But the Coremark code is what it is. This isn't a whole lot > different than the work in the 90s which rewrote loops and compromised > some of the spec benchmarks, or the eqntott hack to simplify that one > key loop in eqntott. I think the state

committed [RISC-V]: Harden test scan patterns

2023-09-27 Thread Joern Rennecke
obvious. commit d326bb6d7588425d013791299272f913fb23e56d Author: Joern Rennecke Date: Wed Sep 27 10:05:13 2023 +0100 Harden scan patterns with a bit of scripting: $ egrep -r 'scan-assembler(|-not|-times) "[[:alnum:].]{1,7}"' riscv $ egrep -rl 'sc

Re: committed [RISC-V]: Harden test scan patterns

2023-09-27 Thread Joern Rennecke
On Wed, 27 Sept 2023 at 18:22, Jeff Law wrote: > It would help to describe how these patterns were under specified so > that folks don't continue to make the same mistake as new tests get added. dg-final scan-assembler, scan-assembler-not, and scan-assembler-times use a tcl regular expression (o

Re: [PATCH v2] Provide more contexts for -Warray-bounds warning messages

2024-09-14 Thread Joern Rennecke
> 1. Change the name of the option from: > > -fdiagnostic-try-to-explain-harder > To > -fdiagnostic-explain-harder I can think of a lot of connotations for this name, but alas, they are unfortunate, off-topic, or both. Some more neutral ideas: -fdiagnostics-verbose -fdiagnostic-details Or maybe

Committed: rename struct reg_equivs

2013-08-21 Thread Joern Rennecke
Having a C++ type with the same name as the variable reg_equivs causes trouble with gdb, so I renamed the struct. Bootstrapped on i686-pc-linux-gnu. Committed as obvious. 2013-08-21 Joern Rennecke * reload.h (struct reg_equivs): Rename to .. (struct reg_equivs_s): .. this

Ping: RFA: fix find_valid_class to accept classes w/out last hard reg

2013-08-23 Thread Joern Rennecke
This patch has not been reviewed for more than three months: http://gcc.gnu.org/ml/gcc-patches/2013-05/msg00113.html

Committed: fix i686 bootstrap: x86_64_elf_select_section is unused

2013-08-26 Thread Joern Rennecke
bootstrap for i686-pc-linux-gnu was failing with: /ssd/fsf/boot-201992/./prev-gcc/xg++ -B/ssd/fsf/boot-201992/./prev-gcc/ -B/usr/local/i686-pc-linux-gnu/bin/ -nostdinc++ -B/ssd/fsf/boot-201992/prev-i686-pc-linux-gnu/libstdc++-v3/src/.libs -B/ssd/fsf/boot-201992/prev-i686-pc-linux-gnu/libs

RFA: fix avr gcc.dg/fixed-point/convert-accum-neg.c execution failure

2013-08-26 Thread Joern Rennecke
-mfract-convert-truncate to revert to the previous behaviour (for situations where smaller code is more important than proper rounding). Tested for atmega128-sim. OK to apply? 2013-06-25 Joern Rennecke * config/avr/avr.opt (mfract-convert-truncate): New option. * config/avr

RFA: fix some avr stdint issues

2013-08-26 Thread Joern Rennecke
This patch fixes the gcc.dg/c99-stdint-5.c and gcc.dg/c99-stdint-6.c excess error failures. Tested for atmega128-sim. OK to apply? 2013-05-26 Joern Rennecke * config/avr/avr-stdint.h (INT16_TYPE): Change default to "int". (UINT16_TYPE): Change default to &qu

RFA: prefer double over same-size float as conversion result

2013-08-26 Thread Joern Rennecke
: gcc.dg/pr44214-2.c scan-tree-dump-times original " \\* " 1 bootstrapped/regtested on i686-pc-linux-gnu OK to apply? 2013-05-14 Joern Rennecke * c-typeck.c (c_common_type): Prefer double_type_node over other REAL_TYPE types with the same precision. (convert

RFA: Consider int and same-size short as equivalent vector components

2013-08-26 Thread Joern Rennecke
short are the same size. bootstrapped / regtested on i686-pc-linux-gnu. OK to apply? 2013-07-17 Joern Rennecke * c-common.c (same_scalar_type_ignoring_signedness): Also accept short/int as equivalent if they have the same precision. Index:

Re: RFA: Consider int and same-size short as equivalent vector components

2013-08-26 Thread Joern Rennecke
Quoting Marc Glisse : The issue seems larger than just short/int. On x86, (l I don't understand what you mean here. Could you post the actual code sample?

Re: RFA: Consider int and same-size short as equivalent vector components

2013-08-27 Thread Joern Rennecke
Quoting Marc Glisse : On Mon, 26 Aug 2013, Joern Rennecke wrote: Quoting Marc Glisse : The issue seems larger than just short/int. On x86, (l I don't understand what you mean here. Could you post the actual code sample? typedef long vl __attribute__((vector_size(16))); void f

Committed: avoid null-pointer dereference in verify_changes

2013-08-30 Thread Joern Rennecke
I got nine ICEs in verify_changes for compile/20110401-1.c on ARC. Fixed by checking changes[i].old before dereferencing it. Bootstrapped on i686-pc-linux.gnu. Committed as obvious. 2013-05-20 Joern Rennecke * recog.c (verify_changes): Verify that changes[i].old is non-zero

Ping: RFA: testsuite patches (1/6): keeps_null_pointer_checks effect on pta/alias dump files

2013-09-05 Thread Joern Rennecke
This patch has not been reviewed for more than two weeks: http://gcc.gnu.org/ml/gcc-patches/2013-08/msg00990.html

Ping: RFA: Consider int and same-size short as equivalent vector components

2013-09-05 Thread Joern Rennecke
Apart from Paolo Carlini's suggestion to improve the wording of the ChangeLog, this patch hasn't been reviewed for more than a week: http://gcc.gnu.org/ml/gcc-patches/2013-08/msg01634.html

RFA: accept opaque vectors as compatible to same-size,same-element-size vectors in binary operations (Was: Re: Ping: RFA: Consider int and same-size short as equivalent vector components)

2013-09-05 Thread Joern Rennecke
Quoting Nathan Sidwell : On 09/05/13 15:50, Joern Rennecke wrote: Apart from Paolo Carlini's suggestion to improve the wording of the ChangeLog, this patch hasn't been reviewed for more than a week: http://gcc.gnu.org/ml/gcc-patches/2013-08/msg01634.html I suppose the original s

Ping^5/update: contribute Synopsys Designware ARC port (7/7): testsuite

2013-09-05 Thread Joern Rennecke
OK to apply? FWIW, my colleague Simon Cook is currently working on adding more target option / builtin tests. 2013-08-31 Joern Rennecke Vineet Gupta * gcc.c-torture/execute/20101011-1.c [__arc__] (DO_TEST): Define as 0. * testsuite/gcc.target/arc: New directory

Ping^5/update: contribute Synopsys Designware ARC port (6/7): documentation

2013-09-05 Thread Joern Rennecke
OK to apply? 2013-08-31 Joern Rennecke Jeremy Bennett * doc/install.texi (--with-cpu): Mention ARC. (arc-*-elf32): New paragraph. (arc-linux-uclibc): Likewise. * doc/md.texi (Machine Constraints): Add ARC part. * doc/invoke.texi: (menu

Ping^5/update: contribute Synopsys Designware ARC port (1/7): configuration

2013-09-05 Thread Joern Rennecke
build configuration to allow big endian ARC ELF toolchain * configure.ac: Also add target-libgloss to noconfigdirs for arceb-*-*. * configure: Regenerate. gcc: 2013-04-03 Joern Rennecke Brendan Kehoe Simon Cook * config.gcc (arc*-*-elf*, arc

Re: Ping: RFA: testsuite patches (1/6): keeps_null_pointer_checks effect on pta/alias dump files

2013-09-06 Thread Joern Rennecke
oesn't have NONLOCAL otherwise, you instead see NONLOCAL. Please find attached the amended patch. I have verified that this gets the new expected PASSes for atmega128-sim. 2013-09-06 Joern Rennecke * gcc.dg/ipa/ipa-pta-14.c (scan-ipa-dump) [keeps_null_pointer_checks]: Don&#x

RFA: Fix mark_target_live_regs to take COND_EXEC into account

2013-09-06 Thread Joern Rennecke
We found that std::basic_string, std::allocator ::copy(char*, unsigned long, unsigned long) const got miscompiled for ARC because reorg thought that all call-clobbered registers were dead after a conditional call. I can't reproduce the test case with current trunk + ARC port, but I reckon this i

RFA: Fix mark_referenced_resources to handle COND_EXEC

2013-09-06 Thread Joern Rennecke
placed the test into gcc.target; in principle the test could also live in gcc.dg, but it would only be relevant to ARC. OK to apply? gcc: 2013-04-30 Joern Rennecke * resource.c (mark_referenced_resources): Handle COND_EXEC

Re: Ping: RFA: Consider int and same-size short as equivalent vector components

2013-09-06 Thread Joern Rennecke
Quoting Jason Merrill : On 09/05/2013 10:50 AM, Joern Rennecke wrote: (vector_types_compatible_elements_p): New function. Why do we need this as well as vector_types_convertible_p? For that matter, why do we need both vector_types_convertible_p and vector_targets_convertible_p

Ping^6/update: contribute Synopsys Designware ARC port (6/7): documentation

2013-09-25 Thread Joern Rennecke
The extend.texi context has changed due to the addition of the MSP430 port. OK to apply? 2013-09-24 Joern Rennecke Jeremy Bennett * doc/install.texi (--with-cpu): Mention ARC. (arc-*-elf32): New paragraph. (arc-linux-uclibc): Likewise. * doc

RFA [testsuite]: New ARC target specific tests

2013-09-28 Thread Joern Rennecke
ready been accepted. OTOH, the man body of the ARC port is still stuck waiting for review, so I'm still in the weird position of a target maintainer without an accepted target port. 2013-09-28 Simon Cook Joern Rennecke * gcc.target/arc/barrel-shifter-1.c

Ping^6: contribute Synopsys Designware ARC port

2013-09-28 Thread Joern Rennecke
The main part of the port (everything but the testsuite) is still waiting for review: http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00323.html http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00324.html http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00325.html http://gcc.gnu.org/ml/gcc-patches/2013-09/ms

Re: Ping^6: contribute Synopsys Designware ARC port

2013-10-01 Thread Joern Rennecke
Quoting Diego Novillo : I have been reviewing these patches (I've gone through 2), and so far I find nothing surprising in them. I should be able to finish them today or tomorrow. Joern, I assume that you'll be one of the maintainers for the port? Anyone else? Yes. Claudiu Zissulescu at Sy

Committed: Use ARC_{FIRST,LAST}_SIMD_VR_REG instead of decimal literals in arc_conditional_register_usage; fix reg_alloc_order for DMA config regs

2013-10-01 Thread Joern Rennecke
2013-09-06 Joern Rennecke * config/arc/arc.c (arc_conditional_register_usage): Use ARC_FIRST_SIMD_VR_REG / ARC_LAST_SIMD_VR_REG. Also set reg_alloc_order for DMA config regs. diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 51ad7d7..796c768 100644 --- a

Re: Ping^6: contribute Synopsys Designware ARC port

2013-10-01 Thread Joern Rennecke
Quoting Diego Novillo : On Sat, Sep 28, 2013 at 9:54 AM, Joern Rennecke wrote: The main part of the port (everything but the testsuite) is still waiting for review: http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00323.html http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00324.html http

GTY on simple struct (Was: Re: Ping^6: contribute Synopsys Designware ARC port)

2013-10-01 Thread Joern Rennecke
Quoting Diego Novillo : No need to mark struct arc_frame_info with GTY. It contains no pointers. That's not quite how it works. machine_function needs GTY. It uses arc_frame_info, hence arc_frame_info also needs GTY.

Copyright years for new old ports (Re: Ping^6: contribute Synopsys Designware ARC port)

2013-10-02 Thread Joern Rennecke
Quoting Jakub Jelinek : On Tue, Oct 01, 2013 at 04:22:38PM -0600, Jeff Law wrote: >>- The Copyright years should be 2013 in every new file. Or has this >>port been released before? > >The port has been available via git for quite a while: >https://github.com/foss-for-synopsys-dwc-arc-processor

Re: Copyright years for new old ports (Re: Ping^6: contribute Synopsys Designware ARC port)

2013-10-02 Thread Joern Rennecke
Quoting Jakub Jelinek : On Wed, Oct 02, 2013 at 06:05:14AM -0400, Joern Rennecke wrote: From my understanding, the condition for adding the current Copyright year without a source code change is to have a release in that year. Are we sure 4.9.0 will be released this year? We are sure we

Re: Copyright years for new old ports (Re: Ping^6: contribute Synopsys Designware ARC port)

2013-10-02 Thread Joern Rennecke
Quoting Gerald Pfeifer : On Wed, 2 Oct 2013, Joern Rennecke wrote: From my understanding, the condition for adding the current Copyright year without a source code change is to have a release in that year. Are we sure 4.9.0 will be released this year? We are sure we don't want 4.9.0

RFA: Fix OP_INOUT handling of web.c:union_match_dups

2012-10-02 Thread Joern Rennecke
at it should create that. Bootstrapped and regtested on i686-pc-linux-gnu (baseline: revision 191817) . 2012-10-02 Joern Rennecke * web.c (union_match_dups): Properly handle OP_INOUT match_dups. Index: web.c === --- web.c (r

RFA: add lock_length attribute to break branch-shortening cycles

2012-10-03 Thread Joern Rennecke
e value computed for the `length' attribute will be no smaller than that of the `lock_length' attribute. bootstrapped and regression tested on i686-pc-linux-gnu 2012-10-03 Joern Rennecke * final.c (get_attr_length_1): Use direct recursion rather than

Ping: RFA: Process '*' in '@'-output-template alternatives

2012-10-03 Thread Joern Rennecke
The following patch is still awaiting review: 2011-09-19 J"orn Rennecke * genoutput.c (process_template): Process '*' in '@' alternatives. * doc/md.texi (node Output Statement): Provide example for the above. http://gcc.gnu.org/ml/gcc-patches/2012-09/msg01422.html

Re: RFA: add lock_length attribute to break branch-shortening cycles

2012-10-04 Thread Joern Rennecke
Quoting Richard Guenther : I miss a few things in this description: - what is the value of lock_length supposed to be? From the "lock" prefix it sounds like it is something unchanging, maybe even constant, thus a maximum? - the length attribute still needs to be specified when lock_length i

Ping^2: RFA: Process '*' in '@'-output-template alternatives

2012-10-14 Thread Joern Rennecke
The following patch is still awaiting review: 2011-09-19 J"orn Rennecke * genoutput.c (process_template): Process '*' in '@' alternatives. * doc/md.texi (node Output Statement): Provide example for the above. http://gcc.gnu.org/ml/gcc-patches/2012-09/msg01422.html

Ping: RFA: Improve doloop_begin support

2012-10-14 Thread Joern Rennecke
2012-09-26 J"orn Rennecke * loop-doloop.c (doloop_modify): Pass doloop_end pattern to gen_doloop_begin. * loop-doloop.c (doloop_optimize): Pass flag to indicate if loop is entered at top to gen_doloop_end. * config/arm/thumb2.md (doloop_end): Accept extr

Ping: RFA: Fix OP_INOUT handling of web.c:union_match_dups

2012-10-14 Thread Joern Rennecke
2012-10-02 Joern Rennecke * web.c (union_match_dups): Properly handle OP_INOUT match_dups. http://gcc.gnu.org/ml/gcc-patches/2012-10/msg00189.html

Ping: RFA: add lock_length attribute to break branch-shortening cycles

2012-10-14 Thread Joern Rennecke
2012-10-04 Joern Rennecke * final.c (get_attr_length_1): Use direct recursion rather than calling get_attr_length. (get_attr_lock_length): New function. (INSN_VARIABLE_LENGTH_P): Define. (shorten_branches): Take HAVE_ATTR_lock_length into account

Re: Ping: RFA: Improve doloop_begin support

2012-10-16 Thread Joern Rennecke
Quoting Zdenek Dvorak : + entered_at_top = loop_preheader_edge (loop)->dest == desc->in_edge->dest; is equivalent to + entered_at_top = loop->header == desc->in_edge->dest; But, I don't think it will do what you want. Loops are canonicalized so that their latch blocks have single successor

Re: Ping: RFA: Improve doloop_begin support

2012-10-16 Thread Joern Rennecke
Quoting Zdenek Dvorak : no -- you should also test that latch contains no active insns. I.e., factorize out whatever forwarder_block_p does except for the test "(dest->loop_father->header == dest)" test, Like this? * basic-block.h (forwarder_block_p_1): Declare. * cfgrtl

Re: Ping: RFA: add lock_length attribute to break branch-shortening cycles

2012-10-16 Thread Joern Rennecke
Quoting Richard Sandiford : Joern Rennecke writes: 2012-10-04 Joern Rennecke * final.c (get_attr_length_1): Use direct recursion rather than calling get_attr_length. (get_attr_lock_length): New function. (INSN_VARIABLE_LENGTH_P): Define

Re: Ping: RFA: add lock_length attribute to break branch-shortening cycles

2012-10-18 Thread Joern Rennecke
Quoting Richard Sandiford : The fact that we even have shared unique ids is pretty bad -- and surely a contradiction in terms -- but I think both ways of handling them rely on the length being the same for all copies. If we don't record a length (your version), we won't set something_changed if

RFA: fix dbr_schedule to leave unique ids unique

2012-10-19 Thread Joern Rennecke
Quoting Richard Sandiford : Joern Rennecke writes: Quoting Richard Sandiford : The fact that we even have shared unique ids is pretty bad -- and surely a contradiction in terms -- but I think both ways of handling them rely on the length being the same for all copies. If we don't rec

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