On Mon, May 25, 2015 at 06:39:36AM +0100, Kumar, Venkataramanan wrote:
> Ping!
>
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
> Behalf Of Kumar, Venkataramanan
> Sent: Tuesday, May 19, 2015 9:07 PM
>
On Fri, May 01, 2015 at 09:24:20AM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> It occurs to me that in the IOR-of-shifts form of the rev16 operation we
> should be costing the operand properly. For that we'd want to reuse the
> aarch_rev16_p function that does all the heavy lifting and get it to w
On Fri, May 22, 2015 at 09:30:18AM +0100, Matthew Wahab wrote:
> [Added PR number and updated patches]
>
> This patch adds tests for the code generated by the Aarch64 backend for the
> __sync builtins.
>
> Tested aarch64-none-linux-gnu with check-gcc.
>
> Ok for trunk?
> Matthew
This is OK once
On Tue, May 19, 2015 at 11:12:55AM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> This patch adds a mention of the new native cpu detection feature in aarch64
> GNU/Linux. Gerald, this is a patch against htdocs/gcc-6/changes.html and I
> thought I had seen the 'changes' link in gcc.gnu.org earlier bu
On Thu, May 21, 2015 at 04:57:00PM +0100, Matthew Wahab wrote:
> On Aarch64, the __sync builtins are implemented using the __atomic operations
> and barriers. This makes the the __sync builtins inconsistent with their
> documentation which requires stronger barriers than those for the __atomic
> bu
On Mon, Apr 27, 2015 at 03:33:05PM +0100, Szabolcs Nagy wrote:
>
> On 21/04/15 15:16, pins...@gmail.com wrote:
> >
> > I don't think you need to check if defaulting to little or big-endian here
> > are the specs always have one or the other passing through.
> >
> > Also if musl does not support
On Wed, May 20, 2015 at 02:58:09PM +0100, Ramana Radhakrishnan wrote:
> Hi,
>
> Someone privately pointed out that the ARM and AArch64 ports do not
> define TARGET_RELAXED_ORDERING given that the architecture(s) mandates a
> weak memory model. This patch fixes it for AArch64, the ARM patch
On Thu, May 21, 2015 at 09:54:19AM +0100, Ramana Radhakrishnan wrote:
> And here's an additional patch for the testsuite which was missed in the
> original posting.
>
> This is a testism that's testing code generation as per
> TARGET_RELAXED_ORDERING being false and therefore needs to be adjuste
On Wed, May 27, 2015 at 03:49:24AM +0100, weixiangyu wrote:
> Hi,
Hi,
> The first patch backports the fix of PR
> target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to the 4.9
> branch from trunk r219717,
I can't approve this patch to be backported, so please do not commit it
witho
On Fri, May 29, 2015 at 11:48:34AM +0100, Alan Lawrence wrote:
> Christophe Lyon wrote:
> >
> > This looks OK, but why can't you also drop the other torture-related
> > lines as you did in your previous patch?
> > I mean:
> > load_lib c-torture.exp
> > load_lib torture-options.exp
> > etc...
>
>
-deps.c)
under the obvious rule.
Thanks,
James
---
[AArch64 Obvious] "Fuseable" is not a word -> s/fuseable/fusible/g
2015-06-01 James Greenhalgh
* config/aarch64/aarch64-protos.h (tune_params): Rename
fuseable_ops to fusible_ops.
* config/aarc
On Mon, Jun 01, 2015 at 01:08:15PM +0100, Matthew Wahab wrote:
> On 22/05/15 09:28, Matthew Wahab wrote:
> > [Added PR number and updated patches]
> >
> > This patch changes the code generated for __sync_type_compare_and_swap to
> >
> > ldxr reg; cmp; bne label; stlxr; cbnz; label: dmb ish; mov
On Mon, Jun 01, 2015 at 01:06:08PM +0100, Matthew Wahab wrote:
> On 26/05/15 10:32, James Greenhalgh wrote:
> > Please tie this to the PR which was open in the ChangLog entry.
> >
> >>(aarch64_split_atomic_op): Check for __sync memory models, emit
> >>appro
On Sat, May 23, 2015 at 12:24:00AM +0100, Jim Wilson wrote:
> The compiler currently ICEs when compiling a stdarg function with
> +nofp, as reported in PR 66258.
>
> The aarch64.md file disables FP instructions using TARGET_FLOAT, which
> supports both -mgeneral-regs-only and +nofp. But there is
On Tue, Jun 02, 2015 at 11:38:29AM +0100, Kyrill Tkachov wrote:
> Hi James, Jim,
>
> On 02/06/15 10:42, James Greenhalgh wrote:
> > On Sat, May 23, 2015 at 12:24:00AM +0100, Jim Wilson wrote:
> >> The compiler currently ICEs when compiling a stdarg function with
>
On Thu, May 21, 2015 at 06:33:37AM +0100, Sandra Loosemore wrote:
> ARM testing shares the AArch64 advsimd-intrinsics execution tests. On
> ARM, though, the NEON support being tested is optional -- some arches
> are compatible with the NEON compilation options but hardware available
> for testi
On Wed, Jun 03, 2015 at 08:28:12PM +0100, Sandra Loosemore wrote:
> On 06/03/2015 12:05 PM, James Greenhalgh wrote:
> >
> > This has caused some issues for my multilib testing. Summarised below,
> > with some help from Alan Lawrence.
> >
> > Basically the problem
On Thu, Jun 04, 2015 at 09:27:25AM +0100, Richard Earnshaw wrote:
> On 03/06/15 20:44, James Greenhalgh wrote:
> > On Wed, Jun 03, 2015 at 08:28:12PM +0100, Sandra Loosemore wrote:
> >> On 06/03/2015 12:05 PM, James Greenhalgh wrote:
> >>> Basically the problem occurs
ay be
nonsense, so I defer to others' opinions.
Bootstrapped on AArch64/x86_64.
OK?
Thanks,
James
---
2015-06-04 James Greenhalgh
* builtins.c (expand_builtin_atomic_compare_exchange): Call
emit_cmp_and_jump_insns with the mode of target.
diff --git a/gcc/builtins.c b/gcc
On Fri, Apr 17, 2015 at 12:19:14PM +0100, Kugan wrote:
> >> My point is that adding your patch while keeping the logic at the top
> >> which claims to catch ALL vector operations makes for less readable
> >> code.
> >>
> >> At the very least you'll need to update this comment:
> >>
> >> /* TODO:
On Mon, Apr 20, 2015 at 05:24:39PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> When trying to compile a testcase with -mcpu=cortex-a57+crypto+nocrc I got
> the weird assembler error:
> Assembler messages:
> Error: missing architectural extension
> Error: unrecognized option -mcpu=cortex-a57+crypto+
On Tue, Apr 21, 2015 at 04:24:44PM +0100, Trevor Saunders wrote:
> On Tue, Apr 21, 2015 at 04:14:01PM +0200, Richard Biener wrote:
> > On Tue, Apr 21, 2015 at 3:24 PM, wrote:
> > > From: Trevor Saunders
> > >
> > > gcc/ChangeLog:
> > >
> > > 2015-04-21 Trevor Saunders
> > >
> > > * co
On Mon, Apr 27, 2015 at 02:37:12PM +0100, Wilco Dijkstra wrote:
> Various instructions are supported as integer operations as well as SIMD on
> AArch64. When register pressure is high, lra-constraints inserts spill code
> without taking the allocation class into account, and basically chooses the
>
On Mon, Apr 27, 2015 at 02:42:36PM +0100, Wilco Dijkstra wrote:
> > -Original Message-
> > From: Wilco Dijkstra [mailto:wdijk...@arm.com]
> > Sent: 03 March 2015 16:19
> > To: GCC Patches
> > Subject: [PATCH][AArch64] Use conditional negate for abs expansion
> >
> > Expand abs into a compa
On Sat, Apr 25, 2015 at 12:26:16AM +0100, Kugan wrote:
>
> Thanks for the review. I have updated the patch based on the comments
> with some other minor changes. Bootstrapped and regression tested on
> aarch64-none-linux-gnu with no-new regressions. Is this OK for trunk?
>
>
> Thanks,
> Kugan
>
On Sat, Apr 11, 2015 at 11:37:47AM +0100, Jiangjiji wrote:
> Hi,
> This is a ping for: https://gcc.gnu.org/ml/gcc-patches/2015-03/msg00772.html
> Regtested with aarch64-linux-gnu on QEMU.
> This patch has no regressions for aarch64_be-linux-gnu big-endian target
> too.
> OK for the trunk?
On Wed, May 06, 2015 at 03:12:33AM +0100, Kugan wrote:
> >> gcc/ChangeLog:
> >>
> >> 2015-04-24 Kugan Vivekanandarajah
> >>Jim Wilson
> >>
> >>* config/arm/aarch-common-protos.h (struct mem_cost_table): Added
> >>new fields loadv and storev.
> >>* config/aarch64/aarch64-co
ing on the existing alignment and the knock-on
effects.
Bootstrapped on aarch64-none-linux-gnu with no issues.
Does anyone have any thoughts or preferences as to how we set these
values in future? If not, OK For trunk?
Thanks,
James
---
2014-11-14 James Greenhalgh
* config/aarch64
On Fri, Nov 14, 2014 at 10:42:27AM +, Andrew Pinski wrote:
> On Fri, Nov 14, 2014 at 2:35 AM, James Greenhalgh
> wrote:
> >
> > Hi,
> >
> > We currently do not set any interesting default values for jump and function
> > alignment in AArch64. I've made
coding style issues it highlights.
Thanks,
James Greenhalgh
> diff --git a/gcc/params.def b/gcc/params.def
> index d2d2add..749f962 100644
> --- a/gcc/params.def
> +++ b/gcc/params.def
> @@ -123,6 +123,25 @@ DEFPARAM (PARAM_PARTIAL_INLINING_ENTRY_PROBABILITY,
> &qu
On Wed, Nov 05, 2014 at 11:31:24PM +, James Greenhalgh wrote:
> On Wed, Nov 05, 2014 at 09:50:52PM +, Marc Glisse wrote:
> > Thanks. Do you know if anyone is planning to "port" this patch to the arm
> > target (which IIRC has the same issue)? No pressure, this is
ootstrap comes back clean, and I've built cross-compilers
for the other touched targets
Thanks,
James
---
2014-11-18 James Greenhalgh
PR target/63937
* target.def (use_by_pieces_infrastructure_p): Take unsigned
HOST_WIDE_INT as the size parameter.
un of aarch64.exp/simd.exp for
aarch64-none-elf with no issues.
Cheers,
James
---
2014-11-21 James Greenhalgh
* config/aarch64/aarch64-simd.md
(aarch64_l): Add a tab between
output mnemonic and operands.
(aarch64_simd_vec_unpack_lo_): Lik
Hi,
As requested by Ramana when he OKed the initial change, the attched patch
documents the changes I made to --with-cpu and --with-tune in this patch:
https://gcc.gnu.org/ml/gcc-patches/2014-05/msg02618.html
in the changes for GCC 5.0.
OK?
Thanks,
James
---
? .git
? foo.patch
? htdocs/.#ind
On Fri, Nov 14, 2014 at 02:43:12AM +, Bin.Cheng wrote:
> On Fri, Nov 7, 2014 at 7:13 AM, Jeff Law wrote:
> > On 11/05/14 02:30, Bin.Cheng wrote:
> >> Thanks very much for reviewing. I refined the patch according to your
> >> comments. Also made two small changes: a) skip breaking dependency
On Wed, Nov 26, 2014 at 03:56:03PM +, Alan Lawrence wrote:
> So in case there's any confusion about the behaviour expected of *the vabs
> intrinsic*, here's a testcase (failing without patch, passing with it)...
>
> --Alan
>
> Alan Lawrence wrote:
> > ...as the former is defined as returning
On Wed, Feb 25, 2015 at 01:42:39PM +, Xingxing Pan wrote:
> Hi,
>
> This patch expanding the following RTL types. And it has been merged to the
> latest code base.
>
> (neon_logic): Expand to neon_logic_reg and neon_logic_imm.
> (neon_logic_q): Expand to neon_logic_reg_q an
On Sat, Feb 28, 2015 at 01:29:15AM +, Xingxing Pan wrote:
> On 02/27/2015 04:30 PM, Marcus Shawcroft wrote:
> > On 26 February 2015 at 06:22, Xingxing Pan wrote:
> >> This patch fix the type of mov_aarch64 in aarch64.md.
> >> Is it OK for trunk?
> >
> > OK, thank you /Marcus
> >
>
> Could some
On Fri, Feb 27, 2015 at 02:10:47AM +, Jan Hubicka wrote:
> * ipa-icf.c (symbol_compare_collection::symbol_compare_colleciton):
> Use address_matters_p.
> (redirect_all_callers, set_addressable): New functions.
> (sem_function::merge): Reorganize and fix merging i
On Mon, Mar 02, 2015 at 01:08:13PM +, Maxim Kuvyrkov wrote:
> > On Mar 2, 2015, at 4:44 AM, Terry Guo wrote:
> >
> > Hi there,
> >
> > If target mode isn't specified via either gcc configuration option
> > --with-mode or command line, this patch intends to improve gcc driver to
> > automatic
ternally visible it decided to create a wrapper (to preserve
> potential address compares) and to avoid wrapper cost redirect all direct
> uses.
Hi Honza,
Thanks for the confirmation.
It took me a while longer than expected to get round to it, but
I've committed the attached (rev
Hi Xingxing,
I'm a little confused by your reasons for adding testcases marked XFAIL.
On Thu, Mar 05, 2015 at 01:34:25PM +, Xingxing Pan wrote:
> +/* { dg-final { scan-tree-dump-times "pattern recognized.*w\\\+" 1 "vect" {
> xfail *-*-* } } } */
> +/* { dg-final { cleanup-tree-dump "vect" }
On Thu, Feb 12, 2015 at 03:37:33PM +, Christophe Lyon wrote:
> On 8 February 2015 at 03:24, Andrew Pinski wrote:
> > On Fri, Feb 6, 2015 at 5:02 PM, Andrew Pinski wrote:
> > PR target/64893
> > * config/aarch64/aarch64-builtins.c
> > (aarch64_init_simd_builtins):
> >
On Fri, Mar 06, 2015 at 10:03:46AM +, pins...@gmail.com wrote:
> > On Mar 6, 2015, at 1:45 AM, James Greenhalgh
> > wrote:
> >
> >> On Thu, Feb 12, 2015 at 03:37:33PM +, Christophe Lyon wrote:
> >>> On 8 February 2015 at 03:24, Andrew Pinski wrot
On Wed, Mar 04, 2015 at 09:38:51AM +, James Greenhalgh wrote:
> It took me a while longer than expected to get round to it, but
> I've committed the attached (revision 221175) as the obvious fix, after
> checking that it worked on aarch64-none-elf.
>
> Thanks,
> James
&
On Fri, Mar 06, 2015 at 04:09:40PM +, James Greenhalgh wrote:
> On Wed, Mar 04, 2015 at 09:38:51AM +0000, James Greenhalgh wrote:
> > It took me a while longer than expected to get round to it, but
> > I've committed the attached (revision 221175) as the obvious fix, after
reressions elsewhere, and to confirm the patch fixes
the issue for ARM.
Does this fixup make sense, and if it does, is it OK for trunk?
Thanks,
James
---
2015-03-10 James Greenhalgh
* gcc.dg/vect/pr65310.c (c): Reduce alignment to 4-bytes.
diff --git a/gcc/testsuite/gcc.dg/vect/pr653
On Wed, Mar 11, 2015 at 04:24:07PM +, Ramana Radhakrishnan wrote:
>
> >
> > Attached patch as text.
> >
> > 2015-03-11 Junmo Park
> >
> > * config/arm/cortex-a57.md (cortex_a57_crypto_simple): Add
> > crypto_sha256_fast.
> > (cortex_a57_crypto_complex): Add crypto
to '1', giving
unsigned int 1:15;
which is not going to work.
This patch just disables the check in this test case for
"unused" when testing for ARM, which resolves the issue.
Tested on arm-none-linux-gnueabihf to confirm it clears the FAIL.
OK?
Thanks,
Jame
On Tue, Mar 24, 2015 at 05:46:57PM +, Alan Lawrence wrote:
> Hmmm. This is not the right fix: the tests Richard fixed, were failing because
> of lack of constant propagation and DCE at compile-time, which then didn't
> eliminate the call to link_error. The AArch64 test is failing because this
On Fri, Mar 27, 2015 at 11:14:31PM +, H.J. Lu wrote:
> On Fri, Mar 27, 2015 at 7:38 AM, Marek Polacek wrote:
> > In this testcase we were crashing while trying to gimplify a switch, because
> > the types of the switch condition and case constants didn't match. This ICE
> > started with my -Ws
*ping* on Alex' behalf and CCing the ARM maintainers.
This fix looks obvious to me, and cleans up another couple of FAILs
for the ARM port.
Richard/Ramana?
Cheers,
James
On Thu, Mar 26, 2015 at 03:28:15PM +, Alex Velenko wrote:
> On 04/03/15 11:13, Alex Velenko wrote:
> > 2015-03-04 Alex V
On Thu, Apr 02, 2015 at 06:39:57AM +0100, Jeff Law wrote:
> I'm pleased to announce that James Greenhalgh has been appointed as a
> reviewer for the AArch64 port and that Kyrylo Tkachov has been appointed
> as a reviewer for the ARM port.
>
> James & Kyrylo, if you c
On Wed, Apr 01, 2015 at 11:42:28PM +0100, H.J. Lu wrote:
> On Mon, Mar 30, 2015 at 3:19 PM, Martin Liška wrote:
> > You are right, there's one more occurrence of the usage.
> > I'm going to install the patch I've attached.
> >
>
> This caused:
>
> FAIL: g++.dg/torture/pr64378.C -O2 -flto -fno-
On Thu, Apr 02, 2015 at 11:19:14PM +0100, Sebastian Pop wrote:
> Hi,
>
> from what I understand, Evandro has addressed the comments from Kyrill.
> Are there other problems to be addressed before the patches can go in?
Trunk is currently in Stage 4 development, these patches are fairly
low-risk, b
On Fri, Apr 03, 2015 at 07:53:12PM +0100, Ramana Radhakrishnan wrote:
> On Fri, Apr 3, 2015 at 5:17 PM, Sebastian Pop wrote:
> > Hi,
> >
> > On Thu, Apr 2, 2015 at 5:51 PM, James Greenhalgh
> > wrote:
> >> Trunk is currently in Stage 4 development, these p
On Wed, Mar 25, 2015 at 06:27:49PM +, James Greenhalgh wrote:
> I think your original patch to add -O is just fine, but Marcus or
> Richard will need to approve it.
I haven't seen any howls of objection from Marcus/Richard on this.
As you say, your preferred fix for the "S&qu
On Tue, Apr 14, 2015 at 11:08:55PM +0100, Kugan wrote:
> Now that Stage1 is open, is this OK for trunk.
Hi Kugan,
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index cba3c1a..d6ad0af 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
>
On Wed, Apr 15, 2015 at 11:14:11AM +0100, Kyrill Tkachov wrote:
>
> On 15/04/15 10:25, James Greenhalgh wrote:
> > On Tue, Apr 14, 2015 at 11:08:55PM +0100, Kugan wrote:
> >> Now that Stage1 is open, is this OK for trunk.
> > Hi Kugan,
> >
> >> diff
On Wed, Apr 15, 2015 at 11:45:36AM +0100, Kugan wrote:
> > There are two ways I see that we could clean things up, both of which
> > require some reworking of your patch.
> >
> > Either we remove my check above and teach the RTX costs how to properly
> > cost vector operations, or we fix my check
.
Fixed using the same mechanisms we use elsewhere in the gcc.target/arm/
tests with the attached, applied as obvious as revision 224280.
Thanks,
James
---
gcc/testsuite/
2015-06-09 James Greenhalgh
* g++.dg/ext/pr57735.C: Do not override -mfloat-abi directives
passed by the
Hi,
This is another test which currently fails for -mfloat-abi multilib
testing as it unconditionally sets -mfloat-abi=soft.
Fixed as attached in the same way we deal with other tests like this,
and committed as obvious as revision 224312.
Thanks,
James
---
gcc/testsuite/
2015-06-10 James
On Thu, Jun 11, 2015 at 03:08:59PM +0100, Richard Biener wrote:
> On Thu, 11 Jun 2015, Uros Bizjak wrote:
>
> > > So this turned up other issues thus the following is what I have
> > > committed after bootstrapping and testing on x86_64-unknown-linux-gnu.
> > >
> > > Richard.
> > >
> > > 2015-06-0
On Thu, Jun 11, 2015 at 03:23:21PM +0100, Richard Biener wrote:
> I will have a look next week - mind opening a bugreport for this so
> I dont' forget?
Of course, I've opened https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66510 .
Cheers,
James
On Wed, Jun 10, 2015 at 08:57:37AM +0100, Christian Bruel wrote:
> Hi,
>
> Commited [4/6] as attached (r224314)
>
> thanks
>
> Christian
>
> On 06/08/2015 11:26 AM, Ramana Radhakrishnan wrote:
> > On 08/06/15 09:45, Christian Bruel wrote:
> >>
> >> do you have other feedbacks for the remaining
On Tue, Jun 09, 2015 at 03:18:05AM +0100, Jim Wilson wrote:
> On Tue, Jun 2, 2015 at 3:45 AM, James Greenhalgh
> wrote:
> > On Tue, Jun 02, 2015 at 11:38:29AM +0100, Kyrill Tkachov wrote:
> >> Hi James, Jim,
> >>
> >> On 02/06/15 10:42, James Greenhalgh wrot
On Tue, May 05, 2015 at 02:14:16PM +0100, Jiangjiji wrote:
> Hi James，
>
> Thanks for your comment.
>
> Seems we need a 'dup' before 'fmul' if we use the GCC vector extension syntax
> way.
>
> Example:
> dup v1.2s, v1.s[0]
> fmulv0.2s, v1.2s, v0.2s
>
> And we need anoth
p the patch as too pedantic, but I'll leave that to
the ARM reviewers.
OK?
Thanks,
James
---
gcc/ChangeLog:
2015-06-16 James Greenhalgh
* config/arm/arm-protos.h (struct tune_params): Rename
log_op_non_sc to log_op_non_short_circuit, and rename enum
values to ex
main loop of advsimd-intrinsics.exp in torture-init
and torture-finish.
Tested with an aarch64-none-linux-gnu cross build to ensure it
clears the issue I was seeing.
Applied as revision 224507.
Thanks,
James
---
2015-06-16 James Greenhalgh
* gcc.target/aarch64/advsimd-intrinsics
.
As far as I know, reload is going to get rid of these SUBREGs
for us, so we don't need to modify the output statement.
Tested that this restores the VAX build and that the code-gen is
sensible for the testcase.
OK?
Thanks,
James
---
gcc/
2015-06-16 James Greenhalgh
* config/
On Mon, Jun 15, 2015 at 11:11:16PM +0100, Christophe Lyon wrote:
> Ping?
>
>
> On 27 May 2015 at 22:15, Christophe Lyon wrote:
> > This patch series is a follow-up to the tests I already contributed,
> > converted from my original testsuite.
> >
> > This series consists in 20 new patches, which
On Thu, Jun 11, 2015 at 12:28:08PM +0100, Alan Lawrence wrote:
> Hi,
>
> This is a follow-up to Jim Wilson's patch fixing ICE's with
> -march=armv8-a+nofp, and the discussion here:
> https://gcc.gnu.org/ml/gcc-patches/2015-06/msg00177.html
>
> The first patch improves the error messages to descri
.
Applied as obvious as r224512.
Thanks,
James
---
2015-06-16 James Greenhalgh
* gcc.target/arm/pr65647.c: Do not override -mfloat-abi directives
passed by the testsuite driver.
diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc/testsuite/gcc.target/arm/pr65647.c
index
On Tue, Jun 16, 2015 at 05:44:49PM +0100, Nathan Sidwell wrote:
> On 06/16/15 03:47, Andreas Schwab wrote:
> > Nathan Sidwell writes:
> >
> >>PR c++/58583
> >>* g++.dg/cpp0x/nsdmi-template14.C: New test.
> >
> > spawn -ignore SIGHUP
> > /usr/local/gcc/gcc-20150616/Build/gcc/testsuite/g++2
On Thu, May 22, 2014 at 03:24:23PM +0100, Marcus Shawcroft wrote:
> On 2 May 2014 13:27, Kugan wrote:
>
> > +2014-05-02 Kugan Vivekanandarajah
> > +
> > + * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
> > + define.
> > + * config/aarch64/aarch64-protos.h
On Wed, Jun 17, 2015 at 11:04:24AM +0100, Uros Bizjak wrote:
> On Tue, Jun 16, 2015 at 5:13 PM, Uros Bizjak wrote:
> > Hello!
> >
> > Following patch fixes:
> >
> > cp_lto_pr65276_1.o: In function `std2::runtime_error::~runtime_error()':^M
> > pr65276_1.C:(.text._ZN4std213runtime_errorD2Ev[_ZN4std
On Fri, Jun 19, 2015 at 05:43:01PM +0100, Jim Wilson wrote:
> This is a follow on to the long double 0.0 patch. The float and
> double support has similar problems and need similar fixes, though a
> little smaller in scope. Before the patch this testcase
> void sub1 (float *f) { *f = 0.0; }
> vo
AArch64 with no issues.
OK for trunk (and 5.2 after a few days watching for fallout)?
Thanks,
James
---
gcc/
2015-06-23 James Greenhalgh
PR tree-optimization/66119
* doc/invoke.texi (sra-max-scalarization-size-Osize): Mention that
"0" is used as a sent
example string above, and again in the
standard configuration with no issues.
OK for trunk?
Thanks,
James
---
[Patch AArch64 1/4] Define candidates for instruction fusion in a .def file
gcc/
2015-06-23 James Greenhalgh
* config/aarch64/aarch64-fusion-pairs.def: New.
* co
Hi,
This patch moves the instruction fusion pairs from a set of #defines
to an enum which we can generate from a .def file.
We'll use that .def file again, and the friendly names it introduces
shortly.
OK?
Thanks,
James
---
2015-06-23 James Greenhalgh
* config/aarch64/aa
ssues.
OK?
Thanks,
James
---
2015-06-23 James Greenhalgh
* config/aarch64/aarch64-protos.h (tune_params): Remove
const from members.
(aarch64_tune_params): Remove const, change to no longer be
a pointer.
* config/aarch64/aarch64.c (aarch64_tune_params): R
---
2015-06-23 James Greenhalgh
* config/aarch64/aarch64.opt: (override): New.
* doc/invoke.texi (override): Document.
* config/aarch64/aarch64.c (aarch64_flag_desc): New
(aarch64_fusible_pairs): Likewise.
(aarch64_tuning_f
e expected configurations.
OK?
Thanks,
James
---
2015-06-23 James Greenhalgh
* config/aarch64/aarch64.h (AARCH64_FL_USE_FMA_STEERING_PASS): Delete.
(aarch64_tune_flags): Likewise.
(AARCH64_TUNE_FMA_STEERING): Likewise.
* config/aarch64/aarch64-cores.def (cortex-a57): Remove
On Tue, Jun 23, 2015 at 09:52:01AM +0100, Jakub Jelinek wrote:
> On Tue, Jun 23, 2015 at 09:18:52AM +0100, James Greenhalgh wrote:
> > This patch fixes the issue by always calling get_move_ratio in the SRA
> > code, ensuring that an up-to-date value is used.
> >
> > U
s to ensure this brings back the missing tests,
and a full x86-64 testrun to make sure I haven't dropped any from there.
OK for trunk?
Thanks,
James
---
2015-06-23 James Greenhalgh
* lib/c-torture.exp: Don't call check_effective_target_lto
before setting up envir
On Tue, Jun 23, 2015 at 10:00:21PM +0100, Andrew Pinski wrote:
> Hi,
> This patch updates the schedule model to be more accurate and model
> SIMD and fp instructions that I had missed out when I had the last
> patch.
>
> OK? Bootstrapped and tested on aarch64-linux-gnu with no regeessions.
The
On Tue, Jun 23, 2015 at 05:03:28PM +0100, Alan Lawrence wrote:
> This fixes another ICE, obtained with the attached testcase - yes, there was
> a
> way to get hold of a float, without passing an argument or going through
> movsf/movdf!
>
> Bootstrapped + check-gcc on aarch64-none-linux-gnu.
>
On Tue, Jun 23, 2015 at 05:03:13PM +0100, Alan Lawrence wrote:
> James Greenhalgh wrote:
<>
> To my eye, beginning a sentence in lowercase looks very odd in pdf, and still
> a
> bit odd in html. Have changed to "That is"...?
>
> Tested with make pdf & ma
On Tue, Jun 23, 2015 at 05:02:46PM +0100, Alan Lawrence wrote:
> James Greenhalgh wrote:
> Bootstrap + check-gcc on aarch64-none-linux-gnu.
>
> (ChangeLog's identical to v1)
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsi
On Wed, Jun 24, 2015 at 09:28:34PM +0100, Mikhail Maltsev wrote:
> On 06/24/2015 06:52 PM, Christophe Lyon wrote:
> > Hi Mikhail,
> >
> > In the gcc-5-branch, I can see that your new inhibit-warn-2.C test
> > fails (targets ARM and AArch64).
> >
> > I can see this error message in g++.log:
> > /a
p;e, h, i = 7, l = 1, m, n, o, q = &m, r, s = &r, u, w = 9,
> > x,
> >
> >
> > Patch was tested by running the testcase once with -mcpu=cortex-a9
> > (skipped as expected) and once with -mcpu=cortex-m0 (passes).
> >
> > Is this ok for trunk?
On Thu, Jun 25, 2015 at 05:05:22AM +0100, Jeff Law wrote:
> On 06/23/2015 09:42 AM, James Greenhalgh wrote:
> >
> > On Tue, Jun 23, 2015 at 09:52:01AM +0100, Jakub Jelinek wrote:
> >> On Tue, Jun 23, 2015 at 09:18:52AM +0100, James Greenhalgh wrote:
> >>>
On Mon, Jun 29, 2015 at 10:18:23AM +0100, Kumar, Venkataramanan wrote:
>
> > -Original Message-
> > From: Dr. Philipp Tomsich [mailto:philipp.toms...@theobroma-systems.com]
> > Sent: Monday, June 29, 2015 2:17 PM
> > To: Kumar, Venkataramanan
> > Cc: pins...@gmail.com; Benedikt Huber; gcc-
On Fri, Jun 19, 2015 at 05:30:21PM +0100, Matt Thomas wrote:
>
> > On Jun 19, 2015, at 8:51 AM, Jan-Benedict Glaw wrote:
> >
> > Hi James,
> >
> > On Tue, 2015-06-16 10:58:48 +0100, James Greenhalgh
> > wrote:
> >> The testcase in this patch,
On Fri, Jun 26, 2015 at 06:10:00PM +0100, Jakub Jelinek wrote:
> On Fri, Jun 26, 2015 at 06:03:34PM +0100, James Greenhalgh wrote:
> > --- /dev/null
> > +++ b/gcc/testsuite/g++.dg/pr66119.C
>
> I think generally testcases shouldn't be added into g++.dg/ directly,
> b
On Mon, Jun 29, 2015 at 01:42:13PM +0100, Jiong Wang wrote:
>
> This patch fix the breakage caused by
>
> https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01913.html
>
> We fall back to -fPIC if there is no assembler support on those new
> relocation modifiers for -fpic.
>
> OK for trunk?
>
> g
On Tue, Jun 30, 2015 at 03:17:00PM +0100, Jiong Wang wrote:
>
> As discussed here
>
> https://gcc.gnu.org/ml/gcc-patches/2015-06/msg02151.html,
>
> Since have enabled binutils feature detection when configuring gcc,
> -fpic will not be enabled if there is no binutils support on those new
> rel
On Fri, Jun 26, 2015 at 01:10:21PM +0100, Matthew Wahab wrote:
> This patch backports the tests added for the code generated by the Aarch64
> backend
> for the __sync builtins.
>
> The trunk patch submission is at
> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01992.html
> The commit is at https
On Fri, Jun 26, 2015 at 01:08:50PM +0100, Matthew Wahab wrote:
> This patch backports the changes made to strengthen the barriers emitted for
> the __sync compare-and-swap builtins.
>
> The trunk patch submission is at
> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01990.html
> The commit is at h
On Fri, Jun 26, 2015 at 01:07:09PM +0100, Matthew Wahab wrote:
>
> This patch backports the changes made to strengthen the barriers emitted for
> the __sync fetch-and-op/op-and-fetch builtins.
>
> The trunk patch submission is at
> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01989.html
> The co
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