On Fri, Sep 24, 2021 at 9:08 PM Segher Boessenkool
wrote:
>
> On Mon, Sep 13, 2021 at 04:24:13PM +0200, Richard Biener wrote:
> > On Mon, Sep 13, 2021 at 4:10 PM Jeff Law via Gcc-patches
> > wrote:
> > > I'm not convinced that we need the inner mode to match anything. As
> > > long as the vec_co
On Mon, Sep 27, 2021 at 8:53 PM Richard Biener
wrote:
>
> On Fri, Sep 24, 2021 at 1:26 PM liuhongt wrote:
> >
> > Hi:
> > Related discussion in [1] and PR.
> >
> > Bootstrapped and regtest on x86_64-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > [1] https://gcc.gnu.org/pipermail/gcc-patches/20
On Tue, Sep 28, 2021 at 2:59 PM Richard Biener via Gcc-patches
wrote:
>
> On Mon, 27 Sep 2021, sunil.k.pandey wrote:
>
> > On Linux/x86_64,
> >
> > 6390c5047adb75960f86d56582e6322aaa4d9281 is the first bad commit
> > commit 6390c5047adb75960f86d56582e6322aaa4d9281
> > Author: Richard Biener
> > D
On Fri, Oct 29, 2021 at 12:20 AM Martin Sebor via Gcc-patches
wrote:
>
> On 10/28/21 1:23 AM, liuhongt via Gcc-patches wrote:
> > Adjust code in check_vect_slp_aligned_store_usage to make it an exact
> > pattern match of the corresponding testcases.
> > These new target/xfail selectors are added a
On Thu, Oct 28, 2021 at 10:26 AM Hongtao Liu wrote:
>
> On Mon, Oct 25, 2021 at 4:24 PM liuhongt wrote:
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> I'm going to check in this patch if there's
On Fri, Oct 29, 2021 at 10:34 AM Martin Sebor wrote:
>
> On 10/28/21 7:47 PM, Hongtao Liu wrote:
> > On Fri, Oct 29, 2021 at 12:20 AM Martin Sebor via Gcc-patches
> > wrote:
> >>
> >> On 10/28/21 1:23 AM, liuhongt via Gcc-patches wrote:
> >>> Adju
On Thu, Nov 4, 2021 at 9:19 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> _tile_loadd, _tile_stored, _tile_streamloadd intrinsics are defined by
> macro, so the parameters should be wrapped by parentheses to accept
> expressions.
>
> Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde.
On Thu, Nov 4, 2021 at 11:25 AM Hongyu Wang wrote:
>
> > Could you add a testcase for that?
>
> Yes, updated patch.
>
> Hongtao Liu via Gcc-patches 于2021年11月4日周四 上午10:25写道：
> >
> > On Thu, Nov 4, 2021 at 9:19 AM Hongyu Wang via Gcc-patches
> > wrote:
On Thu, Nov 4, 2021 at 9:50 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> AVX512VNNI/AVXVNNI has vpdpwssd for HImode, vpdpbusd for QImode, so
> Adjust HImode sdot_prod expander and add QImode usdot_prod expander
> to enhance vectorization for dotprod.
>
> Bootstraped/regtested on x86_64-pc-lin
On Fri, Nov 5, 2021 at 5:52 PM Richard Biener
wrote:
>
> On Fri, Nov 5, 2021 at 6:38 AM liuhongt wrote:
> >
> > a and b are same type as trunc type and has less precision than
> > extend type, the transformation is guarded by flag_finite_math_only.
> >
> > Bootstrapped and regtested under x86_64-
On Fri, Nov 5, 2021 at 3:09 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> This patch is to support cmla_optab, cmul_optab, cmla_conj_optab,
> cmul_conj_optab for vector _Float16.
> Ok for master?
LGTM.
> gcc/ChangeLog:
>
> * config/i386/sse.md (cmul3): add new define_expand.
>
On Fri, Nov 5, 2021 at 3:20 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> This patch is to support fold _mm512_fmadd_pch (a, _mm512_set1_pch(*(b)), c)
> to 1 instruction vfmaddcph (%rsp){1to16}, %zmm1, %zmm2.
> OK for master?
>
LGTM.
> gcc/ChangeLog:
>
> * config/i386/sse.md (fma__
On Mon, Nov 8, 2021 at 4:59 PM Richard Biener
wrote:
>
> On Mon, Nov 8, 2021 at 2:30 AM Hongtao Liu wrote:
> >
> > On Fri, Nov 5, 2021 at 5:52 PM Richard Biener
> > wrote:
> > >
> > > On Fri, Nov 5, 2021 at 6:38 AM liuhongt wrote:
> > > &g
On Tue, Nov 9, 2021 at 6:21 PM Richard Biener
wrote:
>
> On Tue, Nov 9, 2021 at 3:37 AM Hongtao Liu wrote:
> >
> > On Mon, Nov 8, 2021 at 4:59 PM Richard Biener
> > wrote:
> > >
> > > On Mon, Nov 8, 2021 at 2:30 AM Hongtao Liu wrote:
> > &g
On Tue, Nov 9, 2021 at 6:22 PM Richard Biener via Gcc-patches
wrote:
>
> On Tue, Nov 9, 2021 at 3:09 AM liuhongt wrote:
> >
> > This will enable transformation like
> >
> > - # sum1_50 = PHI
> > - # sum2_52 = PHI
> > + # sum1_50 = PHI <_87(13), 0(4)>
> > + # sum2_52 = PHI <_89(13), 0(4)>
>
On Sat, Nov 13, 2021 at 2:21 AM H.J. Lu via Gcc-patches
wrote:
>
> On Fri, Nov 12, 2021 at 8:13 AM Jakub Jelinek wrote:
> >
> > On Fri, Nov 12, 2021 at 07:55:26AM -0800, H.J. Lu wrote:
> > > > I have following patch queued for testing for this...
> > > >
> > > > 2021-11-12 Jakub Jelinek
> > >
On Mon, Nov 15, 2021 at 9:37 AM Hongtao Liu wrote:
>
> On Sat, Nov 13, 2021 at 2:21 AM H.J. Lu via Gcc-patches
> wrote:
> >
> > On Fri, Nov 12, 2021 at 8:13 AM Jakub Jelinek wrote:
> > >
> > > On Fri, Nov 12, 2021 at 07:55:26AM -0800, H.J. Lu wrote:
>
On Tue, Nov 16, 2021 at 4:23 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> This patch is to add alias for f*mul_*ch intrinsics.
>
> Ok for master?
This patch just adds some macro definitions (new aliases for
intrinsic) to the header file, and I think this should be low risk.
And considering
On Tue, Nov 16, 2021 at 4:15 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> vcvtph2ps and vcvtps2ph should be used to convert _Float16 to SFmode with
> -mf16c. So added define_insn extendhfsf2 and truncsfhf2 for target_f16c.
>
> OK for master?
>
> gcc/ChangeLog:
>
> PR target/102811
Hi:
In folding target-specific builtin, when lhs is NULL, create a
temporary variable for it.
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}
gcc/ChangeLog:
PR target/100660
* config/i386/i386.c (ix86_gimple_fold_builtin): Create a tmp
variable for lhs when it doe
On Thu, May 20, 2021 at 4:06 PM Richard Biener
wrote:
>
> On Thu, May 20, 2021 at 8:54 AM Hongtao Liu wrote:
> >
> > Hi:
> > In folding target-specific builtin, when lhs is NULL, create a
> > temporary variable for it.
> > Bootstrapped and regtested on
On Thu, May 13, 2021 at 8:43 AM Hongtao Liu wrote:
>
> On Wed, May 12, 2021 at 8:38 PM Uros Bizjak wrote:
> >
> > On Wed, May 12, 2021 at 1:42 PM Hongtao Liu wrote:
> > >
> > > On Wed, May 12, 2021 at 4:36 PM Uros Bizjak wrote:
> > > >
> &g
On Thu, May 20, 2021 at 4:30 PM Richard Biener
wrote:
>
> On Thu, May 20, 2021 at 10:15 AM Hongtao Liu wrote:
> >
> > On Thu, May 20, 2021 at 4:06 PM Richard Biener
> > wrote:
> > >
> > > On Thu, May 20, 2021 at 8:54 AM Hongtao Liu wrote:
>
Hi:
This patch is about to Fold __builtin_ia32_pblendvb128 (a, b, c) as
VEC_COND_EXPR (c < 0, b, a), similar for float version but with
mask operand VIEW_CONVERT_EXPR to same sized integer vectype.
After folding, blendv related patterns can be redefined as
vec_merge since all elements of mask
Hi:
This patch is about to add define_insn_and_split to convert avx512
mask mov back to pblendv instructions when mask operand is (lt: reg
const0_rtx).
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog:
PR target/100648
* config/i386/sse.md
Hi:
This patch is about to add expanders for vashl,
vlshr,
vashr and vashr.
Besides there's some assumption in expand_mult_const that mul and
add must be available at the same time, but for i386, addv8qi is
restricted under TARGET_64BIT, but mulv8qi not, that could cause ICE.
So restrict mulv8qi
Hi:
Details described in PR.
Bootstrapped and regtest on
x86_64-linux-gnu{-m32,}/x86_64-linux-gnu{-m32\
-march=cascadelake,-march=cascadelake}
Ok for trunk?
gcc/ChangeLog:
PR tree-optimization/pr98365
* tree-if-conv.c (strip_nop_cond_scalar_reduction): New function.
Hi:
This patch is about to do transformation like below.
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Ok for trunk?
from
notl%edi
vpbroadcastd%edi, %xmm0
vpand %xmm1, %xmm0, %xmm0
to
vpbroadcastd%edi, %xmm0
vpandn %xmm1, %xmm0
On Tue, May 18, 2021 at 11:18 PM Richard Sandiford
wrote:
>
> Hongtao Liu via Gcc-patches writes:
> > On Mon, May 17, 2021 at 5:56 PM Richard Sandiford
> > wrote:
> >> It looks like the rtx “used” flag is unused for INSNs, so we could
> >> use that as a CALL_
On Tue, May 25, 2021 at 2:11 PM Andrew Pinski wrote:
>
> On Mon, May 24, 2021 at 11:03 PM Hongtao Liu via Gcc-patches
> wrote:
> >
> > Hi:
> > This patch is about to do transformation like below.
> > Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
On Tue, May 25, 2021 at 2:04 PM Hongtao Liu wrote:
>
> On Tue, May 18, 2021 at 11:18 PM Richard Sandiford
> wrote:
> >
> > Hongtao Liu via Gcc-patches writes:
> > > On Mon, May 17, 2021 at 5:56 PM Richard Sandiford
> > > wrote:
> > >> It loo
On Tue, May 25, 2021 at 2:29 PM Andrew Pinski wrote:
>
> On Mon, May 24, 2021 at 11:23 PM Hongtao Liu wrote:
> >
> > On Tue, May 25, 2021 at 2:11 PM Andrew Pinski wrote:
> > >
> > > On Mon, May 24, 2021 at 11:03 PM Hongtao Liu via Gcc-patches
> > &g
Update patch:
The new patch simplify (vec_duplicate (not (nonimmedaite_operand)))
to (not (vec_duplicate (nonimmedaite_operand))). This is not a
straightforward simplification, just adding some tendency to pull not
out of vec_duplicate.
For i386, it will enable below opt
from
notl
On Tue, May 25, 2021 at 6:24 PM Richard Biener
wrote:
>
> On Mon, May 24, 2021 at 11:52 AM Hongtao Liu wrote:
> >
> > Hi:
> > Details described in PR.
> > Bootstrapped and regtest on
> > x86_64-linux-gnu{-m32,}/x86_64-linux-gnu{-m32\
> > -march=ca
On Wed, May 26, 2021 at 12:12 PM Andrew Pinski wrote:
>
> On Tue, May 25, 2021 at 6:17 PM Hongtao Liu wrote:
> >
> > Update patch:
> > The new patch simplify (vec_duplicate (not (nonimmedaite_operand)))
> > to (not (vec_duplicate (nonimmedaite_operand))). Thi
Hi:
This is an updated patch which implements vzeroupper as call_insn
which has a special vzeroupper ABI, also in this patch i reverted
r11-7684, r10-6451, r10-3677 which seems to fix the same issue but in
a different way.
Bootstrapped and regtested on x86_64-linux-gnux{-m32,} and
x86_64-linux-
On Wed, May 26, 2021 at 8:41 PM Richard Biener
wrote:
>
> On Wed, May 26, 2021 at 7:06 AM Hongtao Liu wrote:
> >
> > On Tue, May 25, 2021 at 6:24 PM Richard Biener
> > wrote:
> > >
> > > On Mon, May 24, 2021 at 11:52 AM Hongtao Liu wrote:
> > &
On Mon, May 31, 2021 at 6:14 PM Richard Biener
wrote:
>
> On Thu, May 27, 2021 at 9:05 AM Hongtao Liu wrote:
> >
> > On Wed, May 26, 2021 at 8:41 PM Richard Biener
> > wrote:
> > >
> > > On Wed, May 26, 2021 at 7:06 AM Hongtao Liu wrote:
> > >
On Thu, May 27, 2021 at 6:50 PM Richard Sandiford
wrote:
>
> Jakub Jelinek writes:
> > On Thu, May 27, 2021 at 01:07:09PM +0800, Hongtao Liu via Gcc-patches wrote:
> >> + /* Flag used for call_insn indicates it's a fake call. */
> >> + RTX_FLAG (insn, used
On Thu, May 27, 2021 at 3:05 PM Uros Bizjak wrote:
>
> On Thu, May 27, 2021 at 7:03 AM Hongtao Liu wrote:
> >
> > Hi:
> > This is an updated patch which implements vzeroupper as call_insn
> > which has a special vzeroupper ABI, also in this patch i reverted
&g
On Tue, Jun 1, 2021 at 10:22 AM Hongtao Liu wrote:
>
> On Thu, May 27, 2021 at 6:50 PM Richard Sandiford
> wrote:
> >
> > Jakub Jelinek writes:
> > > On Thu, May 27, 2021 at 01:07:09PM +0800, Hongtao Liu via Gcc-patches
> > > wrote:
> > >>
Hi:
This patch is about to simplify (view_convert:type ~a) < 0 to
(view_convert:type a) >= 0 when type is signed integer. Similar for
(view_convert:type ~a) >= 0.
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Ok for the trunk?
gcc/ChangeLog:
PR middle-end/100738
* m
On Wed, May 26, 2021 at 1:17 PM Hongtao Liu wrote:
>
> On Wed, May 26, 2021 at 12:12 PM Andrew Pinski wrote:
> >
> > On Tue, May 25, 2021 at 6:17 PM Hongtao Liu wrote:
> > >
> > > Update patch:
> > > The new patch simplify (vec_duplicat
On Tue, Jun 1, 2021 at 1:29 PM Andrew Pinski wrote:
>
> On Mon, May 31, 2021 at 10:21 PM Hongtao Liu via Gcc-patches
> wrote:
> >
> > Hi:
> > This patch is about to simplify (view_convert:type ~a) < 0 to
> > (view_convert:type a) >= 0 w
On Wed, Jun 2, 2021 at 7:07 AM H.J. Lu via Gcc-patches
wrote:
>
> On Tue, Jun 1, 2021 at 7:21 AM Jeff Law wrote:
> >
> >
> >
> > On 6/1/2021 7:29 AM, H.J. Lu via Gcc-patches wrote:
> > > On Tue, Jun 1, 2021 at 6:25 AM Richard Biener
> > > wrote:
> > >> On Tue, Jun 1, 2021 at 3:05 PM H.J. Lu wro
Please discard this one, sorry for disturbing.
Obviously I'm new to git send-email.
On Wed, Jun 2, 2021 at 1:40 PM liuhongt via Gcc-patches
wrote:
>
> This is the updated patch.
>
>
--
BR,
Hongtao
Ping,
This is a splitted middle-end patch as a follow up of
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571544.html
On Thu, Jun 3, 2021 at 2:54 PM liuhongt via Gcc-patches
wrote:
>
> Use "used" flag for CALL_INSN to indicate it's a fake call. If it's a
> fake call, it won't have its own f
Ping
This is a splitted backend patch as a follow up of
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571545.html
On Thu, Jun 3, 2021 at 2:55 PM liuhongt via Gcc-patches
wrote:
>
> When __builtin_ia32_vzeroupper is called explicitly, the corresponding
> vzeroupper pattern does not carry an
On Tue, Jun 1, 2021 at 6:17 PM Marc Glisse wrote:
>
> On Tue, 1 Jun 2021, Hongtao Liu via Gcc-patches wrote:
>
> > Hi:
> > This patch is about to simplify (view_convert:type ~a) < 0 to
> > (view_convert:type a) >= 0 when type is signed integer. Similar fo
ping
On Mon, May 24, 2021 at 12:56 PM Hongtao Liu wrote:
>
> Hi:
> This patch is about to Fold __builtin_ia32_pblendvb128 (a, b, c) as
> VEC_COND_EXPR (c < 0, b, a), similar for float version but with
> mask operand VIEW_CONVERT_EXPR to same sized integer vectype.
>
&g
On Fri, Jun 4, 2021 at 2:27 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Thu, Jun 3, 2021 at 8:54 AM liuhongt wrote:
> >
> > When __builtin_ia32_vzeroupper is called explicitly, the corresponding
> > vzeroupper pattern does not carry any CLOBBERS or SETs before LRA,
> > which leads to incorrect o
On Fri, Jun 4, 2021 at 1:01 PM Hongtao Liu wrote:
>
> On Tue, Jun 1, 2021 at 6:17 PM Marc Glisse wrote:
> >
> > On Tue, 1 Jun 2021, Hongtao Liu via Gcc-patches wrote:
> >
> > > Hi:
> > > This patch is about to simplify (view_convert:type ~a) < 0 to
On Fri, Jun 4, 2021 at 4:18 PM Marc Glisse wrote:
>
> On Fri, 4 Jun 2021, Hongtao Liu via Gcc-patches wrote:
>
> > On Tue, Jun 1, 2021 at 6:17 PM Marc Glisse wrote:
> >>
> >> On Tue, 1 Jun 2021, Hongtao Liu via Gcc-patches wrote:
> >>
> &
On Mon, Jun 7, 2021 at 2:22 PM Hongtao Liu wrote:
>
> On Fri, Jun 4, 2021 at 4:18 PM Marc Glisse wrote:
> >
> > On Fri, 4 Jun 2021, Hongtao Liu via Gcc-patches wrote:
> >
> > > On Tue, Jun 1, 2021 at 6:17 PM Marc Glisse wrote:
> > >>
> > >&
On Wed, Jun 9, 2021 at 2:02 AM H.J. Lu via Gcc-patches
wrote:
>
> 1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
> operands to vector broadcast from an integer with AVX2.
> 2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
> won't increase stack alignme
On Fri, Oct 1, 2021 at 6:13 PM Gerald Pfeifer wrote:
>
> On Fri, 24 Sep 2021, Hongtao Liu via Gcc-patches wrote:
> > + New ISA extension support for Intel AVX512-FP16 was added to GCC.
> > + AVX512FP16 intrinsics are available [...]
>
> So, is it AVX512-FP16 or A
On Thu, Oct 7, 2021 at 11:38 PM H.J. Lu via Gcc-patches
wrote:
>
> On Thu, Oct 7, 2021 at 8:35 AM Martin Liška wrote:
> >
> > Hello.
> >
> > The patch is approved, are you planning committing the changes?
Committed.
> >
> > Thanks,
> > Martin
>
> Hongtao is on holiday. He will be back later toda
On Fri, Oct 8, 2021 at 5:31 PM liuhongt wrote:
>
> For AVX512-FP16, HFmode only supports vcmpsh whose dest is mask
> register, so for movhfcc, it's
>
> vcmpsh op2, op1, %k1
> vmovsh op1, op2{%k1}
> mov op2, dest
>
> gcc/ChangeLog:
>
> PR target/102639
> * config/i386/i386-expand.c
On Fri, Oct 8, 2021 at 8:02 PM sunil.k.pandey via Gcc-patches
wrote:
>
> On Linux/x86_64,
>
> 2b8453c401b699ed93c085d0413ab4b5030bcdb8 is the first bad commit
> commit 2b8453c401b699ed93c085d0413ab4b5030bcdb8
> Author: liuhongt
> Date: Mon Sep 6 13:48:49 2021 +0800
>
> Enable auto-vectoriza
On Sat, Oct 9, 2021 at 1:27 AM sunil.k.pandey via Gcc-patches
wrote:
>
> On Linux/x86_64,
>
> 2b8453c401b699ed93c085d0413ab4b5030bcdb8 is the first bad commit
> commit 2b8453c401b699ed93c085d0413ab4b5030bcdb8
> Author: liuhongt
> Date: Mon Sep 6 13:48:49 2021 +0800
>
> Enable auto-vectoriza
On Sat, Oct 9, 2021 at 10:53 AM Hongtao Liu wrote:
>
> On Sat, Oct 9, 2021 at 1:27 AM sunil.k.pandey via Gcc-patches
> wrote:
> >
> > On Linux/x86_64,
> >
> > 2b8453c401b699ed93c085d0413ab4b5030bcdb8 is the first bad commit
> > commit 2b8453c401b699ed93c085
On Sat, Oct 9, 2021 at 3:51 PM Kewen.Lin via Gcc-patches
wrote:
>
> Hi,
>
> This patch fixes the typos introduced by commit r12-4240.
>
> The dg-warning format looks like:
>
> { dg-warning regexp [comment [{ target/xfail selector } [line] ]] }
>
> Some dg-warnings such as:
>
> { dg-warning "\\\[-W
On Mon, Oct 11, 2021 at 10:23 AM Kewen.Lin via Gcc-patches
wrote:
>
> Hi Hongtao,
>
> on 2021/10/11 上午10:10, liuhongt via Gcc-patches wrote:
> > libgomp/ChangeLog:
> >
> > * testsuite/libgomp.graphite/force-parallel-8.c: Add
> > -fno-tree-vectorize.
> > ---
> > libgomp/testsuite/libgomp.gr
On Mon, Oct 11, 2021 at 4:55 PM Roger Sayle wrote:
>
>
> This patch contains two SUBREG-related optimization enabling tweaks to
> the x86 backend.
>
> The first change, to ix86_expand_vector_extract, cures the strange
> -march=cascadelake related non-determinism that affected my new test
> cases l
On Monday, October 11, 2021, Jakub Jelinek via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> On Mon, Oct 11, 2021 at 11:28:55AM +0200, Jakub Jelinek via Gcc-patches
> wrote:
> > I don't think this is the right thing to do.
> > This just means that at some point between 2013 when -fsimd-cost-mode
On Tue, Oct 12, 2021 at 4:08 AM Martin Sebor via Gcc-patches
wrote:
>
> On 10/11/21 11:43 AM, Segher Boessenkool wrote:
> > On Mon, Oct 11, 2021 at 10:23:03AM -0600, Martin Sebor wrote:
> >> On 10/11/21 9:30 AM, Segher Boessenkool wrote:
> >>> On Mon, Oct 11, 2021 at 10:47:00AM +0800, Kewen.Lin wr
On Tue, Oct 12, 2021 at 11:49 PM Martin Sebor wrote:
>
> On 10/11/21 8:31 PM, Hongtao Liu wrote:
> > On Tue, Oct 12, 2021 at 4:08 AM Martin Sebor via Gcc-patches
> > wrote:
> >>
> >> On 10/11/21 11:43 AM, Segher Boessenkool wrote:
> >>> On Mon
On Wed, Oct 13, 2021 at 11:34 AM Hongtao Liu wrote:
>
> On Tue, Oct 12, 2021 at 11:49 PM Martin Sebor wrote:
> >
> > On 10/11/21 8:31 PM, Hongtao Liu wrote:
> > > On Tue, Oct 12, 2021 at 4:08 AM Martin Sebor via Gcc-patches
> > > wrote:
> > >>
On Wed, Oct 13, 2021 at 5:07 PM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> Current mask/mask3 implementation for complex fma contains
> duplicated parameter in macro, which may cause error at -O0.
> Refactor macro implementation to builtins to avoid potential
> error.
>
> For round intrinsic w
On Thu, Oct 14, 2021 at 10:39 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> This patch supports HFmode vector shuffle by creating HImode subreg when
> expanding permutation expr.
>
> Bootstrapped/regtested on x86_64-pc-linux-gnu{-m32,} and sde{-m32,}
> OK for master?
>
> gcc/ChangeLog:
>
>
On Fri, Oct 15, 2021 at 1:07 PM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> For V4HFmode, doing vector concat like
>
> __builtin_shufflevector (a, b, {0, 1, 2, 3, 4, 5, 6, 7})
>
> could trigger ICE since it is not handled in ix86_vector_init ().
>
> Handle HFmode like HImode to avoid such ICE.
On Fri, Oct 15, 2021 at 1:37 PM Hongyu Wang wrote:
>
> > This part seems not related to vector shuffle.
> Yes, have separated this part to another patch and checked-in.
>
> Updated patch. Ok for this one?
>
> Hongtao Liu via Gcc-patches 于2021年10月14日周四 下午2:33写道：
> >
checks for NULL seems reasonable according to documents,
> > op0,op1,target maybe NULL.
> Thanks for pointing it out, didn't realize the difference between
> these 2 functions.
LGTM.
>
> Updated patch.
>
> Hongtao Liu 于2021年10月15日周五 下午1:54写道：
> >
> > On Fri, O
On Fri, Oct 15, 2021 at 4:38 PM dianhong.xu--- via Gcc-patches
wrote:
>
> From: dianhong xu
>
> Add *_set1_pch (_Float16 _Complex A) intrinsics.
>
> gcc/ChangeLog:
>
> * config/i386/avx512fp16intrin.h:
> (_mm512_set1_pch): New intrinsic.
> * config/i386/avx512fp16vlintrin.
On Fri, Oct 15, 2021 at 11:37 PM Martin Sebor wrote:
>
> On 10/14/21 1:11 AM, liuhongt wrote:
> > Hi Kewen:
> >Cound you help to verify if this patch fix those regressions
> > for rs6000 port.
> >
> > As discussed in [1], this patch add xfail/target selector to those
> > testcases, also make a
On Fri, Oct 15, 2021 at 3:11 PM Kewen.Lin via Gcc-patches
wrote:
>
> on 2021/10/14 下午6:56, Kewen.Lin via Gcc-patches wrote:
> > Hi Hongtao,
> >
> > on 2021/10/14 下午3:11, liuhongt wrote:
> >> Hi Kewen:
> >> Cound you help to verify if this patch fix those regressions
> >> for rs6000 port.
> >>
>
On Wed, Oct 20, 2021 at 7:34 PM Christophe Lyon via Gcc-patches
wrote:
>
> Hi,
>
>
> On Tue, Oct 19, 2021 at 11:03 AM liuhongt via Gcc-patches <
> gcc-patches@gcc.gnu.org> wrote:
>
> > updated patch:
> > 1. Add documents in doc/sourcebuild.texi (Effective-Target Keywords).
> > 2. Reduce -novec
On Thu, Oct 21, 2021 at 9:20 AM Hongtao Liu wrote:
>
> On Wed, Oct 20, 2021 at 7:34 PM Christophe Lyon via Gcc-patches
> wrote:
> >
> > Hi,
> >
> >
> > On Tue, Oct 19, 2021 at 11:03 AM liuhongt via Gcc-patches <
> > gcc-patches@gcc.gnu.org
On Thu, Oct 21, 2021 at 10:06 AM Hongtao Liu wrote:
>
> On Thu, Oct 21, 2021 at 9:20 AM Hongtao Liu wrote:
> >
> > On Wed, Oct 20, 2021 at 7:34 PM Christophe Lyon via Gcc-patches
> > wrote:
> > >
> > > Hi,
> > >
> > >
> > >
On Wed, Oct 20, 2021 at 1:31 PM Hongyu Wang via Gcc-patches
wrote:
>
> Since _Float16 type is enabled under sse2 target, returning
> V8HFmode vector without AVX512F target would generate wrong
> vmovdqa64 instruction. Adjust ix86_get_ssemov to avoid this.
>
> Bootstraped/regtested on x86_64-pc-lin
de 100644
> index 000..bad4fa9394e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr102812.c
> @@ -0,0 +1,12 @@
> +/* PR target/102812 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -msse4 -mno-avx" } */
> +/* { dg-final { scan-assembler-no
i is
On Wed, Oct 13, 2021 at 8:34 PM Richard Biener via Gcc-patches
wrote:
>
> On Sun, Oct 10, 2021 at 3:49 PM H.J. Lu wrote:
> >
> > Changes in v4:
> >
> > 1. Bypass redundant check when inputs have been transformed to the
> > equivalent canonical form with valid bit operation.
> >
> > Changes
On Fri, Oct 22, 2021 at 1:57 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> This patch is to support transform in fast-math something like
> _mm512_add_ph(x1, _mm512_fmadd_pch(a, b, _mm512_setzero_ph())) to
> _mm512_fmadd_pch(a, b, x1).
>
> And support transform _mm512_add_ph(x1, _mm512_f
On Mon, Oct 25, 2021 at 1:59 PM liuhongt wrote:
>
> Similar for sqrt/sqrtl.
>
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
Ok for trunk?
> gcc/ChangeLog:
>
> PR target/102464
> * match.pd: Simplify (_Float16) sqrtf((float) a) to .SQRT(a)
> when direct_inter
On Mon, Oct 25, 2021 at 1:59 PM liuhongt wrote:
>
> Canoicalize & and nop_convert order for
> __atomic_fetch_or_*, __atomic_fetch_xor_*,
> __atomic_xor_fetch_*,__sync_fetch_and_or_*,
> __sync_fetch_and_xor_*,__sync_xor_and_fetch_*,
> __atomic_fetch_and_*,__sync_fetch_and_and_* when mask is constan
On Mon, Oct 25, 2021 at 10:01 PM Rainer Orth
wrote:
>
> gcc.target/i386/avx512f-pr96891-3.c currently FAILs on 32-bit Solaris/x86:
>
> FAIL: gcc.target/i386/avx512f-pr96891-3.c scan-assembler-times
> (?n)vpcmp[bwdq][ t]*\$7 4
>
> There are only 3 instances of the expected pattern because
On Tue, Oct 26, 2021 at 5:51 PM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> For _Float16 type, add insn and expanders to optimize x / y to
> x * rcp (y), and x / sqrt (y) to x * rsqrt (y).
> As Half float only have minor precision difference between div and
> mul * rcp, there is no need for New
On Mon, Oct 25, 2021 at 4:24 PM liuhongt wrote:
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
>
I'm going to check in this patch if there's no objection.
> gcc/ChangeLog:
>
> PR target/102464
> * config/i386/i386-builtin-types.def (V8HF_FTYPE_V8H
On Fri, Jul 2, 2021 at 4:19 PM Richard Biener
wrote:
>
> On Fri, Jul 2, 2021 at 10:07 AM Uros Bizjak via Gcc-patches
> wrote:
> >
> > On Fri, Jul 2, 2021 at 8:25 AM Hongtao Liu wrote:
> >
> > > > > AVX512FP16 is disclosed, refer to [1].
> > &
On Fri, Jul 2, 2021 at 7:48 PM Bernhard Reutner-Fischer via
Gcc-patches wrote:
>
> On 2 July 2021 09:36:54 CEST, Richard Biener via Gcc-patches
> wrote:
> >On Thu, Jul 1, 2021 at 11:26 PM Joseph Myers
> >wrote:
> >>
> >> On Thu, 1 Jul 2021, liuhongt via Gcc-patches wrote:
> >>
> >> > +/* Optimi
On Fri, Jul 2, 2021 at 4:03 PM Uros Bizjak wrote:
>
> On Fri, Jul 2, 2021 at 8:25 AM Hongtao Liu wrote:
>
> > > > AVX512FP16 is disclosed, refer to [1].
> > > > There're 100+ instructions for AVX512FP16, 67 gcc patches, for the
> > > > conv
Hi:
pushed to master.
Remove xfail for pr92658-avx512vl.c
Typo of standard pattern name has been fixed by r12-1970, remove those
xfails.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr92658-avx512vl.c: Refine testcase.
diff --git a/gcc/testsuite/gcc.target/i386/pr92
On Tue, Jul 6, 2021 at 7:31 AM Segher Boessenkool
wrote:
>
> Hi!
>
> I ran into this in shrink-wrap.c today.
>
> On Thu, Jun 03, 2021 at 02:54:07PM +0800, liuhongt via Gcc-patches wrote:
> > Use "used" flag for CALL_INSN to indicate it's a fake call. If it's a
> > fake call, it won't have its own
On Tue, Jul 6, 2021 at 8:03 AM Jeff Law via Gcc-patches
wrote:
>
>
>
> On 7/5/2021 5:30 PM, Segher Boessenkool wrote:
> > Hi!
> >
> > I ran into this in shrink-wrap.c today.
> >
> > On Thu, Jun 03, 2021 at 02:54:07PM +0800, liuhongt via Gcc-patches wrote:
> >> Use "used" flag for CALL_INSN to indi
On Mon, Jul 5, 2021 at 10:09 PM Richard Biener wrote:
>
> This adds named expanders for vec_fmaddsub4 and
> vec_fmsubadd4 which map to x86 vfmaddsubXXXp{ds} and
> vfmsubaddXXXp{ds} instructions. This complements the previous
> addition of ADDSUB support.
>
> x86 lacks SUBADD and the negate varian
On Tue, Jul 6, 2021 at 3:42 PM Richard Biener wrote:
>
> On Tue, 6 Jul 2021, Hongtao Liu wrote:
>
> > On Mon, Jul 5, 2021 at 10:09 PM Richard Biener wrote:
> > >
> > > This adds named expanders for vec_fmaddsub4 and
> > > vec_fmsubadd4 which map to x86
On Thu, Jul 1, 2021 at 9:04 PM Jakub Jelinek via Gcc-patches
wrote:
>
> On Thu, Jul 01, 2021 at 02:58:01PM +0200, Richard Biener wrote:
> > > The main issue is complex _Float16 functions in libgcc. If _Float16
> > > doesn't
> > > require -mavx512fp16, we need to compile complex _Float16 function
On Fri, Jul 2, 2021 at 4:46 AM Joseph Myers wrote:
>
> Some general comments, following what I said on libc-alpha:
>
>
> 1. Can you confirm that the ABI being used for 64-bit, for _Float16 and
> _Complex _Float16 argument passing and return, follows the current x86_64
> ABI document?
>
>
> 2. Can
On Wed, Jul 7, 2021 at 2:11 AM Joseph Myers wrote:
>
> On Tue, 6 Jul 2021, Hongtao Liu via Gcc-patches wrote:
>
> > There may be inconsistent behavior between soft-fp and avx512fp16
> > instructions if we emulate _Float16 w/ float .
> > i.e
> > 1) for a + b - c
On Tue, Jul 6, 2021 at 9:37 AM Hongtao Liu wrote:
>
> On Tue, Jul 6, 2021 at 7:31 AM Segher Boessenkool
> wrote:
> >
> > Hi!
> >
> > I ran into this in shrink-wrap.c today.
> >
> > On Thu, Jun 03, 2021 at 02:54:07PM +0800, liuhongt via Gcc-patches
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