On Thu, Aug 10, 2023 at 4:07 PM Hongtao Liu wrote:
>
> On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote:
> >
> > On Thu, Aug 10, 2023 at 3:49 PM Richard Biener via Gcc-patches
> > wrote:
> > >
> > > On Thu, Aug 10, 2023 at 9:42 AM Uros Bizjak wrote:
On Thu, Aug 10, 2023 at 7:13 PM Richard Biener
wrote:
>
> On Thu, Aug 10, 2023 at 11:16 AM Hongtao Liu wrote:
> >
> > On Thu, Aug 10, 2023 at 4:07 PM Hongtao Liu wrote:
> > >
> > > On Thu, Aug 10, 2023 at 3:55 PM Hongtao Liu wrote:
> > > >
> &
On Fri, Aug 11, 2023 at 2:02 PM liuhongt via Gcc-patches
wrote:
>
> Rename original use_gather to use_gather_8parts, Support
> -mtune-ctrl={,^}use_gather to set/clear tune features
> use_gather_{2parts, 4parts, 8parts}. Support the new option -mgather
> as alias of -mtune-ctrl=, use_gather, ^use_g
cc
On Mon, Aug 14, 2023 at 10:46 AM liuhongt wrote:
>
> vmovapd can enable register renaming and have same code size as
> vmovsd. Similar for vmovsh vs vmovaps, vmovaps is 1 byte less than
> vmovsh.
>
> When TARGET_AVX512VL is not available, still generate
> vmovsd/vmovss/vmovsh to avoid vmovapd/
On Tue, Aug 8, 2023 at 3:16 PM Haochen Jiang via Gcc-patches
wrote:
>
> gcc/ChangeLog:
>
> * common/config/i386/cpuinfo.h (get_available_features):
> Add avx10_set and version and detect avx10.1.
> (cpu_indicator_init): Handle avx10.1-512.
> * common/config/i386/i38
On Tue, Aug 8, 2023 at 3:15 PM Haochen Jiang via Gcc-patches
wrote:
>
> gcc/ChangeLog:
>
> * config/i386/driver-i386.cc (host_detect_local_cpu):
> Do not append -mno-avx10.1 for -march=native.
> * config/i386/i386-options.cc
> (ix86_check_avx10): New function to che
On Tue, Aug 8, 2023 at 3:13 PM Haochen Jiang via Gcc-patches
wrote:
>
> gcc/ChangeLog:
>
> * config/i386/driver-i386.cc (host_detect_local_cpu):
> Do not append -mno-avx10-max-512bit for -march=native.
> * common/config/i386/i386-common.cc
> (ix86_check_avx10_vector
On Tue, Aug 8, 2023 at 3:23 PM Haochen Jiang via Gcc-patches
wrote:
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/avx10_1-vextractf64x2-1.c: New test.
> * gcc.target/i386/avx10_1-vextracti64x2-1.c: Ditto.
> * gcc.target/i386/avx10_1-vfpclasspd-1.c: Ditto.
> * g
On Fri, Aug 11, 2023 at 8:38 AM liuhongt wrote:
>
> For more details of GDS (Gather Data Sampling), refer to
> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/gather-data-sampling.html
>
> After microcode update, there's performance
On Mon, Aug 14, 2023 at 10:40 AM Hongtao Liu wrote:
>
> On Fri, Aug 11, 2023 at 2:02 PM liuhongt via Gcc-patches
> wrote:
> >
> > Rename original use_gather to use_gather_8parts, Support
> > -mtune-ctrl={,^}use_gather to set/clear tune features
> > use_gather_
On Fri, Aug 18, 2023 at 2:01 PM Haochen Jiang via Gcc-patches
wrote:
>
> Hi all,
>
> This patch aims to fix PR111051, which actually make sure that AVX2
> intrins are visible to AVX512/AVX10 intrins under any circumstances.
>
> I will also apply the same fix on AVX512DQ scalar intrins.
>
> Regtest
On Sun, Aug 20, 2023 at 6:44 AM ZiNgA BuRgA via Gcc-patches
wrote:
>
> Hi,
>
> With the proposed design of these switches, how would I restrict AVX10.1
> to particular AVX-512 subsets?
We can't, avx10.1 is taken as an indivisible ISA which contains all
AVX512 related instructions.
> We’ve been ta
On Mon, Aug 21, 2023 at 4:09 PM Jakub Jelinek wrote:
>
> On Mon, Aug 21, 2023 at 09:36:16AM +0200, Richard Biener via Gcc-patches
> wrote:
> > > On Sun, Aug 20, 2023 at 6:44 AM ZiNgA BuRgA via Gcc-patches
> > > wrote:
> > > >
> > > > Hi,
> > > >
> > > > With the proposed design of these switches
On Mon, Aug 21, 2023 at 4:38 PM Jakub Jelinek wrote:
>
> On Mon, Aug 21, 2023 at 04:28:20PM +0800, Hongtao Liu wrote:
> > We have an undocumented option mavx10-max-512bit.
>
> How it is called internally is one thing, but it is weird to use
> avx10 in an option name whi
On Mon, Aug 21, 2023 at 5:35 PM Richard Biener
wrote:
>
> On Mon, Aug 21, 2023 at 10:28 AM Hongtao Liu wrote:
> >
> > On Mon, Aug 21, 2023 at 4:09 PM Jakub Jelinek wrote:
> > >
> > > On Mon, Aug 21, 2023 at 09:36:16AM +0200, Richard Biener via Gcc-patches
&
On Mon, Aug 21, 2023 at 8:25 PM Richard Biener via Gcc-patches
wrote:
>
> The following fixes the gcc.target/i386/pr87007-5.c testcase which
> changed code generation again after the recent sinking improvements.
> We now have
>
> vxorps %xmm0, %xmm0, %xmm0
> vsqrtsd d2(%rip), %xmm
On Mon, Aug 21, 2023 at 8:40 PM Hongtao Liu wrote:
>
> On Mon, Aug 21, 2023 at 8:25 PM Richard Biener via Gcc-patches
> wrote:
> >
> > The following fixes the gcc.target/i386/pr87007-5.c testcase which
> > changed code generation again after the recent sinking im
On Mon, Aug 21, 2023 at 8:59 PM Richard Biener wrote:
>
> On Mon, 21 Aug 2023, Hongtao Liu wrote:
>
> > On Mon, Aug 21, 2023 at 8:25?PM Richard Biener via Gcc-patches
> > wrote:
> > >
> > > The following fixes the gcc.target/i386/pr87007-5.c testcase wh
On Mon, Jul 17, 2023 at 5:18 PM Richard Biener via Gcc-patches
wrote:
>
> On Fri, 14 Jul 2023, Jan Hubicka wrote:
>
> > Hi,
> > loop-ch currently does analysis using ranger for all loops to identify
> > candidates and then follows by phase where headers are duplicated (which
> > breaks SSA and ran
On Mon, Jun 19, 2023 at 3:09 PM Jan Beulich via Gcc-patches
wrote:
>
> On 19.06.2023 04:07, Liu, Hongtao wrote:
> >> -Original Message-
> >> From: Jan Beulich
> >> Sent: Friday, June 16, 2023 2:22 PM
> >>
> >> --- a/gcc/config/i386/sse.md
> >> +++ b/gcc/config/i386/sse.md
> >> @@ -12597,1
On Mon, Jun 19, 2023 at 8:35 PM Richard Biener via Gcc-patches
wrote:
>
> The following works around the lack of the x86 backend making the
> vectorizer compare the costs of the different possible vector
> sizes the backed advertises through the vector_modes hook. When
> enabling masked epilogues
On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
wrote:
>
> There's no reason to constrain this to AVX512VL, unless instructed so by
> -mprefer-vector-width=, as the wider operation is unusable for more
> narrow operands only when the possible memory source is a non-broadcast
> one. Thi
On Tue, Jun 20, 2023 at 4:41 PM Richard Biener
wrote:
>
> On Fri, Jun 2, 2023 at 3:01 AM liuhongt via Gcc-patches
> wrote:
> >
> > We have already use intermidate type in case WIDEN, but not for NONE,
> > this patch extended that.
> >
> > I didn't do that in pattern recog since we need to know wh
On Tue, Jun 20, 2023 at 5:03 PM Jan Beulich wrote:
>
> On 20.06.2023 10:33, Hongtao Liu wrote:
> > On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> I guess the underlying pattern, going along the lines of what
> >> one
On Wed, Jun 21, 2023 at 2:06 PM Jan Beulich via Gcc-patches
wrote:
>
> ... in vec_dupv4sf / *vec_dupv4si. The respective broadcast insns are
> never longer (yet sometimes shorter) than the corresponding VSHUFPS /
> VPSHUFD, due to the immediate operand of the shuffle insns balancing the
> possible
On Sun, Jun 25, 2023 at 9:17 AM Liu, Hongtao wrote:
>
>
>
> > -Original Message-
> > From: Jan Beulich
> > Sent: Wednesday, June 21, 2023 8:40 PM
> > To: Hongtao Liu
> > Cc: gcc-patches@gcc.gnu.org; Kirill Yukhin ; Liu,
> > Hongtao
> &
On Wed, Jun 21, 2023 at 2:26 PM Jan Beulich via Gcc-patches
wrote:
>
> All combinations of and, ior, xor, and not involving two operands can be
> expressed that way in a single insn.
>
> gcc/
>
> PR target/93768
> * config/i386/i386.cc (ix86_rtx_costs): Further special-case
>
On Wed, Jun 21, 2023 at 2:27 PM Jan Beulich via Gcc-patches
wrote:
>
> When it's the memory operand which is to be inverted, using VPANDN*
> requires a further load instruction. The same can be achieved by a
> single VPTERNLOG*. Add two new alternatives (for plain memory and
> embedded broadcast),
On Wed, Jun 21, 2023 at 2:28 PM Jan Beulich via Gcc-patches
wrote:
>
> The intended broadcast (with AVX512) can very well be done right from
> memory.
Ok.
>
> gcc/
>
> * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
> form of splitter for PR target/100711.
>
> --- a/gc
On Wed, Jun 21, 2023 at 2:28 PM Jan Beulich via Gcc-patches
wrote:
>
> With respective two-operand bitwise operations now expressable by a
> single VPTERNLOG, add splitters to also deal with ior and xor
> counterparts of the original and-only case. Note that the splitters need
> to be separate, as
On Wed, Jun 21, 2023 at 2:29 PM Jan Beulich via Gcc-patches
wrote:
>
> Following two-operand bitwise operations, add another splitter to also
> deal with not followed by broadcast all on its own, which can be
> expressed as simple embedded broadcast instead once a broadcast operand
> is actually p
On Sun, Jun 25, 2023 at 2:16 PM Jan Beulich wrote:
>
> On 25.06.2023 07:06, Hongtao Liu wrote:
> > On Wed, Jun 21, 2023 at 2:28 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> With respective two-operand bitwise operations now expressable by a
> >
On Sun, Jun 25, 2023 at 2:25 PM Jan Beulich wrote:
>
> On 25.06.2023 07:12, Hongtao Liu wrote:
> > On Wed, Jun 21, 2023 at 2:29 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> ---
> >> For the purpose here (and elsewhere) bcst_vector_oper
On Sun, Jun 25, 2023 at 2:35 PM Hongtao Liu wrote:
>
> On Sun, Jun 25, 2023 at 2:25 PM Jan Beulich wrote:
> >
> > On 25.06.2023 07:12, Hongtao Liu wrote:
> > > On Wed, Jun 21, 2023 at 2:29 PM Jan Beulich via Gcc-patches
> > > wrote:
> > >>
>
On Sun, Jun 25, 2023 at 1:52 PM Jan Beulich wrote:
>
> On 25.06.2023 06:42, Hongtao Liu wrote:
> > On Wed, Jun 21, 2023 at 2:26 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> +(define_code_iterator andor [and ior])
> >> +(de
On Sun, Jun 25, 2023 at 3:13 PM Hongtao Liu wrote:
>
> On Sun, Jun 25, 2023 at 1:52 PM Jan Beulich wrote:
> >
> > On 25.06.2023 06:42, Hongtao Liu wrote:
> > > On Wed, Jun 21, 2023 at 2:26 PM Jan Beulich via Gcc-patches
> > > wrote:
> > >&
On Sun, Jun 25, 2023 at 3:23 PM Hongtao Liu wrote:
>
> On Sun, Jun 25, 2023 at 3:13 PM Hongtao Liu wrote:
> >
> > On Sun, Jun 25, 2023 at 1:52 PM Jan Beulich wrote:
> > >
> > > On 25.06.2023 06:42, Hongtao Liu wrote:
> > > > On Wed, Jun
On Sun, Jun 25, 2023 at 9:35 PM Jan Beulich wrote:
>
> On 25.06.2023 09:30, Hongtao Liu wrote:
> > On Sun, Jun 25, 2023 at 3:23 PM Hongtao Liu wrote:
> >>
> >> On Sun, Jun 25, 2023 at 3:13 PM Hongtao Liu wrote:
> >>>
> >>> On Sun, Jun 25
On Mon, Jun 26, 2023 at 9:31 AM liuhongt via Gcc-patches
wrote:
>
> The new assembly looks better than original one, so I adjust those testcases.
> Ok for trunk?
>
> gcc/testsuite/ChangeLog:
>
> PR tree-optimization/110371
> PR tree-optimization/110018
> * gcc.target/aarch6
On Wed, Jun 21, 2023 at 3:49 PM Richard Biener via Gcc-patches
wrote:
>
> The following addresses a miscompilation by RTL scheduling related
> to the representation of masked stores. For that we have
>
> (insn 38 35 39 3 (set (mem:V16SI (plus:DI (reg:DI 40 r12 [orig:90 _22 ] [90])
>
On Tue, Jun 20, 2023 at 5:34 PM Hongtao Liu wrote:
>
> On Tue, Jun 20, 2023 at 5:03 PM Jan Beulich wrote:
> >
> > On 20.06.2023 10:33, Hongtao Liu wrote:
> > > On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
> > > wrote:
> > >>
> &
On Mon, Jun 26, 2023 at 4:54 PM liuhongt wrote:
>
> __bfloat16 is redefined from typedef short to real __bf16 since GCC
> V13. The patch issues an warning for potential silent implicit
> conversion between __bf16 and short where users may only expect a
> data movement.
>
> To avoid too many false
On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
>
> On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> > PR target/82735
> > * config/i386/i386.cc (ix86_avx_u127_mode_n
On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
>
> On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> >
> > pass_insert_vzeroupper is under condition
> >
> > TARGET_AVX && TARGET_VZEROUPPER
> > && flag_expensive_optimizations && !optimize_size
> >
> > But the document of mvzeroupper doesn't me
On Tue, Jun 27, 2023 at 3:20 PM Richard Biener via Gcc-patches
wrote:
>
> On Tue, Jun 27, 2023 at 7:38 AM liuhongt wrote:
> >
> > At the rtl level, we cannot guarantee that the maskstore is not optimized
> > to other full-memory accesses, as the current implementations are equivalent
> > in terms
On Tue, Jun 27, 2023 at 3:28 PM Hongtao Liu wrote:
>
> On Tue, Jun 27, 2023 at 3:20 PM Richard Biener via Gcc-patches
> wrote:
> >
> > On Tue, Jun 27, 2023 at 7:38 AM liuhongt wrote:
> > >
> > > At the rtl level, we cannot guarantee that the maskstore is n
On Wed, Jun 28, 2023 at 3:32 AM Roger Sayle wrote:
>
>
> Doh! Wrong patch...
> Roger
> --
>
> From: Roger Sayle
> Sent: 27 June 2023 20:28
> To: 'gcc-patches@gcc.gnu.org'
> Cc: 'Uros Bizjak' ; 'Hongtao Liu'
> Subject: [x86 PATCH] T
On Thu, Jun 29, 2023 at 10:51 AM Hu, Lin1 via Gcc-patches
wrote:
>
> Hi, all
>
> This patch aims to refactor macros in case some other thing is added to
> AMX_TILE_SET in future. OK for trunk?
Ok, thanks.
>
> BRs,
> Lin
>
> gcc/ChangeLog:
>
> * common/config/i386/i386-common.cc (OPTION_MAS
On Tue, Jul 4, 2023 at 4:15 PM Cui, Lili wrote:
>
> From: Lili Cui
>
> Hi Maintainer,
>
> This patch is to enable ENQCMD and UINTR for march=sierraforest according to
> Intel ISE.
>
> Bootstrapped and regtested. Ok for trunk? And I will backport this patch to
> GCC13.
Ok.
>
> Thanks,
> Lili.
>
On Wed, Jul 5, 2023 at 2:25 AM simonaytes.yan--- via Gcc-patches
wrote:
>
> PR target/110438 requests to emit PXOR before VPTERNLOG. This patch
> implements that.
I prefer using UNSPEC_INSN_FALSE_DEP like we did for lzcnt/tzcnt/popcnt.
i.e.
18866; False dependency happens when destination is onl
On Wed, Jul 5, 2023 at 4:00 PM Jan Beulich via Gcc-patches
wrote:
>
> The middle alternative each was unusable without enabling AVX512DQ (in
> addition to AVX512VL), which is entirely unrelated here. The last
> alternative is usable with AVX512VL only (due to type restrictions on
> what may be put
On Wed, Jul 5, 2023 at 4:01 PM Jan Beulich via Gcc-patches
wrote:
>
> V2TImode values cannot appear in the upper 16 YMM registers without
> AVX512VL being enabled. Therefore forcing 512-bit mode (also not
> reflected in the "mode" attribute) is pointless.
Please set isa attribute for alternative 1
On Wed, Jul 5, 2023 at 4:55 PM Jan Beulich wrote:
>
> On 05.07.2023 10:40, Hongtao Liu wrote:
> > On Wed, Jul 5, 2023 at 4:00 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> The middle alternative each was unusable without enabling AVX512DQ (in
> >
On Wed, Jul 5, 2023 at 5:03 PM Jan Beulich wrote:
>
> On 05.07.2023 10:47, Hongtao Liu wrote:
> > On Wed, Jul 5, 2023 at 4:01 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> V2TImode values cannot appear in the upper 16 YMM registers without
> >>
On Wed, Jul 5, 2023 at 6:22 PM Hongtao Liu wrote:
>
> On Wed, Jul 5, 2023 at 5:03 PM Jan Beulich wrote:
> >
> > On 05.07.2023 10:47, Hongtao Liu wrote:
> > > On Wed, Jul 5, 2023 at 4:01 PM Jan Beulich via Gcc-patches
> > > wrote:
> > >>
> >
On Fri, Jul 7, 2023 at 2:02 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Fri, Jul 7, 2023 at 7:31 AM liuhongt wrote:
> >
> > > Please split the above pattern into two, one emitting UNSPEC_IEEE_MAX
> > > and the other emitting UNSPEC_IEEE_MIN.
> > Splitted.
> >
> > > The test involves blendv instr
On Thu, Jul 6, 2023 at 11:46 PM wrote:
>
> > +; False dependency happens on destination register which is not really
> > +; used when moving all ones to vector register
> > +(define_split
> > + [(set (match_operand:VMOVE 0 "register_operand")
> > + (match_operand:VMOVE 1 "int_float_vector_all
On Fri, Jul 7, 2023 at 3:13 PM Jan Beulich via Gcc-regression
wrote:
>
> On 06.07.2023 13:57, haochen.jiang wrote:
> > On Linux/x86_64,
> >
> > 2d11c99dfca3cc603dbbfafb3afc41689a68e40f is the first bad commit
> > commit 2d11c99dfca3cc603dbbfafb3afc41689a68e40f
> > Author: Jan Beulich
> > Date:
On Fri, Jul 7, 2023 at 3:18 PM Jan Beulich via Gcc-regression
wrote:
>
> On 06.07.2023 13:57, haochen.jiang wrote:
> > On Linux/x86_64,
> >
> > e007369c8b67bcabd57c4fed8cff2a6db82e78e6 is the first bad commit
> > commit e007369c8b67bcabd57c4fed8cff2a6db82e78e6
> > Author: Jan Beulich
> > Date:
On Fri, Jul 7, 2023 at 3:34 PM Jan Beulich wrote:
>
> On 07.07.2023 09:30, Hongtao Liu wrote:
> > On Fri, Jul 7, 2023 at 3:13 PM Jan Beulich via Gcc-regression
> > wrote:
> >>
> >> On 06.07.2023 13:57, haoche
On Fri, Jul 7, 2023 at 3:50 PM Jan Beulich wrote:
>
> On 07.07.2023 09:46, Hongtao Liu wrote:
> > On Fri, Jul 7, 2023 at 3:18 PM Jan Beulich via Gcc-regression
> > wrote:
> >>
> >> On 06.07.2023 13:57, haoche
On Fri, Jul 7, 2023 at 3:50 PM Hongtao Liu wrote:
>
> On Fri, Jul 7, 2023 at 3:50 PM Jan Beulich wrote:
> >
> > On 07.07.2023 09:46, Hongtao Liu wrote:
> > > On Fri, Jul 7, 2023 at 3:18 PM Jan Beulich via Gcc-regression
> > > wrote:
> > >>
On Tue, Jul 11, 2023 at 12:24 AM Alexander Monakov via Gcc-patches
wrote:
>
>
> On Mon, 10 Jul 2023, liuhongt via Gcc-patches wrote:
>
> > False dependency happens when destination is only updated by
> > pternlog. There is no false dependency when destination is also used
> > in source. So either
Please ignore this patch, I'm testing another patch to separate non
swap operands case where a setcc is not needed in the peephole2.
On Tue, Jul 11, 2023 at 11:14 AM liuhongt via Gcc-patches
wrote:
>
> Similar like we did for cmpxchg, but extended to all
> ix86_comparison_int_operator since cmpcc
On Tue, Jul 11, 2023 at 11:40 AM Haochen Jiang via Gcc-patches
wrote:
>
> Hi all,
>
> Currently on trunk, both usage of intrin and builtin for 128 bit VAES
> ISA will result in ICE since we did not check AVX512VL until pattern,
> which is not user expected. This patch aims to fix that ICE and thro
On Fri, Mar 10, 2023 at 3:37 AM Tamar Christina via Gcc-patches
wrote:
>
> Hi All,
>
> The testcase
>
> typedef unsigned int vec __attribute__((vector_size(32)));
> vec
> f3 (vec a, vec b, vec c)
> {
> vec d = a * b;
> return d + ((c + d) >> 1);
> }
>
> shows a case where we don't want to form
On Tue, Mar 14, 2023 at 4:52 PM Hu, Lin1 via Gcc-patches
wrote:
>
> It has regtested on x86_64-pc-linux-gnu. OK for trunk?
I think uros has approved your patch.
>
> Thanks.
> Lin
>
> -Original Message-
> From: Uros Bizjak
> Sent: Tuesday, March 14, 2023 3:05 PM
> To: Hu, Lin1
> Cc: gcc-p
On Thu, May 4, 2023 at 5:49 PM Richard Biener
wrote:
>
> On Thu, May 4, 2023 at 7:37 AM Hongtao Liu via Gcc-patches
> wrote:
> >
> > On Thu, May 4, 2023 at 1:35 PM Hongtao Liu wrote:
> > >
> > > On Thu, Dec 22, 2022 at 4:04 PM Uros Bizjak wrote:
> >
On Wed, May 10, 2023 at 5:10 PM liuhongt wrote:
>
> > The quoted patch shows -shared in context and you didn't post a
> > backport version
> > to look at. But yes, we shouldn't change -shared behavior on a
> > branch, even less so make it
> > inconsistent between targets.
> Here's the patch.
>
>
On Fri, May 12, 2023 at 1:50 PM Andrew Pinski wrote:
>
> On Thu, May 11, 2023 at 10:45 PM liuhongt via Gcc-patches
> wrote:
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> > PR target/89701
> > * common.opt: Refactor
On Fri, May 12, 2023 at 1:43 PM Hongtao Liu wrote:
>
> On Wed, May 10, 2023 at 5:10 PM liuhongt wrote:
> >
> > > The quoted patch shows -shared in context and you didn't post a
> > > backport version
> > > to look at. But yes, we shouldn't cha
ping.
On Fri, Apr 21, 2023 at 9:55 PM liuhongt wrote:
>
> > > + if (!TARGET_SSE2)
> > > +{
> > > + if (c_dialect_cxx ()
> > > + && cxx_dialect > cxx20)
> >
> > Formatting, both conditions are short, so just put them on one line.
> Changed.
>
> > But for the C++23 macros, more impo
ping
On Fri, Apr 21, 2023 at 9:55 PM liuhongt wrote:
>
> > But for the C++23 macros, more importantly I think we really should
> > also in ix86_target_macros_internal add
> > if (c_dialect_cxx ()
> > && cxx_dialect > cxx20
> > && (isa_flag & OPTION_MASK_ISA_SSE2))
> > {
> >
ping.
On Sat, May 13, 2023 at 5:20 PM liuhongt wrote:
>
> > I think this could be simplified if you use either EnumSet or
> > EnumBitSet instead in common.opt for `-fcf-protection=`.
>
> Use EnumSet instead of EnumBitSet since CF_FULL is not power of 2.
> It is a bit tricky for sets classificatio
On Mon, May 22, 2023 at 3:35 PM liuhongt wrote:
>
> Also for 64-bit vector abs intrinsics _mm_abs_{pi8,pi16,pi32}.
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
Ready push to main trunk.
>
> gcc/ChangeLog:
>
> PR target/109900
> * config/i386/i386.cc
On Wed, May 24, 2023 at 1:24 PM Alexandre Oliva via Gcc-patches
wrote:
>
>
> The expected results for signbit-2 only arise on x86 with avx512f
> disabled and sse2 enabled. The patch already disables avx512f
> explicitly, but it fails to enable sse2.
>
> Bootstrapped on x86_64-linux-gnu. Also tes
On Thu, May 25, 2023 at 10:55 AM Hu, Lin1 via Gcc-patches
wrote:
>
> Hi all,
>
> This patch aims to fix incorrect intrinsic signature for
> _mm{512|256|}_s{lli|rai|rli}_epi*. And it has been tested on
> x86_64-pc-linux-gnu. OK for trunk?
>
> BRs,
> Lin
>
> gcc/ChangeLog:
>
> PR target/10
On Thu, Jan 14, 2021 at 7:16 PM Hongtao Liu wrote:
>
> ping.
>
> On Thu, Jan 7, 2021 at 1:22 PM Hongtao Liu wrote:
> >
> > On Wed, Jan 6, 2021 at 10:39 PM Jakub Jelinek wrote:
> > >
> > > On Wed, Jan 06, 2021 at 02:49:13PM +0800, Hongtao L
Hi：
As desribed in PR, also remove the relevant and useless expanders
and builtins, the user can
directly use == and >, without calling the builtin function.
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
gcc/ChangeLog:
PR target/98833
* config/i386/i386-builtin.def (B
On Wed, Jan 27, 2021 at 5:03 PM Jakub Jelinek wrote:
>
> On Wed, Jan 27, 2021 at 03:22:45PM +0800, Hongtao Liu wrote:
> > Hi：
> > As desribed in PR, also remove the relevant and useless expanders
> > and builtins, the user can
> > directly use == and >, wit
On Wed, Jan 27, 2021 at 6:38 PM Hongtao Liu wrote:
>
> On Wed, Jan 27, 2021 at 5:03 PM Jakub Jelinek wrote:
> >
> > On Wed, Jan 27, 2021 at 03:22:45PM +0800, Hongtao Liu wrote:
> > > Hi：
> > > As desribed in PR, also remove the relevant and useless expand
Hi:
GCC11 will be the system GCC 2 years from now, and for the
processors then, they shouldn't even need to split a 256-bit vector
into 2 128-bits vectors.
.i.e. Test SPEC2017 with the below 2 options on Zen3/ICL show
option B is better than Option A.
Option A:
-march=x86-64 -mtune=generic -m
On Thu, Jan 28, 2021 at 9:18 PM H.J. Lu wrote:
>
> On Thu, Jan 28, 2021 at 1:21 AM Richard Biener via Gcc-patches
> wrote:
> >
> > On Thu, Jan 28, 2021 at 7:32 AM Hongtao Liu via Gcc-patches
> > wrote:
> > >
> > > Hi:
> > >GCC1
Rebase and update patch:
Fix ICE: Don't generate integer mask comparison for 128/256-bits
vector when op_true/op_false are NULL or constm1_rtx/const0_rtx
[PR98537]
in ix86_expand_sse_cmp/ix86_expand_int_sse_cmp
gcc/ChangeLog:
PR target/98537
* config/i386/i38
On Thu, Feb 4, 2021 at 4:52 PM Richard Biener
wrote:
>
> On Thu, Feb 4, 2021 at 7:45 AM Uros Bizjak wrote:
> >
> > On Thu, Feb 4, 2021 at 5:28 AM Hongtao Liu wrote:
> >
> > > > > >GCC11 will be the system GCC 2 years from now, and for the
> &
On Thu, Feb 4, 2021 at 8:00 PM Jakub Jelinek wrote:
>
> On Thu, Feb 04, 2021 at 01:31:52PM +0800, Hongtao Liu via Gcc-patches wrote:
> * gcc.target/i386/avx512vl-pr92686-vpcmp-1.c: This test is
> used to guard code generation of integer mask comparison, but
>
On Fri, Jul 30, 2021 at 4:58 AM Joseph Myers wrote:
>
> On Tue, 27 Jul 2021, Hongtao Liu via Gcc-patches wrote:
>
> > modified gcc/emit-rtl.c
> > @@ -928,6 +928,10 @@ validate_subreg (machine_mode omode, machine_mode
> > imode,
> > fix them all.
On Fri, Jul 30, 2021 at 5:30 AM Joseph Myers wrote:
>
> On Thu, 29 Jul 2021, Hongtao Liu via Gcc-patches wrote:
>
> > > Rather than using FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16 whenever TARGET_SSE2
> > > (i.e. whenever the type is available), it might make more sense to f
On Mon, Aug 2, 2021 at 6:20 PM Richard Biener via Gcc-patches
wrote:
>
> On Mon, Aug 2, 2021 at 6:33 AM liuhongt wrote:
> >
> > Hi:
> > This patch supports cond_add/sub/mul/div expanders for vector
> > float/double.
> > There're still cond_fma/fms/fnms/fma/max/min/xor/ior/and left which I
>
On Tue, Aug 3, 2021 at 1:48 AM H.J. Lu via Gcc-patches
wrote:
>
> In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> if possible.
>
> gcc/
>
> * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> try XMM31 to avoid vzeroupper.
LGTM.
>
> gcc/tests
On Tue, Aug 3, 2021 at 3:34 AM Joseph Myers wrote:
>
> On Mon, 2 Aug 2021, liuhongt via Gcc-patches wrote:
>
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index 7979e240426..dc673c89bc8 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -23352,6
On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu wrote:
> >
> > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> > if possible.
> >
> > gcc/
> >
> > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-b
On Tue, Aug 3, 2021 at 6:20 PM Richard Biener
wrote:
>
> On Tue, Aug 3, 2021 at 11:20 AM Richard Biener
> wrote:
> >
> > On Wed, Jul 28, 2021 at 4:51 AM Hongtao Liu via Gcc-patches
> > wrote:
> > >
> > > On Tue, Jul 27, 2021 at 9:54 AM Hongtao Liu w
On Mon, Aug 2, 2021 at 2:44 PM liuhongt wrote:
>
> From: "Guo, Xuepeng"
>
> gcc/ChangeLog:
>
> * common/config/i386/cpuinfo.h (get_available_features):
> Detect FEATURE_AVX512FP16.
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_AVX512FP16_SET,
> OP
On Mon, Aug 2, 2021 at 2:31 PM liuhongt wrote:
>
> gcc/ChangeLog:
>
> * config/i386/i386-modes.def (FLOAT_MODE): Define ieee HFmode.
> * config/i386/i386.c (enum x86_64_reg_class): Add
> X86_64_SSEHF_CLASS.
> (merge_classes): Handle X86_64_SSEHF_CLASS.
> (ex
On Wed, Aug 4, 2021 at 8:39 PM liuhongt wrote:
>
> Hi:
> Together with the previous 3 patches, all cond_op expanders of vector
> modes are supported (if they have a corresponding avx512 mask instruction).
Oh, after double check, I realize there're still shift instructions
left, will support in a
On Wed, Aug 4, 2021 at 7:28 PM Richard Biener
wrote:
>
> On Wed, Aug 4, 2021 at 4:39 AM Hongtao Liu wrote:
> >
> > On Mon, Aug 2, 2021 at 2:31 PM liuhongt wrote:
> > >
> > > gcc/ChangeLog:
> > >
> > > * config/i386/i386-modes.def (F
On Thu, Aug 5, 2021 at 3:31 PM Hongtao Liu wrote:
>
> On Wed, Aug 4, 2021 at 7:28 PM Richard Biener
> wrote:
> >
> > On Wed, Aug 4, 2021 at 4:39 AM Hongtao Liu wrote:
> > >
> > > On Mon, Aug 2, 2021 at 2:31 PM liuhongt wrote:
> > > >
> >
On Thu, Aug 5, 2021 at 5:24 PM Richard Biener
wrote:
>
> On Thu, Aug 5, 2021 at 9:25 AM Hongtao Liu wrote:
> >
> > On Wed, Aug 4, 2021 at 7:28 PM Richard Biener
> > wrote:
> > >
> > > On Wed, Aug 4, 2021 at 4:39 AM Hongtao Liu wrote:
> > >
On Fri, Aug 6, 2021 at 11:44 AM Andrew Pinski via Gcc-patches
wrote:
>
> On Thu, Aug 5, 2021 at 8:33 PM liuhongt via Gcc-patches
> wrote:
> >
> > Hi:
> > ---
> > OK, I think sth is amiss here upthread. insv/extv do look like they
> > are designed
> > to work on integer modes (but docs do not say
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