On Thu, Dec 12, 2013 at 1:55 PM, bin.cheng wrote:
>
>
>> -Original Message-
>> From: Richard Biener [mailto:richard.guent...@gmail.com]
>> Sent: Wednesday, December 11, 2013 6:04 PM
>> To: Jakub Jelinek
>> Cc: Bin.Cheng; Jeff Law; Bin Cheng; gcc-patches
On Sat, Jan 11, 2014 at 2:42 PM, Bin.Cheng wrote:
> On Wed, Dec 11, 2013 at 4:18 AM, Jeff Law wrote:
>> On 12/10/13 00:01, bin.cheng wrote:
>>>
>>> Emm, some kind of. See the cost of iv candidate set consists of several
>>> parts, the representation cost in c
On Sat, Jan 11, 2014 at 5:07 PM, Jakub Jelinek wrote:
> On Sat, Jan 11, 2014 at 05:02:26PM +0800, Bin.Cheng wrote:
>> > I reduced the case and attached ivopt dumps with/without the patch.
>> > It seems the patch is doing right thing and choosing better
>> > candida
On Mon, Jan 13, 2014 at 2:29 PM, Jeff Law wrote:
> On 01/11/14 02:21, Bin.Cheng wrote:
>>
>> On Sat, Jan 11, 2014 at 5:07 PM, Jakub Jelinek wrote:
>>>
>>> On Sat, Jan 11, 2014 at 05:02:26PM +0800, Bin.Cheng wrote:
>>>>>
>>>>> I r
Ping^2
On Thu, Jul 9, 2015 at 5:42 PM, Bin.Cheng wrote:
> Ping.
>
> On Fri, Jun 26, 2015 at 4:47 PM, Bin Cheng wrote:
>> Hi,
>> The canonical form of subtract of immediate is (add op0 minus_imm), which is
>> supported with addsi3_aarch64 pattern on aarch64. Unf
On Thu, Jul 23, 2015 at 10:06 PM, Richard Biener
wrote:
> On Fri, Jul 17, 2015 at 8:27 AM, Bin Cheng wrote:
>> Hi,
>> This patch is to fix PR66388. It's an old issue but recently became worse
>> after my scev overflow change. IVOPT now can only compute iv use with
>> candidate which has at leas
On Fri, Jul 24, 2015 at 7:23 PM, Richard Biener
wrote:
> On Fri, Jul 24, 2015 at 1:09 PM, Bin.Cheng wrote:
>> On Thu, Jul 23, 2015 at 10:06 PM, Richard Biener
>> wrote:
>>> On Fri, Jul 17, 2015 at 8:27 AM, Bin Cheng wrote:
>>>> Hi,
>>>> This
On Mon, Jul 27, 2015 at 11:41 AM, Michael Collison
wrote:
> This patch is designed to optimize end of loop conditions involving of the
> form
> i < x && i < y into i < min (x, y). Loop condition involving '>' are
> handled similarly using max(x,y).
> As an example:
>
> #define N 1024
>
> int a[N
On Mon, Jul 27, 2015 at 12:23 PM, Bin.Cheng wrote:
> On Mon, Jul 27, 2015 at 11:41 AM, Michael Collison
> wrote:
>> This patch is designed to optimize end of loop conditions involving of the
>> form
>> i < x && i < y into i < min (x, y). Loop conditi
On Sat, Sep 26, 2015 at 12:51 PM, Ajit Kumar Agarwal
wrote:
> I have made the following changes in the estimate_reg_pressure_cost function
> used
> by the loop invariant and IVOPTS.
>
> Earlier the estimate_reg_pressure cost uses the cost of n_new variables that
> are generated by the Loop Invar
On Sun, Sep 27, 2015 at 11:13 PM, Ajit Kumar Agarwal
wrote:
>
>
> -Original Message-
> From: Segher Boessenkool [mailto:seg...@kernel.crashing.org]
> Sent: Sunday, September 27, 2015 7:49 PM
> To: Ajit Kumar Agarwal
> Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida
On Tue, Sep 29, 2015 at 2:25 AM, Aaron Sawdey
wrote:
> On Sat, 2015-09-26 at 04:51 +, Ajit Kumar Agarwal wrote:
>> I have made the following changes in the estimate_reg_pressure_cost function
>> used
>> by the loop invariant and IVOPTS.
>>
>> Earlier the estimate_reg_pressure cost uses the co
On Tue, Sep 29, 2015 at 1:21 AM, Jeff Law wrote:
> On 09/28/2015 05:28 AM, Bernd Schmidt wrote:
>>
>> On 09/28/2015 11:43 AM, Bin Cheng wrote:
>>>
>>> Bootstrap and test on x86_64 and x86_32. Will test it on aarch64. So
>>> any
>>> comments?
>>>
>>> Thanks,
>>> bin
>>>
>>> 2015-09-28 Bin Cheng
On Thu, Oct 8, 2015 at 12:32 PM, Ajit Kumar Agarwal
wrote:
> Following Proposed:
>
> Changes are done in the Loop Invariant(LICM) at RTL level and also the
> Induction variable optimization based on SSA representation.
> The current logic used in LICM for register used inside the loops is changed
On Thu, Oct 8, 2015 at 12:59 PM, Richard Henderson wrote:
> This is the patch that richi includes in the PR. There will need to
> be an additional patch to solve an ICE for the AVR backend, as noted
> in the PR, but this is good enough to solve the bad-code generation
> problem for the i386 backe
On Thu, Oct 8, 2015 at 5:55 PM, Bernd Schmidt wrote:
> On 10/08/2015 07:17 AM, Bin.Cheng wrote:
>>
>> On Thu, Oct 8, 2015 at 12:59 PM, Richard Henderson wrote:
>>>
>>> This is the patch that richi includes in the PR. There will need to
>>> be an ad
On Thu, Oct 8, 2015 at 1:53 PM, Ajit Kumar Agarwal
wrote:
>
>
> -Original Message-
> From: Bin.Cheng [mailto:amker.ch...@gmail.com]
> Sent: Thursday, October 08, 2015 10:29 AM
> To: Ajit Kumar Agarwal
> Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli H
On Wed, Sep 30, 2015 at 11:33 AM, Bin.Cheng wrote:
> On Tue, Sep 29, 2015 at 1:21 AM, Jeff Law wrote:
>> On 09/28/2015 05:28 AM, Bernd Schmidt wrote:
>>>
>>> On 09/28/2015 11:43 AM, Bin Cheng wrote:
>>>>
>>>> Bootstrap and test on x86_64
On Wed, Sep 30, 2015 at 12:00 AM, Pat Haugen
wrote:
> On 09/25/2015 11:51 PM, Ajit Kumar Agarwal wrote:
>>
>> I have made the following changes in the estimate_reg_pressure_cost
>> function used
>> by the loop invariant and IVOPTS.
>>
>> Earlier the estimate_reg_pressure cost uses the cost of n_ne
On Fri, Oct 9, 2015 at 8:04 PM, Bernd Schmidt wrote:
> On 10/09/2015 02:00 PM, Bin.Cheng wrote:
>>
>> I further bootstrap and test attached patch on aarch64. Also three
>> cases in spec2k6/fp are improved by 3~6%, two cases in spec2k6/fp are
>> regressed by ~2%. O
On Wed, Oct 21, 2015 at 5:15 PM, Richard Biener
wrote:
> On Wed, Oct 21, 2015 at 6:46 AM, Bin Cheng wrote:
>> Hi,
>> As analyzed in PR67921, I think the issue is caused by fold_binary_loc which
>> folds:
>> 4 - (sizetype) &c - (sizetype) ((int *) p1_8(D) + ((sizetype) a_23 * 24 +
>> 4))
>> into
On Wed, Oct 21, 2015 at 11:55 AM, Bin.Cheng wrote:
> On Fri, Oct 9, 2015 at 8:04 PM, Bernd Schmidt wrote:
>> On 10/09/2015 02:00 PM, Bin.Cheng wrote:
>>>
>>> I further bootstrap and test attached patch on aarch64. Also three
>>> cases in spec2k6/fp are impro
On Fri, Nov 6, 2015 at 9:24 PM, Richard Biener
wrote:
> On Wed, Nov 4, 2015 at 11:18 AM, Bin Cheng wrote:
>> Hi,
>> PR52272 reported a performance regression in spec2006/410.bwaves once GCC is
>> prevented from representing address of one memory object using address of
>> another memory object.
On Mon, Nov 9, 2015 at 11:24 PM, Bernd Schmidt wrote:
> On 11/08/2015 10:11 AM, Richard Biener wrote:
>>
>> On November 8, 2015 3:58:57 AM GMT+01:00, "Bin.Cheng"
>> wrote:
>>>>
>>>> +inline bool
>>&
On Tue, Nov 10, 2015 at 9:26 AM, Bin.Cheng wrote:
> On Mon, Nov 9, 2015 at 11:24 PM, Bernd Schmidt wrote:
>> On 11/08/2015 10:11 AM, Richard Biener wrote:
>>>
>>> On November 8, 2015 3:58:57 AM GMT+01:00, "Bin.Cheng"
>>> wrote:
>>>>>
On Tue, Nov 10, 2015 at 6:06 PM, Bernd Schmidt wrote:
> On 11/10/2015 09:25 AM, Bin.Cheng wrote:
>>>
>>> Thanks for reviewing. I haven't committed it yet, could you please
>>> point out which quoted piece is so that I can update patch?
>
>
On Fri, Nov 13, 2015 at 2:13 PM, Jeff Law wrote:
> On 10/07/2015 10:32 PM, Ajit Kumar Agarwal wrote:
>
>>
>> 0001-RFC-Patch-Optimized-changes-in-the-register-used-ins.patch
>>
>>
>> From f164fd80953f3cffd96a492c8424c83290cd43cc Mon Sep 17 00:00:00 2001
>> From: Ajit Kumar Agarwal
>> Date: Wed, 7
On Tue, Nov 17, 2015 at 1:56 AM, Ajit Kumar Agarwal
wrote:
>
> Sorry I missed out some of the points in earlier mail which is given below.
>
> -Original Message-
> From: Ajit Kumar Agarwal
> Sent: Monday, November 16, 2015 11:07 PM
> To: 'Jeff Law'; GCC Patches
> Cc: Vinod Kathail; Shail A
On Tue, Nov 17, 2015 at 6:08 PM, James Greenhalgh
wrote:
> On Tue, Nov 17, 2015 at 05:21:01PM +0800, Bin Cheng wrote:
>> Hi,
>> GIMPLE IVO needs to call backend interface to calculate costs for addr
>> expressions like below:
>>FORM1: "r73 + r74 + 16380"
>>FORM2: "r73 << 2 + r74 + 16380"
>
On Thu, Nov 19, 2015 at 10:32 AM, Bin.Cheng wrote:
> On Tue, Nov 17, 2015 at 6:08 PM, James Greenhalgh
> wrote:
>> On Tue, Nov 17, 2015 at 05:21:01PM +0800, Bin Cheng wrote:
>>> Hi,
>>> GIMPLE IVO needs to call backend interface to calculate costs for a
On Wed, Nov 18, 2015 at 11:50 PM, Bernd Schmidt wrote:
> On 11/10/2015 11:19 AM, Bin.Cheng wrote:
>>
>> On Tue, Nov 10, 2015 at 6:06 PM, Bernd Schmidt
>> wrote:
>>>
>>>
>>> Multi-line expressions should be wrapped in parentheses so that
>>
On Sat, Nov 21, 2015 at 1:39 AM, Richard Earnshaw
wrote:
> On 20/11/15 08:31, Bin.Cheng wrote:
>> On Thu, Nov 19, 2015 at 10:32 AM, Bin.Cheng wrote:
>>> On Tue, Nov 17, 2015 at 6:08 PM, James Greenhalgh
>>> wrote:
>>>> On Tue, Nov 17, 2015 at 05:2
On Tue, Nov 24, 2015 at 5:56 PM, Richard Earnshaw
wrote:
> On 24/11/15 02:51, Bin.Cheng wrote:
>>>> The aarch64's problem is we don't define addptr3 pattern, and we don't
>>>> >> have direct insn pattern describing the "x + y << z"
On Fri, Nov 27, 2015 at 5:08 AM, Martin Liška wrote:
> Hi.
>
> There's one more patch that fixes really of lot memory leaks related to loop
> ivopts.
> The regression was introduced by r230647.
>
> Patch was tested in the series with the rest and the compiler bootstraps
> successfully.
>
> Ready f
On Fri, Nov 27, 2015 at 4:29 PM, Martin Liška wrote:
> On 11/27/2015 04:54 AM, Bin.Cheng wrote:
>> On Fri, Nov 27, 2015 at 5:08 AM, Martin Liška wrote:
>>> Hi.
>>>
>>> There's one more patch that fixes really of lot memory leaks related to loop
>>
On Fri, Nov 27, 2015 at 8:51 PM, Richard Biener
wrote:
> On Fri, Nov 27, 2015 at 12:44 PM, Bin Cheng wrote:
>> Hi,
>> This patch is to fix PR68529. In my previous scev/niter overflow patches, I
>> only computed no-overflow information for control iv in simple loops with
>> LT_EXPR as exit condit
On Tue, Nov 24, 2015 at 6:18 PM, Richard Earnshaw
wrote:
> On 24/11/15 09:56, Richard Earnshaw wrote:
>> On 24/11/15 02:51, Bin.Cheng wrote:
>>>>> The aarch64's problem is we don't define addptr3 pattern, and we don't
>>>>>>> have di
On Sat, Nov 28, 2015 at 3:40 AM, Jakub Jelinek wrote:
> Hi!
>
> The recent changes where vector sqrt is represented in the IL using
> IFN_SQRT instead of target specific builtins broke the discovery
> of vector rsqrt, as targetm.builtin_reciprocal is called only
> on builtin functions (not interna
On Tue, Dec 1, 2015 at 6:25 PM, Richard Earnshaw
wrote:
> On 01/12/15 03:19, Bin.Cheng wrote:
>> On Tue, Nov 24, 2015 at 6:18 PM, Richard Earnshaw
>> wrote:
>>> On 24/11/15 09:56, Richard Earnshaw wrote:
>>>> On 24/11/15 02:51, Bin.Cheng wrote:
>>>
On Thu, Dec 3, 2015 at 6:26 PM, Richard Earnshaw
wrote:
> On 03/12/15 05:26, Bin.Cheng wrote:
>> On Tue, Dec 1, 2015 at 6:25 PM, Richard Earnshaw
>> wrote:
>>> On 01/12/15 03:19, Bin.Cheng wrote:
>>>> On Tue, Nov 24, 2015 at 6:18 PM, Richard Earnshaw
>>&
Hi,
This is a simple fix for PR93674. It adds cand carefully for enumeral type
iv_use in
case of -fstrict-enums, it also avoids computing, replacing iv_use with the
candidate
so that no IV of enumeral type is introduced with -fstrict-enums option.
Testcase is also added. Bootstrap and test on
Forwarding to public list.
-- Forwarded message -
From: Bin.Cheng
Date: Mon, Mar 9, 2020 at 5:07 PM
Subject: Re: [PATCH PR93674]Avoid introducing IV of enumeral type in
case of -fstrict-enums
To: Richard Biener
On Tue, Mar 3, 2020 at 5:36 PM Richard Biener
wrote:
>
>
On Thu, Mar 5, 2020 at 10:18 PM Iain Sandoe wrote:
>
> Hello JunMa,
>
> JunMa wrote:
>
> > Ping
>
> Once again, sorry for taking time to review this.
>
> > 在 2020/2/27 上午10:18, JunMa 写道:
> >> 在 2020/2/11 上午10:14, JunMa 写道:
> >> Kindly ping
> >>
> >> Regards
> >> JunMa
> >>> Hi
> >>> In maybe_prom
On Sat, Oct 19, 2019 at 2:27 PM Jakub Jelinek wrote:
>
> Hi!
>
> As mentioned in the PR, the following patch attempts to address two issues.
> In remove_unused_ivs we first find the best iv_cand (we prefer primarily the
> same step, next same mode and lastly constant base) and only then call
> get
On Tue, Aug 21, 2018 at 9:59 PM Richard Sandiford
wrote:
>
> David Edelsohn writes:
> > I am pleased to announce that the GCC Steering Committee has
> > appointed Richard Sandiford as a Global Reviewer.
> >
> > Please join me in congratulating Richard on his new role.
> > Richard, ple
On Thu, Aug 30, 2018 at 2:47 AM Richard Sandiford
wrote:
>
> Joey Ye writes:
> > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> > index 07c55b1..9e965ab 100644
> > --- a/gcc/config/aarch64/aarch64.c
> > +++ b/gcc/config/aarch64/aarch64.c
> > @@ -5674,9 +5674,6 @@ aarch
On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote:
> On 06/02/2017 05:52 AM, Bin Cheng wrote:
>> Hi,
>> This patch enables -ftree-loop-distribution by default at -O3 and above
>> optimization levels.
>> Bootstrap and test at O2/O3 on x86_64 and AArch64. is it OK?
>>
>> Note I don't have strong opin
On Wed, Jun 7, 2017 at 9:33 AM, Richard Biener
wrote:
> On Wed, Jun 7, 2017 at 10:07 AM, Bin.Cheng wrote:
>> On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote:
>>> On 06/02/2017 05:52 AM, Bin Cheng wrote:
>>>> Hi,
>>>> This patch enables -ftree-loo
On Wed, Jun 7, 2017 at 11:03 AM, Richard Biener
wrote:
> On Fri, Jun 2, 2017 at 1:51 PM, Bin Cheng wrote:
>> Hi,
>> This is the main patch of the change. It improves loop distribution by
>> versioning loop under
>> runtime alias check conditions, as well as better partition fusion. As
>> desc
On Wed, May 17, 2017 at 1:24 PM, Richard Biener
wrote:
> On Mon, May 15, 2017 at 5:50 PM, Bin.Cheng wrote:
>> On Thu, May 11, 2017 at 11:39 AM, Richard Biener
>> wrote:
>>> On Tue, Apr 18, 2017 at 12:53 PM, Bin Cheng wrote:
>>>> Hi,
>>>> Cu
On Wed, May 17, 2017 at 1:27 PM, Richard Biener
wrote:
> On Mon, May 15, 2017 at 5:56 PM, Bin.Cheng wrote:
>> On Thu, May 11, 2017 at 11:54 AM, Richard Biener
>> wrote:
>>> On Tue, Apr 18, 2017 at 12:53 PM, Bin Cheng wrote:
>>>> Hi,
>>>> Simplifi
On Thu, May 11, 2017 at 12:06 PM, Richard Biener
wrote:
> On Tue, Apr 18, 2017 at 12:54 PM, Bin Cheng wrote:
>> Hi,
>> When loop versioning is required in vectorization, we can merge niter check
>> for vect
>> peeling with the check for loop versioning, thus save one check/branch for
>> vectori
On Wed, May 24, 2017 at 2:48 PM, Richard Biener
wrote:
> On Mon, May 22, 2017 at 7:13 PM, Bin.Cheng wrote:
>> On Fri, May 19, 2017 at 1:51 PM, Richard Biener
>> wrote:
>>> On Mon, May 15, 2017 at 5:58 PM, Bin.Cheng wrote:
>>>> On Thu, May 11, 2017 at
On Thu, Jun 8, 2017 at 3:48 AM, kugan wrote:
> Hi Bin,
>
>> +
>> +/* In reduced dependence graph RDG for loop distribution, return true if
>> + dependence between references DR1 and DR2 may create dependence cycle
>> + and such dependence cycle can't be resolved by runtime alias check.
>> */
>
On Sat, Jun 10, 2017 at 10:40 AM, Richard Sandiford
wrote:
> Sorry to return this old patch, but:
>
> Bin Cheng writes:
>> -/* Calculate the number of iterations under which scalar loop will be
>> - preferred than vectorized loop. NITERS_PROLOG is the number of
>> - iterations of prolog loop
On Sat, Jun 10, 2017 at 11:06 AM, Richard Sandiford
wrote:
> Another one sorry, but:
>
> Bin Cheng writes:
>> diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
>> index af874e7..98caa5e 100644
>> --- a/gcc/tree-vect-loop.c
>> +++ b/gcc/tree-vect-loop.c
>> @@ -2214,6 +2214,36 @@ start_over:
On Mon, Jun 12, 2017 at 9:19 AM, Richard Sandiford
wrote:
> "Bin.Cheng" writes:
>> On Sat, Jun 10, 2017 at 10:40 AM, Richard Sandiford
>> wrote:
>>> Sorry to return this old patch, but:
>>>
>>> Bin Cheng writes:
>>>> -/* Ca
On Tue, Jun 13, 2017 at 11:47 AM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>> Hi,
>> This simple patch marks distributed loops and skips it in following
>> distribution.
>>
>> Bootstrap and test on x86_64 and AArch64. Is it OK?
>
> This is not necessary, FOR_EAC
On Tue, Jun 13, 2017 at 12:06 PM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>> Hi,
>> This simple patch computes and preserves loop nest vector for whole
>> distribution
>> life time. The loop nest will be used multiple times in on-demand data
>> dependence
>> c
On Tue, Jun 13, 2017 at 12:23 PM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On Tue, 13 Jun 2017, Richard Sandiford wrote:
>>> Richard Biener writes:
>>> > So I've come back to PR66313 and found a solution to the tailrecursion
>>> > missed optimization when fixing the factoring folding
On Tue, Jun 13, 2017 at 12:48 PM, Richard Biener wrote:
> On Tue, 13 Jun 2017, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > On Tue, 13 Jun 2017, Richard Sandiford wrote:
>> >> Richard Biener writes:
>> >> > So I've come back to PR66313 and found a solution to the tailrecursion
>> >>
On Tue, Jun 13, 2017 at 11:59 AM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>> Hi,
>> During the work I ran into a latent bug for distributing. For the moment we
>> sort statements
>> in dominance order, but that's not enough because basic blocks may be sorted
>
On Wed, Jun 14, 2017 at 10:15 AM, Richard Biener
wrote:
> On Wed, Jun 14, 2017 at 9:53 AM, Bin.Cheng wrote:
>> On Tue, Jun 13, 2017 at 11:59 AM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>>>> Hi,
>>>> During t
On Wed, Jun 14, 2017 at 2:54 PM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> Current primitive cost model merges partitions with data references sharing
>> the same
>> base address. I believe it's designed to maximize data reuse in
>> distribution, but
>
On Fri, Jun 16, 2017 at 11:49 AM, Richard Biener
wrote:
> On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng wrote:
>> Hi,
>> Loop split forces intermediate computation to gimple operands all the time
>> when
>> computing bound information. This is not good since folding opportunities
>> are
>> missed
On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener
wrote:
> On Fri, Jun 16, 2017 at 3:06 PM, Bin.Cheng wrote:
>> On Fri, Jun 16, 2017 at 11:49 AM, Richard Biener
>> wrote:
>>> On Wed, Jun 14, 2017 at 3:07 PM, Bin Cheng wrote:
>>>> Hi,
>>>> Loop
On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener
wrote:
> On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng"
> wrote:
>>On Fri, Jun 16, 2017 at 2:10 PM, Richard Biener
>> wrote:
>>> On Fri, Jun 16, 2017 at 3:06 PM, Bin.Cheng
>>wrote:
>>&g
On Fri, Jun 16, 2017 at 5:48 PM, Marc Glisse wrote:
> On Fri, 16 Jun 2017, Bin.Cheng wrote:
>
>> On Fri, Jun 16, 2017 at 5:16 PM, Richard Biener
>> wrote:
>>>
>>> On June 16, 2017 3:31:32 PM GMT+02:00, "Bin.Cheng"
>>> wrote:
>>>&g
On Fri, Jun 16, 2017 at 11:21 AM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> For now, loop distribution handles variables used outside of loop as
>> reduction.
>> This is inaccurate because all partitions contain statement defining
>> induction
>> vars.
On Tue, Jun 13, 2017 at 12:08 PM, Richard Biener
wrote:
> On Tue, Jun 13, 2017 at 1:06 PM, Richard Biener
> wrote:
>> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>>> Hi,
>>> This simple patch computes and preserves loop nest vector for whole
>>> distribution
>>> life time. The loop nest
On Tue, Jun 13, 2017 at 12:14 PM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>> Hi,
>> This patch collects and preserves all data references in loop for whole
>> distribution life time. It will be used afterwards.
>>
>> Bootstrap and test on x86_64 and AArch64. Is
On Wed, Jun 14, 2017 at 2:47 PM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> This patch refactors struct partition for later distribution. It records
>> bitmap of data references in struct partition rather than vertices' data in
>> partition dependence gra
On Wed, Jun 14, 2017 at 2:54 PM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> Current primitive cost model merges partitions with data references sharing
>> the same
>> base address. I believe it's designed to maximize data reuse in
>> distribution, but
>
On Mon, Jun 19, 2017 at 4:16 PM, Richard Biener
wrote:
> On Mon, Jun 19, 2017 at 3:34 PM, Bin.Cheng wrote:
>> On Tue, Jun 13, 2017 at 12:14 PM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:02 PM, Bin Cheng wrote:
>>>> Hi,
>>>> This pat
On Fri, Jun 16, 2017 at 11:03 AM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> This patch computes and caches data dependence relation in a hash table
>> so that it can be queried multiple times later for partition dependence
>> check.
>> Bootstrap and test
On Fri, Jun 16, 2017 at 11:10 AM, Richard Biener
wrote:
> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>> Hi,
>> This patch checks and records if partition can be executed in parallel by
>> looking if there exists data dependence cycles. The information is needed
>> for distribution because
On Fri, Jun 16, 2017 at 6:15 PM, Bin.Cheng wrote:
> On Fri, Jun 16, 2017 at 11:21 AM, Richard Biener
> wrote:
>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>>> Hi,
>>> For now, loop distribution handles variables used outside of loop as
>>> reduct
On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote:
> Hi,
> This is the main patch rewriting loop distribution in order to handle hmmer.
> It improves loop distribution by versioning loop under runtime alias check
> conditions.
> As described in comments, the patch basically implements distribution
On Fri, Jun 23, 2017 at 6:04 AM, Jeff Law wrote:
> On 06/07/2017 02:07 AM, Bin.Cheng wrote:
>> On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote:
>>> On 06/02/2017 05:52 AM, Bin Cheng wrote:
>>>> Hi,
>>>> This patch enables -ftree-loop-distribution by d
On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote:
> Hi,
> I was asked by upstream to split the loop distribution patch into small ones.
> It is hard because data structure and algorithm are closely coupled together.
> Anyway, this is the patch series with smaller patches. Basically I tried to
> s
On Mon, Jun 19, 2017 at 4:20 PM, Richard Biener
wrote:
> On Mon, Jun 19, 2017 at 3:40 PM, Bin.Cheng wrote:
>> On Wed, Jun 14, 2017 at 2:54 PM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>>>> Hi,
>>>> Current
On Tue, Jun 20, 2017 at 12:32 PM, Richard Biener
wrote:
> On Tue, Jun 20, 2017 at 11:15 AM, Bin.Cheng wrote:
>> On Fri, Jun 16, 2017 at 11:03 AM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>>>> Hi,
>>>> This pa
On Tue, Jun 20, 2017 at 12:34 PM, Richard Biener
wrote:
> On Tue, Jun 20, 2017 at 11:18 AM, Bin.Cheng wrote:
>> On Fri, Jun 16, 2017 at 11:10 AM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>>>> Hi,
>>>> T
And the patch.
On Fri, Jun 23, 2017 at 11:24 AM, Bin.Cheng wrote:
> On Tue, Jun 20, 2017 at 12:34 PM, Richard Biener
> wrote:
>> On Tue, Jun 20, 2017 at 11:18 AM, Bin.Cheng wrote:
>>> On Fri, Jun 16, 2017 at 11:10 AM, Richard Biener
>>> wrote:
>>>>
On Tue, Jun 20, 2017 at 12:36 PM, Richard Biener
wrote:
> On Tue, Jun 20, 2017 at 11:20 AM, Bin.Cheng wrote:
>> On Fri, Jun 16, 2017 at 6:15 PM, Bin.Cheng wrote:
>>> On Fri, Jun 16, 2017 at 11:21 AM, Richard Biener
>>> wrote:
>>>> On Mon, Jun 12, 2017
On Mon, Jun 19, 2017 at 4:18 PM, Richard Biener
wrote:
> On Mon, Jun 19, 2017 at 3:37 PM, Bin.Cheng wrote:
>> On Wed, Jun 14, 2017 at 2:47 PM, Richard Biener
>> wrote:
>>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng wrote:
>>>> Hi,
>>>>
On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote:
> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote:
>> Hi,
>> This is the main patch rewriting loop distribution in order to handle hmmer.
>> It improves loop distribution by versioning loop under runtime alias check
On Fri, Jun 23, 2017 at 11:48 AM, Richard Biener
wrote:
> On Fri, Jun 23, 2017 at 12:19 PM, Bin.Cheng wrote:
>> On Mon, Jun 19, 2017 at 4:20 PM, Richard Biener
>> wrote:
>>> On Mon, Jun 19, 2017 at 3:40 PM, Bin.Cheng wrote:
>>>> On Wed, Jun 14, 2017 at
On Fri, May 12, 2017 at 12:28 PM, Bin Cheng wrote:
> Hi,
> This patch caches initialization statements and only inserts it for valid
> chains.
> Looks like current code even inserts such stmts for invalid chains which will
> be
> deleted as dead code afterwards.
>
> Bootstrap and test on x86_64
On Tue, Jun 27, 2017 at 1:44 PM, Richard Biener
wrote:
> On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote:
>> On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote:
>>> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote:
>>>> Hi,
>> Rebased V3 for changes in pre
On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener
wrote:
> On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng wrote:
>> On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote:
>>> Hi,
>>> I was asked by upstream to split the loop distribution patch into small
>>> ones.
&
On Tue, Jun 27, 2017 at 3:59 PM, Richard Biener
wrote:
> On June 27, 2017 4:27:17 PM GMT+02:00, "Bin.Cheng"
> wrote:
>>On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener
>> wrote:
>>> On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng
>>wrote:
>>>&
On Tue, Jun 27, 2017 at 6:40 PM, Jeff Law wrote:
> On 05/12/2017 05:28 AM, Bin Cheng wrote:
>> Hi,
>> This patch computes register pressure information on TREE SSA by a backward
>> live
>> range data flow problem. The major motivation is to estimate register
>> pressure
>> for inner-most loop o
On Wed, Jun 28, 2017 at 11:58 AM, Richard Biener
wrote:
> On Tue, Jun 27, 2017 at 4:07 PM, Bin.Cheng wrote:
>> On Tue, Jun 27, 2017 at 1:44 PM, Richard Biener
>> wrote:
>>> On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote:
>>>> On Tue, Jun 20, 2017 at 10:2
On Wed, Jun 28, 2017 at 1:29 PM, Richard Biener
wrote:
> On Wed, Jun 28, 2017 at 1:46 PM, Bin.Cheng wrote:
>> On Wed, Jun 28, 2017 at 11:58 AM, Richard Biener
>> wrote:
>>> On Tue, Jun 27, 2017 at 4:07 PM, Bin.Cheng wrote:
>>>> On Tue, Jun 27, 2017 at
On Wed, Jun 28, 2017 at 2:36 PM, Richard Sandiford
wrote:
> Index: gcc/tree-data-ref.c
> ===
> --- gcc/tree-data-ref.c 2017-06-28 14:33:41.294720044 +0100
> +++ gcc/tree-data-ref.c 2017-06-28 14:35:30.475155670 +0100
> @@ -749,15 +749
On Wed, Jun 28, 2017 at 3:04 PM, Richard Sandiford
wrote:
> "Bin.Cheng" writes:
>> On Wed, Jun 28, 2017 at 2:36 PM, Richard Sandiford
>> wrote:
>>> Index: gcc/tree-data-ref.c
>>> ===
&
On Wed, Jun 28, 2017 at 5:56 PM, Richard Sandiford
wrote:
> "Bin.Cheng" writes:
>> On Wed, Jun 28, 2017 at 3:04 PM, Richard Sandiford
>> wrote:
>>> "Bin.Cheng" writes:
>>>> On Wed, Jun 28, 2017 at 2:36 PM, Richard
On Wed, Jun 28, 2017 at 8:06 PM, Richard Sandiford
wrote:
> "Bin.Cheng" writes:
>> On Wed, Jun 28, 2017 at 5:56 PM, Richard Sandiford
>> wrote:
>>> "Bin.Cheng" writes:
>>>> Question is what would happen if simple_iv succeeds with non-ZERO
On Wed, Jun 28, 2017 at 8:29 AM, Richard Biener
wrote:
> On Tue, Jun 27, 2017 at 6:46 PM, Bin.Cheng wrote:
>> On Tue, Jun 27, 2017 at 3:59 PM, Richard Biener
>> wrote:
>>> On June 27, 2017 4:27:17 PM GMT+02:00, "Bin.Cheng"
>>> wrote:
>>
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