[PATCH GCC]Improve how we handle overflow for type conversion in scev/ivopts, part I

xes the mentioned long standing issues. Bootstrap and test on x86_64, x86 and aarch64. BTW, test gcc.target/i386/pr49781-1.c failed on x86_64, but I can confirmed it's not this patch's fault. So what's your opinion on this?. Thanks, bin 2015-05-20 Bin Cheng PR tree-

[PATCH GCC]Improve how we handle overflow in scev by using overflow information computed for control iv in loop niter, part II

in patch can be handled now. Cases reported in PR48052 can be vectorized too. Opinions? Thanks, bin 2015-05-26 Bin Cheng * cfgloop.h (struct control_iv): New. (struct loop): New field control_ivs. * tree-ssa-loop-niter.c : Include "stor-layout.h".

[PATCH GCC]Improve how we handle overflow in scev by using overflow information computed for control iv in loop niter, part II

in patch can be handled now. Also cases reported in PR48052 now can be vectorized too. Opinions? Thanks, bin 2015-05-26 Bin Cheng * cfgloop.h (struct control_iv): New. (struct loop): New field control_ivs. * tree-ssa-loop-niter.c : Include

[PATCH testsuite]Refine scanning string in pr65447.c to support small address offset target

x27;s an obvious change, and test acts as expected. So is it OK? I will commit it in next 24 hours if there is no objection. Thanks, bin 2015-06-02 Bin Cheng PR tree-optimization/65447 * gcc.dg/tree-ssa/pr65447.c: Increase searching number. Index: gcc/testsuite/gcc.dg/tre

[PATCH PR65767]Fix test case failure on arm-none-eabi

Hi, As comments at PR65767 and PR65718, we should use namespace other than std to avoid duplicated definition problem on arm-none-eabi. This patch fixes the issue. It is an obvious change, but I will wait for approval because of GCC5 branch. Is it OK? gcc/testsuite/ChangeLog 2015-04-20 Bin

[PATCH ARM]Fix pr42172-1.c failure on pre armv7 processors

code on armv7 processors too. PR42172 is kept open for that purpose. This is obvious change, is it OK for branches too? gcc/testsuite/ChangeLog 2015-04-22 Bin Cheng * gcc.target/arm/pr42172-1.c: Check str instead of ldr. diff --git a/gcc/testsuite/gcc.target/arm/pr42172-1.c b/gcc

[PATCH PR65447]Improve IV handling by grouping address type uses with same base and step

t on x86_64 and AArch64, so is it ok? 2015-05-08 Bin Cheng PR tree-optimization/65447 * tree-ssa-loop-ivopts.c (struct iv_use): New fields. (dump_use, dump_uses): Support to dump sub use. (record_use): New parameters to support sub use. R

[PATCH AARCH64]load store pair optimization using sched_fusion pass.

(O3 level, not statically linked in my build) by 1.68%. Bootstrap and test on aarch64. Is it OK? 2014-11-18 Bin Cheng * config/aarch64/aarch64.md (load_pair): Split to load_pairsi, load_pairdi, load_pairsf and load_pairdf. (load_pairsi, load_pairdi, load_pairsf

[PATCH DOC]Fix wrong documentation for TARGET_SCHED_FUSION_PRIORITY

Hi, This is an obvious patch fixing wrong documentation for TARGET_SCHED_FUSION_PRIORITY. Html file generated as expected now. Will commit it in 24h if no objection. 2014-12-02 Bin Cheng * target.def (fusion_priority): Wrap code with @smallexample. * doc/tm.texi: Regenerated

[PATCH ARM]Print CPU tuning information as comment in assembler file.

e should improve that and output more useful information in the long run. Another patch is followed adding DEJAGNU test function and adapting test strings. Build and test on arm-none-eabi, is it OK? 2015-03-06 Bin Cheng * config/arm/arm.opt (print_tune_info): New option.

[PATCH ARM]Fix memset-inline-* failures on cortex-a9 tune by checking tune information.

? gcc/testsuite/ChangeLog 2015-03-06 Bin Cheng * lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New. * gcc.target/arm/memset-inline-4.c: Skip for arm_tune_string_ops_prefer_neon. * gcc.target/arm/memset-inline-5.c: Ditto. * gcc.target/arm/memset

[PATCH PR65647]Fix as obvious, Fix case failure by adding option "-mfloat-abi=soft"

Hi, I applied attached patch to both trunk and 4_9 branch as obviously discussed in PR65647. Thanks, bin gcc/testsuite/ChangeLog 2015-04-07 Bin Cheng * gcc.target/arm/pr65647.c: Add option "-mfloat-abi=soft". diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc

[PATCH PR66449]Fix ICE by using POINTER_PLUS_EXPR for pointers.

Hi, This patch fixes ICE in PR66449 by using POINTER_PLUS_EXPR for pointers. Bootstrap and test on x86_64. Is it OK trunk? Thanks, bin 2015-06-18 Bin Cheng PR tree-optimization/66449 * tree-ssa-loop-niter.c (loop_exits_before_overflow): Use POINTER_PLUS_EXPR for

RE: [PATCH PR66449]Fix ICE by using POINTER_PLUS_EXPR for pointers.

And the patch... Thanks, bin > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Bin Cheng > Sent: Thursday, June 18, 2015 6:13 PM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH PR66449]Fix ICE by using POI

[PATCH AArch64]Handle wrong cost for addition of minus immediate in aarch64_rtx_costs.

fixes it, is this OK? Thanks, bin 2015-06-25 Bin Cheng * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle addition of minus immediate. Index: gcc/config/aarch64/aarch64.c === --- gcc/config/aarch64/aarc

[PATCH GCC][obvious]Don't reset ssa_name infor in struct iv.

Hi, I applied a patch before to keep ssa_name information in struct iv. Seems this function somehow slipped away. Will apply it to trunk. Thanks, bin 2015-06-26 Bin Cheng * tree-ssa-loop-ivopts.c (record_sub_use): Don't reset ssa_name field in struct iv. Index: gcc/tre

[PATCH GCC][refacor]Manage allocation of struct iv in obstack.

Hi, GCC avoids multi-pointers/dangling-pointers of struct iv by allocating multiple copies of the structure. This patch is an obvious fix to the issue by managing iv structures in obstack. Bootstrap on x86_64, will apply to trunk if no objection. Thanks, bin 2015-06-26 Bin Cheng

[PATCH PR66638]Fix assertion failure by skip the case.

2015-06-26 Bin Cheng PR bootstrap/66638 * tree-ssa-loop-niter.c (loop_exits_before_overflow): Skip if assertion failed. Remove assertion itself. Index: gcc/tree-ssa-loop-niter.c === --- gcc/tree-ssa-lo

[PATCH PR66702]Skip pr48052 on targets not support vect_int_mult

Hi, The test failed on sparc because sparc doesn't support vect_int_mult. This patch adds the prerequisite condition thus skips test on such platforms. An obvious change, will apply it in 24h. Thanks, bin gcc/testsuite/ChangeLog 2015-07-02 Bin Cheng PR tree-optimization/

[PATCH GCC]Udate best_cost for start cand if it has lower overall cost in iv set narrowing

an obvious fix to it. So is it OK? 2015-07-08 Bin Cheng * tree-ssa-loop-ivopts.c (iv_ca_narrow): Update best_cost if start candidate has lower cost. Index: gcc/tree-ssa-loop-ivopts.c === --- gcc/tree-ssa-loop-ivopt

[PATCH GCC]Improve auto-increment addressing mode support in IVO by refactoring add candiate logic.

rt in IVO for aarch64, I would expect this patch will pave the way for that. So is it OK? Thanks, bin 2015-07-08 Bin Cheng * tree-ssa-loop-ivopts.c (add_candidate): Remove call to add_autoinc_candidates. (add_iv_candidate_for_biv): Rename to add_iv_cand

[PATCH PR43378]Add test case for the issue

Hi, I crossed to PR43378 and found it had already been fixed on trunk long before. I am adding a test case and going to close it after this patch. The case is tested, Is it OK? 2015-02-09 Bin Cheng PR tree-optimization/43378 * gcc.dg/tree-ssa/pr43378.c: New test.

RE: [PATCH PR43378]Add test case for the issue

And the missed patch. Thanks, bin > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Bin Cheng > Sent: Monday, February 09, 2015 2:07 PM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH PR43378]Add test

[PATCH PR64705]Don't aggressively expand induction variable's base

it was because of passes after IVOPT. The IVOPT dump is at least not worse than the original version. Bootstrap and test on x86_64 and AArch64, so is it OK? 2015-02-09 Bin Cheng PR tree-optimization/64705 * tree-ssa-loop-niter.h (expand_simple_operations): New parameter.

RE: [PATCH PR64705]Don't aggressively expand induction variable's base

The second time I missed patch in one day, I hate myself. Here it is. > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Bin Cheng > Sent: Monday, February 09, 2015 6:10 PM > To: gcc-patches@gcc.gnu.org &g

[PATCH GCC][PR62173 partial/1]Preserve ssa name (thus vrp info) for IV structure

-13 Bin Cheng PR tree-optimization/62173 * tree-ssa-loop-ivopts.c (dump_iv): New parameter. (dump_use, dump_cand, find_induction_variables): Pass new argument to dump_iv. (record_use): Preserve the ssa name information in IV.Index: gcc/tree-ssa-loop

[PATCH GCC][PR62173 partial/2]Improve overflow check on SCEV in IVOPTs using vrp info

hi node. It passes bootstrap and regtest on both x86_64 and aarch64. But I would like to hear more comments on the idea itself then do some refinement. So any comments? Thanks, bin 2015-02-13 Bin Cheng PR tree-optimization/62173 * tree-ssa-loop-niter.h (split_to_var_and_offset

[PATCH GCC]Fix checking on MAX_PENDING_LIST_LENGTH

timizer, GCC breaks dcache line alignment randomly, but 33 is definitely worse than 32. Of course, this only happens in very restricted case. Bootstrap and test on x86_64. Is it OK? 2014-11-10 Bin Cheng * sched-deps.c (sched_analyze_1): Check pending list if it is not

[PATCH ARM]Prefer neon for stringops on a53/a57 in AArch32 mode

collect benchmark data, see if there is regression. Is it ok if benchmark results are good? 2014-11-13 Bin Cheng * config/arm/arm.c (arm_cortex_a53_tune, arm_cortex_a57_tune): Prefer neon for stringops on cortex-a53/a57 in AArch32 mode. Index: gcc/config/arm/arm.c

[PATCH GCC]Simplify interface for simplify_using_initial_conditions

by removing parameter STOP, also moves expand_simple_operations from tree_simplify_using_condition_1 to its caller. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2016-08-02 Bin Cheng PR tree-optimization/72772 * tree-ssa-loop-niter.h

[PATCH PR72772]Also check equality for expanded iv base.

Bin Cheng PR tree-optimization/72772 * tree-ssa-loop-niter.c (loop_exits_before_overflow): Check equality for expanded base. gcc/testsuite/ChangeLog 2016-08-02 Bin Cheng PR tree-optimization/pr72772 * gcc.dg/tree-ssa/pr72772.c: New test.diff --git a/gcc

[PATCH testsuite/PR33707]Add test case.

Hi, The case has already been fixed by my unsigned improvement for scev/niter, and it can be vectorized successfully. This patch simply adds a test for it. Test result checked on x86_64. Is it OK? Thanks, bin gcc/testsuite/ChangeLog 2016-08-02 Bin Cheng PR tree-optimization/33707

[PATCH testsuite]Require vect_cond_mixed for test case gcc.dg/vect/pr56541.c

changes the test in that way. Test result checked. Is it OK? Thanks, bin gcc/testsuite/ChangeLog 2016-08-09 Bin Cheng * gcc.dg/vect/pr56541.c: Require vect_cond_mixed.diff --git a/gcc/testsuite/gcc.dg/vect/pr56541.c b/gcc/testsuite/gcc.dg/vect/pr56541.c index 16b8d7c..a7b96ce 100644

[PATCH PR69848]Avoid not insn by inverting comparison code in vcond patterns

dered floating point comparison is not handled because it will complicate the code, also NE is the most common case. The patch further reduces assembly code in PR69848 on the basis of vcond patches. Bootstrap and test on AArch64. Is it OK? Thanks, bin 2016-08-03 Bin Cheng PR tre

[PATCH PR69848]Introduce special conditional reduction CONST_COND_REDUCTION

work out a "clean" patch at the moment. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2016-08-08 Bin Cheng PR tree-optimization/69848 * tree-vectorizer.h (enum vect_def_type): New condition reduction type CONST_COND_REDUCTION.

[PATCH AArch64]Fix spurious warning with explicit initialization

Hi, GCC gives spurious -Wmaybe-uninitialized message which breaks bootstrap. This patch fixes it by explicitly initializing. Also I file PR72355 in order to tracking the wrong warning message. Compilation log checked. Applied as obvious. Thanks, bin 2016-08-11 Bin Cheng * config

[PATCH AArch64]Delete useless var declaration as obvious

Hi, The useless var declaration was introduced when I separating patches, and it breaks bootstrap on AArch64. This patch fixes it as obvious. Bootstrap checked. Will apply as obvious. Thanks, bin 2016-08-11 Bin Cheng * config/aarch64/aarch64-simd.md (vcond): Delete unused

[PATCH PR72817/PR73450]Fix wrong code caused by niter analyzer for NE_EXPR exit cond.

ed to check if |FINAL - new_base| is multiple of |step| for the adjusted base. This patch fixes the issue as well as revises the comment. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2016-08-11 Bin Cheng PR tree-optimization/72817 PR tree-optimization/73450

[PATCH GCC]Refactor doloop by moving cheaper checks earlier.

/test on powerpc64le-unknown-linux-gnu. Is it OK? Thanks, bin 2016-08-12 Bin Cheng PR rtl-optimization/72855 * loop-doloop.c (doloop_insn_valid_p): New function. (doloop_valid_p): Rename to... (doloop_niter_valid_p): ...this. Factor out insn check to function

[PATCH GCC 1/9]Delete useless code in tree-vect-loop-manip.c

as fixing obvious code style issue. Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop-manip.c (slpeel_can_duplicate_loop_p): Fix code style issue. (vect_do_peeling_for_loop_bound, vect_do_peeling_for_alignment): Remove useless code.diff --git a/gcc/tree-vect-loop-

[PATCH GCC 2/9]Add interface reseting original copy tables in cfg.c

Hi, This simple patch adds interface reseting original copy table in cfg.c. This will be used in rewriting vect_do_peeling_* functions in vectorizer so that we don't need to release/allocate tables between prolog and epilog peeling. Thanks, bin 2016-09-01 Bin Cheng *

[PATCH GCC 6/9]Simplify control flow graph for vectorized loop

changes from CFG changes. This >should make the implementation easier to read, and I think it maybe a step >forward to replace slpeel_* functions with generic GIMPLE loop copy interfaces >as Richard suggested. Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop-manip.c (adju

[PATCH GCC 8/9]Adjust test case for CFG changes in vectorized loop

Hi, After CFG changes in vectorizer, the epilog loop now can be completely peeled, resulting in changes in the number of instructions that these tests check. This patch adjusts related checking strings. Thanks, bin gcc/testsuite/ChangeLog 2016-09-01 Bin Cheng * gcc.target/i386

[PATCH GCC 9/9]Prove no-overflow in computation of LOOP_VINFO_NITERS and improve code generation

NFO_NITERS overflows or not, because computation LOOP_VINFO_NITERS - LOOP_VINFO_PEELING_FOR_ALIGNMENT cancels the overflow by underflow. Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop.c (loop_niters_no_overflow): New func. (vect_transform_loop): Call loop_niters_no_overf

[PATCH GCC 3/9]Support rewriting non-lcssa phis for vars live outside of vect-loop

outside loop with the newly computed var. Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop.c (vectorizable_live_operation): Support handling for live variable outside loop but not in lcssa form.diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c index fa06505..45e18af

[PATCH GCC 5/9]Put copied loop after its preheader and after the original loop's latch in basic block link list

good for basic block reordering too? Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): Put duplicated loop after its preheader and after the original loop.diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.

[PATCH GCC 4/9]Check niters for peeling for data access gaps in analyzer

loop is successfully vectorized, it will never be executed, and most likely, it will be removed during cfg-cleanup. Examples can be found in revised tests of this patch. Thanks, bin 2016-09-01 Bin Cheng * tree-vect-loop.c (vect_analyze_loop_2): Check and skip loop if it has no

[PATCH GCC 7/9]Skip loops iterating only 1 time in predictive commoning

Hi, For loops which are bounded to iterate only 1 time (thus loop's latch doesn't roll), there is nothing to predictive common, this patch detects/skips these cases. A test is also added in gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f for this. Thanks, bin 2016-09-01

[PATCH PR68030/PR69710][RFC]Introduce a simple local CSE interface and use it in vectorizer

_cost. Inaccurate cost is computed for "base + offset + INDEX" address expression. When register pressure is low, "base+offset" can be hoisted out and we can use [base + INDEX] addressing mode, whichhis is current behavior. Bootstrap and test on x86_64 and AArch64. Any

[PATCH GCC]Remove duplciated alias check in vectorizer

eded parameter bound "vect-max-version-for-alias-checks" w/o this patch. There are other issues in vectorizer alias checking, I will tackle them in follow up patches. Thanks, bin 2016-06-03 Bin Cheng * tree-vectorizer.h (struct dr_with_seg_len): Remove class me

Re: [PATCH AArch64]Support missing vcond pattern by adding/using vec_cmp/vcond_mask patterns.

> From: James Greenhalgh > Sent: 31 May 2016 16:24 > To: Bin Cheng > Cc: gcc-patches@gcc.gnu.org; nd > Subject: Re: [PATCH AArch64]Support missing vcond pattern by adding/using > vec_cmp/vcond_mask patterns. > > On Tue, May 17, 2016 at 09:02:22AM +, Bin Cheng wro

[PATCH Obvious]Check gimple seq before inserting it.

Hi, This is an obvious change which checks if gimple seq is empty before inserting it. I built spec2k6 and found the gimple seq in most (if not all) cases is empty, we can save a function call here. Build on x86_64. Thanks, bin 2016-05-17 Bin Cheng * tree-vect-loop.c

[PATCH PR71347][Partial revert r235513]Compute cost for all uses in group

patch also includes a new test. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2016-05-31 Bin Cheng PR tree-optimization/71347 * tree-ssa-loop-ivopts.c (determine_group_iv_cost_address): Compute cost for all uses in group. gcc/testsuite/ChangeLog 2016-05-31 Bin

[PATCH PR71354]Require vect_cond in test gcc.dg/vect/vect-23.c

Hi, This is a simple patch adding vect_cond requirement to case gcc.dg/vect/vect-23.c. Checked test behavior on sparc64. Is it OK? Thanks, bin gcc/testsuite/ChangeLog 2016-05-31 Bin Cheng PR tree-optimization/71354 * gcc.dg/vect/vect-23.c: Add VECT_COND requirement.diff

[PATCH GCC]Resolve compilation time known alias checks in vectorizer

pec2k6. This patch is based on https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00399.html, bootstrap and test on x86_64 and AArch64 (ongoing), is it OK? Thanks, bin 2016-06-07 Bin Cheng * tree-vect-data-refs.c (vect_no_alias_p): New function. (vect_prune_runtime_alias_tes

[PATCH GCC]Improve alias check code generation in vectorizer

r simplified by folder if addr_a_length and addr_b_lengnth are equal/const, which is quite common. I looked into generated assembly, this patch does introduces small regression in some cases, but overall I think it's good. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2016-06-

Re: [PATCH GCC]Resolve compilation time known alias checks in vectorizer

And Below is the ChangeLog entry for test cases gcc/testsuite/ChangeLog 2016-06-07 Bin Cheng * gcc.dg/vect/vect-35-big-array.c: Refine comment and test. * gcc.dg/vect/vect-35.c: Ditto. BTW, this patch also makes gcc.dg/vect/vect-mask-store-move-1.c fail, but I think it just

[Patch AArch64 1/2]Implement vcond_mask/vec_cmp patterns.

vcond. Bootstrap & test on AArch64. Is it OK? 2016-06-07 Alan Lawrence Renlin Li Bin Cheng * config/aarch64/aarch64-simd.md (vec_cmp): New pattern. (vec_cmp_internal): New pattern. (vec_cmp): New pattern. (vec_cmp_internal):

[Patch AArch64 2/2]Add missing vcond by rewriting it with vcond_mask/vec_cmp patterns.

"vect_cond_mixed" on AArch64, which will enable various tests. Bootstrap & test along with the first patch on AArch64, is it OK? Thanks, bin 2016-06-07 Alan Lawrence Renlin Li Bin Cheng * config/aarch64/iterators.md (V_cmp_mixed, v_c

[PATCH testsuite]XFAIL tests for -funsafe-loop-optimizations

gcc/testsuite/ChangeLog 2016-06-27 Bin Cheng * gcc.dg/tree-ssa/pr19210-1.c: xfail unsafe loop opt warnings. * gcc.dg/tree-ssa/pr19210-2.c: Ditto.diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c index 906132c..06713bd 100644 --- a

[PATCH GCC]Vectorize possible infinite loops by versioning

along with previous niter patches on x86_64 and AArch64. Is it OK? Thanks, bin 2016-06-27 Bin Cheng PR tree-optimization/57558 * tree-vect-loop-manip.c (vect_create_cond_for_niters_checks): New function. (vect_loop_versioning): Support versioning wi

[PATCH GCC]Improve loop-niter to handle possible infinite loop.

nyway. Next patch will xfails tests for this option. Well, the option is not totally discarded because it requires RTL changes too. I will follow up that after gimple part change. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2016-06-27 Bin Cheng * cfgl

[PATCH GCC]Try harder to find base object by expanding base address

ction happened during the expansion. And it's good to have base object for address type iv_uses. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-10-12 Bin Cheng * tree-scalar-evolution.c (alloc_iv): New parameter controlling base expansion for finding b

[PATCH GCC]Introduce qsort_range interface for GCC vector

x86_64 and AArch64 with other patches. Is it OK? Thanks, bin 2017-10-13 Bin Cheng * vec.h (struct GTY((user)) vec::qsort_range): New member function. (struct vec): New member function.From a6aa2866fb067628f63f508e9314c3a092b6055c Mon Sep 17 00:00:00 2001 From: Bin Cheng

[PATCH PR82574]Check that datref must be executed exactly once per iteration against outermost loop in nest

only need to check against the outermost loop for perfect nest. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-10-17 Bin Cheng PR tree-optimization/82574 * tree-loop-distribution.c (find_single_drs): New parameter. Check that data reference must be executed

[PATCH GCC][1/3]Simplify (A + CST cmp A -> CST cmp zero) for undefined overflow type

simplifies (A + CST cmp A -> CST cmp zero) for types with undefined overflow behavior. Bootstrap and test for patch set on x86_64 and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng * match.pd (A + CST cmp A -> CST cmp zero): New simplification for undefined overflow ty

[PATCH GCC][2/3]Simplify ((A +- CST1 CMP A +- CST2)) for undefined overflow type

Hi, This patch adds pattern simplifying (A +- CST1 CMP A +- CST2) for undefined overflow types. Bootstrap and test for patch set on x86_64 and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng * match.pd (A +- CST1 CMP A +- CST2): New pattern.From

[PATCH GCC][3/3]Refine CFG and bound information for split loops

4 and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng * tree-ssa-loop-split.c (compute_new_first_bound): New parameter. Compute and return bound information for the second split loop. (adjust_loop_split): New function. (split_loop): Update use and call above fun

Re: [PATCH GCC][3/3]Refine CFG and bound information for split loops

From: Richard Biener Sent: 20 October 2017 12:24 To: Bin Cheng Cc: gcc-patches@gcc.gnu.org; nd Subject: Re: [PATCH GCC][3/3]Refine CFG and bound information for split loops   On Thu, Oct 19, 2017 at 3:26 PM, Bin Cheng wrote: > Hi, > This is a rework of patch at > https://gc

[PATCH PR82776]Exploit more undefined pointer overflow behavior in loop niter analysis

with condition: (size_t (p2 - p1) >= n) in function B::append. So, any comment? Thanks, bin 2017-11-02 Bin Cheng PR tree-optimization/82776 * tree-ssa-loop-niter.c (infer_loop_bounds_from_pointer_arith): Handle POINTER_PLUS_EX

[PATCH OBVIOUS]Fix memory leak in tree-predcom.c

Hi, I ran into this memory leak issue in tree-predcom.c when investigating other PRs. This is the obvious fix by freeing reference of trivial component. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-11-02 Bin Cheng * tree-predcom.c (determine_roots_comp): Avoid memory

[PATCH PR82726][1/2]Revert previous fixes for PR70754 and PR79663

efficient because we avoid function call to stmt_dominates_stmt_p. This is the first patch reverting r244815 and r245689. Bootstrap and test on x86_64 and AArch64 in patch set. Is it OK? Thanks, bin 2017-11-02 Bin Cheng PR tree-optimization/82726 Revert 2017-01-23

[PATCH PR82726/PR70754][2/2]New fix by finding correct root reference in combined chains

. This should be more efficient because we avoid function call to stmt_dominates_stmt_p. Bootstrap and test on x86_64 and AArch64 in patch set. Is it OK? Thanks, bin 2017-11-02 Bin Cheng PR tree-optimization/82726 PR tree-optimization/70754 * tree-predcom.c

[PATCH PR81374]Record the max index of basic block, rather than # of basic blocks

86_64. Is it OK? Thanks, bin 2017-07-10 Bin Cheng PR tree-optimization/81374 * tree-loop-distribution.c (pass_loop_distribution::execute): Record the max index of basic blocks, rather than number of basic blocks.diff --git a/gcc/tree-loop-distribution.c b/gcc/tree

[PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

his patch fixes the issue by skipping such instructions if no du chain is found. Bootstrap and test on AArch64/cortex-a57. Is it OK? If it's fine, I would also need to backport it to 7/6 branches. Thanks, bin 2017-07-12 Bin Cheng PR target/81414 * config/aarch64/cortex-a57

[PATCH PR81369/01]Sort partitions by post order for all cases

Hi, This patch fixes ICE reported by PR81369. It simply sinks call to sort_partitions_by_post_order so that it's executed for all cases. This is necessary to schedule reduction partition as the last one. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-12 Bin

[PATCH PR81369/02]Conservatively not distribute loop with unknown niters

4, is it OK? Thanks, bin 2017-07-12 Bin Cheng PR target/81369 * tree-loop-distribution.c (classify_partition): Only assert on numer of iterations. (merge_dep_scc_partitions): Delete prameter. Update function call. (distribute_loop): Remove code handling

[PATCH PR81408]Turn TREE level unsafe loop optimizations warning to missed optimization message

on messages. I didn't change when this will be dumped, for now it is when called from ivopts. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-13 Bin Cheng PR target/81408 * tree-ssa-loop-niter.c (number_of_iterations_exit): Dump missed o

[GCC ARM]Remove unused variable in arm

Hi, This leftover unused variable breaks arm bootstrap. Simply remove it. Thanks, bin 2017-07-18 Bin Cheng * config/arm/arm.c (arm_emit_store_exclusive): Remove unused var.diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 1b7b382..139ab70 100644 --- a/gcc/config/arm

[PATCH PR81388]Revert change in revision 238585

e issue itself, any fix would require may_be_zero to be computed, which basically leads to patch revert. Bootstrap and test on x86_64 and AArch64, is it OK? Thanks, bin 2017-07-20 Bin Cheng PR tree-optimization/81388 Revert r238585: 2016-07-21 Bin Cheng

[PATCH GCC]Make pointer overflow always undefined and remove the macro

ion, as in nowrap_type_p. This patch makes it always true thus removes definition/usage of the macro. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-20 Bin Cheng * tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete. * fold-const.c (fold_comparison, fold_

[PATCH TEST]Require vect_perm in gcc.dg/vect/pr80815-3.c

Hi, The test has negative step in memory access, thus can't be vectorized on target like sparc-sun-solaris2.12. This patch adds vect_perm requirement for it. Test result checked. Is it OK? Thanks, bin gcc/testsuite/ChangeLog 2017-07-20 Bin Cheng * gcc.dg/vect/pr80815-3.c: Re

[PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

to gcc-7-branch. Thanks, bin 2017-07-27 Bin Cheng PR target/81228 * config/aarch64/aarch64-simd.md (vec_cmp): Add LTGT. gcc/testsuite/ChangeLog 2017-07-27 Bin Cheng PR target/81228 * gcc.dg/pr81228.c: New.diff --git a/gcc/config/aarch64/aarch64

[PATCH PR81620]Don't set has_max_use_after flag for store-store chain

Hi, This simple patch fixes the ICE by not setting has_max_use_after flag for store-store chain because there is no use at all. Bootstrap and test on x86_64 and AArch64 ongoing. Is it OK if no failure? Thanks, bin 2017-07-31 Bin Cheng PR tree-optimization/81620 * tree

[PATCH PR81267]Rewrite into loop closed ssa form in case of any store-store chain

x86_64 and AArch64 ongoing. Is it OK? Thanks, bin 2017-07-31 Bin Cheng PR tree-optimization/81627 * tree-predcom.c (prepare_finalizers): Always rewrite into loop closed ssa form for store-store chain. gcc/testsuite/ChangeLog 2017-07-31 Bin Cheng PR tree

[PATCH PR81744]Fix ICE by deep copying expression of loop's number of iterations

Hi, This is an obvious patch. It fixes ICE in PR81744 by deep copying expression of loop's number of iterations. Test result checked. Is it OK? Thanks, bin 2017-08-07 Bin Cheng PR tree-optimization/81744 * tree-predcom.c (prepare_finalizers_chain): Deep copy ex

[PATCH GCC][OBVIOUS]Handle boundary case for last iv candidate

Hi, When investigate issues, I ran into this obvious issue that the last candidate is not related to compare type iv_use. This patch fixes it. Will apply later. Thanks, bin 2017-08-08 Bin Cheng * tree-ssa-loop-ivopts.c (relate_compare_use_with_all_cands): Handle boundary

[PATCH GCC][04/06]Add copying interface for dependence_info

Is it OK? Thanks, bin 2017-08-10 Bin Cheng * tree-ssa-address.c (copy_dependence_info): New function. * tree-ssa-address.h (copy_dependence_info): New declaration. * tree-ssa-loop-ivopts.c (rewrite_use_address): Call above func.From 3cf0275d0db7d3e240bc7a010c6de68f15f46ce

[PATCH GCC][05/06]An interface clear all dependence_info with fixed access length tag

before expanding, but for now it is done in loopdone given predcom is the only motivation pass that I know. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng * tree-ssa-address.c (clear_dependence_info): New function. (clear_all_dependence_info): New

[PATCH GCC][03/06]Dump dependence information

Hi, This simple patch adds code dumping struct dependence_info. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng * tree-pretty-print.c (dump_generic_node): Dump fixed length tag in MEM_REF. Dump dependence info in TARGET_MEM_REF.From

[PATCH GCC][06/06]Record runtime alias info in struct dependence_info and pass it along

bitrary graph by simply discarding edges to sub-graph which can be modeled. For example, we can discard edge in above graph. This approximation results in less optimizations but correct code. */ Bootstrap and test in series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-08-10 Bin

[PATCH GCC][01/06]New interface returning all adjacent vertices in graph

Hi, This simple patch adds new interface returning adjacent vertices for a vertex in graph. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng * graphds.c (adjacent_vertices): New function. * graphds.h (adjacent_vertices): New declaration.From

[PATCH GCC][02/06]New field in struct dependence_info indicating fixed length access

we need to differentiate dependence_info derived from runtime alias check with others derived from restrict pointer. Bootstrap and test in series. any comment? Thanks, bin 2017-08-10 Bin Cheng * tree-core.h (struct tree_base.dependence_info): New field. * tree.c (copy_node

[PATCH PR81799]Fix ICE by forcing to is_gimple_val

Hi, This patch fixes ICE reported in PR81799. It simply uses is_gimple_val rather than is_gimple_condexpr. Bootstap and test on x86_64. Is it OK? Thanks, bin 2017-08-11 Bin Cheng PR tree-optimization/81799 * tree-loop-distribution.c (version_loop_by_alias_check): Force

[PATCH PR81832]Skip copying loop header if inner loop is distributed

ecked, but the patch only checks loop's header for simplicity/efficiency's purpose. Any comment? Bootstrap and test on x86_64. Thanks, bin 2017-08-15 Bin Cheng PR tree-optimization/81832 * tree-ssa-loop-ch.c (inner_loop_distributed_p): New function. (pass_ch_

[GCC RFC]Expensive internal function calls.

f not appropriate. Thanks, bin 2017-08-16 Bin Cheng * gimple.c (gimple_inexpensive_call_p): Consider IFN_LOOP_DIST_ALIAS and IFN_LOOP_VECTORIZED as expensive calls.diff --git a/gcc/gimple.c b/gcc/gimple.c index c4e6f81..6d4e376 100644 --- a/gcc/gimple.c +++ b/gcc/gimple.c @@ -3

[PATCH PR81913]Skip niter analysis if either IV in exit condition can wrap

inter case as reported in PR81196, but unsigned type needs more work. The patch also includes two XFAIL tests showing what shall be improved here. Bootstrap and test on AArch64. Is it OK? Thanks, bin 2017-08-24 Bin Cheng PR tree-optimization/81913 * tree-ssa-loop-niter.c (

[PATCH GCC]A simple implementation of loop interchange

s with it enabled by default. Any comments? Thanks, bin 2017-08-29 Bin Cheng * Makefile.in (tree-ssa-loop-interchange.o): New object file. * common.opt (ftree-loop-interchange): New option. * doc/invoke.texi (-ftree-loop-interchange): Document new option. * passes.

[PATCH GCC][1/6]Compute type mode and register pressure class mapping

LOAT and VECTOR register classes. Bootstrap and test on x86_64 and AArch64, is it OK? Thanks, bin 2017-05-10 Bin Cheng * ira.c (setup_mode_classes): New function. (find_reg_classes): Call above function. * ira.h (struct target_ira): New field x_ira_mode

[PATCH GCC][3/6]New file computing regional register pressure on TREE SSA

it would be me that should be blamed. I also sent message to David about this patch and the possible relation with his. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-05-10 Xinliang David Li Bin Cheng * Makefile.in (tree-ssa-regpressure.o):

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