2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Finish altivec stanza.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Move
initialization of pcvoid_type_node here...
(altivec_init_builtins): ...from here.
* config/rs6000
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add vsx stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 860 +++
1 file changed, 860 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin
Previously we created pointer types on the fly from their base types
whenever we needed one. It's more efficient to create them up front,
and the new mechanism requires that.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
va
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 438 +++
1 file changed, 438 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
and power9-64 stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 360 +++
1 file changed, 360 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64
stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 427 +++
1 file changed, 427 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add mma stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 404 +++
1 file changed, 404 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000-builtins.h): New #include.
(rs6000_init_builtins): Call rs6000_autoinit_builtins; skip the old
initialization logic when new builtins are enabled.
---
gcc/config/rs6000/rs6000-call.c | 12
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add ieee128-hw, dfp,
crypto, and htm stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 215 +++
1 file changed, 215 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 27
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/darwin.h (SUBTARGET_INIT_BUILTINS): Use the new
decl when new_builtins_are_live.
* config/rs6000/rs6000-builtin-new.def (__builtin_cfstring): New
built-in.
---
gcc/config/rs6000/darwin.h | 8
It seems quite strange for these to be "vector long" for 64-bit and
"vector long long" for 32-bit, when "vector long long" will do for both.
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Change
initia
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove
TARGET_EXTRA_BUILTINS guard.
---
gcc/config/rs6000/rs6000-call.c | 51 -
1 file changed, 24 insertions(+), 27 deletions(-)
diff --git a/gcc/config/rs6000
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000-builtins.h): New include.
(rs6000_new_builtin_vectorized_function): New function.
(rs6000_new_builtin_md_vectorized_function): Likewise.
(rs6000_builtin_vectorized_function): Call
.
2021-03-25 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_new_builtin):
New forward decl.
(rs6000_gimple_fold_builtin): Call rs6000_gimple_fold_new_builtin.
(rs6000_new_builtin_valid_without_lhs): New function
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_invalid_new_builtin):
Implement.
(rs6000_expand_ldst_mask): Likewise.
(rs6000_init_builtins): Initialize altivec_builtin_mask_for_load.
---
gcc/config/rs6000/rs6000-call.c | 101
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): New
forward decl.
(rs6000_invalid_new_builtin): New stub function.
(rs6000_expand_builtin): Call rs6000_expand_new_builtin.
(rs6000_expand_ldst_mask): New stub
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_cpu_expand_builtin):
Implement.
---
gcc/config/rs6000/rs6000-call.c | 100
1 file changed, 100 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (elemrev_icode): Implement.
(ldv_expand_builtin): Likewise.
(lxvrse_expand_builtin): Likewise.
(lxvrze_expand_builtin): Likewise.
(stv_expand_builtin): Likewise.
---
gcc/config/rs6000/rs6000
2021-03-25 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_mma_expand_builtin):
Implement.
---
gcc/config/rs6000/rs6000-call.c | 92 +
1 file changed, 92 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_htm_spr_num): New function.
(new_htm_expand_builtin): Implement.
(rs6000_expand_new_builtin): Handle 32-bit and endian cases.
---
gcc/config/rs6000/rs6000-call.c | 202
1
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_new_builtin_decl): New
function.
(rs6000_builtin_decl): Call it.
---
gcc/config/rs6000/rs6000-call.c | 20
1 file changed, 20 insertions(+)
diff --git a/gcc/config/rs6000/rs6000
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000_builtin_reciprocal): Use
rs6000_builtin_decls_x when appropriate.
(add_condition_to_bb): Likewise.
(rs6000_atomic_assign_expand_fenv): Likewise.
---
gcc/config/rs6000/rs6000.c | 19
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_debug_type): New function.
(def_builtin): Change debug formatting for easier parsing and
include more information.
(rs6000_init_builtins): Add dump of autogenerated builtins
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_init_file):
Initialize new_builtins_are_live to 1.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/altivec.h: Delete a number of #defines that are
now superfluous; include rs6000-vecdefines.h; include some
synonyms.
---
gcc/config/rs6000/altivec.h | 516 +++-
1 file changed, 41 insertions
After this patch set was developed, a small change was made to overload
handling for VEC_INSERT. Reflecting that into the new support here.
2021-04-27 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.c
(altivec_resolve_new_overloaded_builtin): Change P8-vector test to
less
2021-03-24 Bill Schmidt
gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-extract-sig-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-insert-exp-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-insert-exp-5.c
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_file): New filescope
variable.
(ovld_file): Likewise.
(header_file): Likewise.
(init_file): Likewise.
(defines_file): Likewise.
(pgm_path): Likewise
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (typemap): New struct.
(TYPE_MAP_SIZE): New defined constant.
(type_map): New initialized filescope variable.
(map_token_to_type_node): New function.
(write_type_node): Likewise
eview, unfortunately. Just be aware that generally we aren't changing
the logic and functionality of overload handling.
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.c (rs6000-builtins.h): New include.
(altivec_resolve_new_overloaded_builtin): New fo
On 4/27/21 10:57 AM, Jakub Jelinek wrote:
On Tue, Apr 27, 2021 at 10:32:36AM -0500, Bill Schmidt wrote:
2021-03-03 Bill Schmidt
gcc/
* Makefile.in (OUT_FILE_DEPS): New variable.
(out_object_file): Depend on OUT_FILE_DEPS.
Why?
E.g. gcc/config/i386/t-i386 contains:
i386.o
On 4/27/21 11:47 AM, Jakub Jelinek wrote:
On Tue, Apr 27, 2021 at 11:14:00AM -0500, Bill Schmidt wrote:
On 4/27/21 10:57 AM, Jakub Jelinek wrote:
On Tue, Apr 27, 2021 at 10:32:36AM -0500, Bill Schmidt wrote:
2021-03-03 Bill Schmidt
gcc/
* Makefile.in (OUT_FILE_DEPS): New variable
On 4/27/21 10:32 AM, Bill Schmidt wrote:
The design of the target-specific built-in function support in the
Power back end has not stood the test of time. The machinery is
grossly inefficient, confusing, and arcane; and adding new built-in
functions is inefficient and error-prone. This patch
On 4/27/21 10:32 AM, Bill Schmidt wrote:
The design of the target-specific built-in function support in the
Power back end has not stood the test of time. The machinery is
grossly inefficient, confusing, and arcane; and adding new built-in
functions is inefficient and error-prone. This patch
On 4/27/21 10:32 AM, Bill Schmidt wrote:
The design of the target-specific built-in function support in the
Power back end has not stood the test of time. The machinery is
grossly inefficient, confusing, and arcane; and adding new built-in
functions is inefficient and error-prone. This patch
Hi! I'd like to ping this series. It has slightly higher priority from
my perspective, since I'd like this to be backported in time for GCC 11.2.
Thanks!
Bill
On 4/25/21 8:50 PM, Bill Schmidt via Gcc-patches wrote:
Add POWER10 support for hashst[p] and hashchk[p] operations. When
Hi! I'd like to ping this series. This is a big change, so I'd like to
get it committed fairly early in stage 1. I know you have a lot stacked
up, though.
Thanks!
Bill
On 4/27/21 10:32 AM, Bill Schmidt wrote:
The design of the target-specific built-in function support in the
e CC them.
In any case, this is a reasonably straightforward patch. It allows
adding generated header files to be identified as "./header.h" and
included in the files to be scanned by gengtype for GC roots.
Thank you!
Bill
On 4/27/21 10:32 AM, Bill Schmidt wrote:
Currently gengtype
ystem with no regressions.
Tests on a kernel that enables user-space ROP mitigation were
successful. Is this series ok for trunk? I would also like to
later backport these patches to GCC for the 11.2 release.
Thanks!
Bill
Bill Schmidt (4):
rs6000: Add -mrop-protect and -mprivileged flags
r
2021-05-13 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Disable shrink wrap when inserting ROP-protect instructions.
* config/rs6000/rs6000.opt (mrop-protect): New option.
(mprivileged): Likewise.
* doc/invoke.texi
2021-05-13 Bill Schmidt
gcc/
* config/rs6000/rs6000-internal.h (rs6000_stack): Add
rop_hash_save_offset and rop_hash_size.
* config/rs6000/rs6000-logue.c (rs6000_stack_info): Compute
rop_hash_size and rop_hash_save_offset.
(debug_stack_info): Dump
2021-05-13 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__ROP_PROTECT__ if -mrop-protect is selected.
---
gcc/config/rs6000/rs6000-c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000
2021-05-13 Bill Schmidt
gcc/testsuite/
* gcc.target/powerpc/rop-1.c: New.
* gcc.target/powerpc/rop-2.c: New.
* gcc.target/powerpc/rop-3.c: New.
* gcc.target/powerpc/rop-4.c: New.
* gcc.target/powerpc/rop-5.c: New.
---
gcc/testsuite/gcc.target/powerpc
On 5/14/21 1:44 PM, Segher Boessenkool wrote:
Please make this an unspec_volatile?
Oops! Sorry for missing that the first time.
Thanks for the review!!
Bill
Series pushed with recommended changes. Thank you!
Bill
On 5/14/21 10:55 AM, Segher Boessenkool wrote:
On Thu, May 13, 2021 at 10:34:54PM -0500, Bill Schmidt via Gcc-patches wrote:
+mprivileged
+Target Var(rs6000_privileged) Init(0)
+Enable generation of instructions that require privileged
using
rs6000_special_adjust_field_align_p, which has been always returning
false for a long time.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2021-05-18 Bill Schmidt
gcc/
* config/rs6000/freebsd64.h (ADJUST_FIELD_ALIGN): Remove ca
On 5/18/21 11:30 AM, Segher Boessenkool wrote:
On Tue, May 18, 2021 at 09:09:07AM -0500, Bill Schmidt wrote:
Long ago we were forced to make some small ABI breaks to correct errors
in the implementation, and we added warning messages for the changes
from GCC 4.9 to GCC 5. Enough time has
On 8/13/20 11:12 AM, Carl Love wrote:
GCC maintainers:
The macro expansion for the bfloat convert intrinsics XVCVBF16SP and
XVCVSPBF16 need to be restricted to P10.
The macro expansions BU_P10V_0, BU_P10V_1, BU_P10V_2, BU_P10V_3 expand
the name field as "__builtin_altivec_". These macro expans
On 8/13/20 2:24 PM, Carl Love wrote:
Bill:
On Thu, 2020-08-13 at 13:38 -0500, Bill Schmidt wrote:
Hi Carl,
Thanks for cleaning up the consistency issue. The new names and
related
adjustments LGTM.
Are there no affected test cases that need adjusting? That
surprises
me. For example, didn&#
On 8/17/20 12:13 PM, Carl Love wrote:
Segher, Bill, Peter:
On Fri, 2020-08-14 at 19:42 -0500, Segher Boessenkool wrote:
Do the names agree with the (future) documentation now?
Did not double check on the documentation.
Someone should...
Looking at the box document "Proposed function Prototyp
cannot make a sibcall to a callee that
does not.
2020-08-19 Bill Schmidt
gcc/
* config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
Sibcalls are always legal when the caller doesn't preserve r2.
gcc/testsuite/
* gcc.target/powerpc/pcrel-sibcall-1.c: A
I failed to mention that this has been bootstrapped and tested on
powerpc64le-unknown-linux-gnu, with no regressions. Is this ok for trunk?
Thanks,
Bill
On 8/19/20 9:40 AM, Bill Schmidt via Gcc-patches wrote:
A function compiled with the PC-relative addressing model does not
require r2 to
On 8/20/20 6:33 PM, Segher Boessenkool wrote:
Hi!
On Tue, Aug 18, 2020 at 02:31:41AM -0400, Michael Meissner wrote:
In order to do this, the pass that converts the load address and load/store
must occur late in the compilation cycle.
That does not follow afaics.
Let me see if I can help exp
On 8/24/20 11:01 PM, Michael Meissner wrote:
On Sat, Aug 22, 2020 at 07:05:51PM -0500, Bill Schmidt wrote:
What is necessary in order to allow this optimization to occur
earlier is to make this hidden dependency explicit. When the
relocation is inserted, we have to change the "pld" i
Prior to P10, ELFv2 hasn't implemented nonlocal sibcalls. Now that we do,
we need to be sure that r12 is set up prior to such a call.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for trunk?
Thanks,
Bill
2020-08-27 Bill Schmidt
gcc/
Hi!
On 8/27/20 1:41 PM, Segher Boessenkool wrote:
Hi!
On Thu, Aug 27, 2020 at 08:21:34AM -0500, Bill Schmidt wrote:
+ /* For ELFv2, r12 and CTR need to hold the function address
+ for an indirect call. */
+ if (GET_CODE (func_desc) != SYMBOL_REF && DEFAULT_ABI == A
On 8/28/20 7:25 AM, Alan Modra wrote:
On Fri, Aug 28, 2020 at 01:17:27AM -0500, Segher Boessenkool wrote:
1) Very many unnecessary moves are generated during expand *anyway*, a
few more will not hurt;
2) In practice we always generate a move from a pseudo into r12 here,
never a copy from r12 int
Remove unnecessary tests before copying function address to r12, as
requested by Segher.
Bootstrapped and tested on powerpc64le-unknown-linx-gnu with no
regressions, committed as obvious.
Thanks,
Bill
2020-08-28 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000_call_aix): Remove
It turns out that the target hook that this is supposed to satisfy
disappeared in 2004. Probably time to retire it.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions; committed as obvious.
Thanks,
Bill
2020-08-28 Bill Schmidt
gcc/
* config/rs6000/rs6000
On 3/11/20 2:00 PM, Carl Love wrote:
GCC maintianers:
The following patch add a check to make sure the user did not specify
-mno_fprnd with the builtins __builtin_vsx_xsrdpim and
__builtin_vsx_xsrdpip. These builtins are incompatible with the
-mno_fprnd command line. The check prevents GCC
On 7/9/20 4:10 PM, Peter Bergner wrote:
On 7/9/20 12:11 PM, Segher Boessenkool wrote:
gcc/testsuite/
PR target/96125
* gcc.target/powerpc/pr96125.c: New test.
Okay for trunk and 10 (but see test nit below). Thanks!
[snip]
So maybe we should just do all builtins always?
I t
Just a reminder this patch series exists and wants a review. :-)
Bill
On 7/27/20 9:13 AM, Bill Schmidt wrote:
From: Bill Schmidt
This is a slight reworking of the patches posted on June 17. I have
made a couple of improvements, but the general arrangement of the patches
is the same as
again.
Meantime, please reply to wschm...@linux.ibm.com for this patch series.
Thanks!
Bill
Forwarded Message
Subject: [PATCH 00/29] rs6000: Auto-generate builtins from descriptions
[V2]
Date: Mon, 27 Jul 2020 09:13:46 -0500
From: Bill Schmidt
To: gcc-pat
On 7/30/20 12:15 PM, will schmidt wrote:
On Mon, 2020-07-27 at 09:14 -0500, Bill Schmidt wrote:
From: Bill Schmidt
2020-07-26 Bill Schmidt
* config/rs6000/rs6000-builtin-new.def: Add power9,
power9-vector, and power9-64 builtins.
---
gcc/config/rs6000/rs6000-builtin
On 4/17/20 1:53 AM, Richard Biener wrote:
Yeah well, but RTL is not in SSA form and there's no RTL IL verification
in place to track degradation. And we even work in the opposite way
when expanding to RTL from SSA, coalescing as much as we can ...
Which is itself problematic, introducing unne
On 4/22/20 8:11 AM, Jakub Jelinek via Gcc-patches wrote:
Hi!
As mentioned in the PR and on IRC, the recently added struct-layout-1.exp
new tests FAIL on powerpc64le-linux (among other targets).
FAIL: tmpdir-g++.dg-struct-layout-1/t032 cp_compat_x_tst.o-cp_compat_y_tst.o
execute
FAIL: tmpdir-g++
On 4/22/20 11:49 AM, Jakub Jelinek wrote:
On Wed, Apr 22, 2020 at 11:24:09AM -0500, Bill Schmidt wrote:
Hm, but this patch violates the ELFv2 ABI as written. The ABI includes:
"Floating-point and vector aggregates that contain padding words and
integer fields with a width of 0 should n
A user reported that we are still referring to a public review
draft of the ELFv2 ABI specification. Replace that by a permalink.
Tested with "make pdf" and verified the link is hot. Is this okay
for master?
Thanks,
Bill
2020-04-24 Bill Schmidt
* gcc/doc/extend.tex
Jakub, thanks for continuing to track down and fix all these cases.
I think this looks good. My only comment would be to please add some
comments in the test cases about the purpose, or at least to explain
the regexes in the scan-assembler-* directives, to save us all some
mental cycles in the f
On 4/28/20 6:38 AM, Jakub Jelinek via Gcc-patches wrote:
Hi!
Ok, I've tried:
struct X { };
struct Y { int : 0; };
struct Z { int : 0; Y y; };
struct U : public X { X q; };
struct A { float a, b, c, d; };
struct B : public X { float a, b, c, d; };
struct C : public Y { float a, b, c, d; };
struct
On 4/28/20 10:42 AM, Jakub Jelinek wrote:
On Tue, Apr 28, 2020 at 10:16:24AM -0500, Bill Schmidt via Gcc-patches wrote:
I think this looks good. My only comment would be to please add some
comments in the test cases about the purpose, or at least to explain
the regexes in the scan-assembler
On 4/22/20 1:20 PM, Carl Love wrote:
GCC maintainers:
The following is a trivial patch to fix a comment describing the
intrinsic function _mm_movemask_epi8. The comment was expanded to
clarify the layout of the returned result.
The patch does not make any functional changes.
Please let me kno
setnbc[r] is like setbc[r], but it writes -1 instead of 1 to the GPR.
2020-05-06 Segher Boessenkool
* config/rs6000/rs6000.md (*setnbc_signed_): New
define_insn.
(*setnbcr_signed_): New define_insn.
(*neg_eq_): Avoid for TARGET_FUTURE; add missing && 1.
2020-05-06 Segher Boessenkool
* gcc.target/powerpc/setbc.h: New.
* gcc.target/powerpc/setbceq.c: New.
* gcc.target/powerpc/setbcge.c: New.
* gcc.target/powerpc/setbcgt.c: New.
* gcc.target/powerpc/setbcle.c: New.
* gcc.target/powerpc/setbclt.c: Ne
New instructions setbc and setbcr. setbc sets a GPR to 1 if some
condition register bit is set, and 0 otherwise; setbcr does it the
other way around.
2020-05-06 Segher Boessenkool
* config/rs6000/rs6000.md (setbc_signed_): New
define_insn.
(*setbcr_signed_): Likewise.
2020-05-06 Segher Boessenkool
* gcc.target/powerpc/setnbc.h: New.
* gcc.target/powerpc/setnbceq.c: New.
* gcc.target/powerpc/setnbcge.c: New.
* gcc.target/powerpc/setnbcgt.c: New.
* gcc.target/powerpc/setnbcle.c: New.
* gcc.target/powerpc/setnbclt
*** BLURB HERE ***
Bill Schmidt (4):
Add insns for setbc and setbcr
Add tests for setbc and setbcr
Add insns for setnbc and setnbcr
Add tests for setnbc and setnbcr
gcc/config/rs6000/rs6000.md | 100 +---
gcc/testsuite/gcc.target/powerpc/setbc.h| 27
For all of these, I forgot to mention that they have been bootstrapped
and tested on powerpc64le-unknown-linux-gnu with no regressions. Are
these okay for trunk, after GCC 10 is fully released?
Thanks,
Bill
On 5/6/20 3:31 PM, Bill Schmidt via Gcc-patches wrote:
*** BLURB HERE ***
Bill
On 5/6/20 6:48 PM, Segher Boessenkool wrote:
On Wed, May 06, 2020 at 03:41:35PM -0500, Bill Schmidt wrote:
For all of these, I forgot to mention that they have been bootstrapped
and tested on powerpc64le-unknown-linux-gnu with no regressions. Are
these okay for trunk, after GCC 10 is fully
From: Kelvin Nilsen
Dejagnu targets for these.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Patch shepherded by Bill Schmidt on behalf of Kelvin Nilsen.
Thanks!
Bill
2020-03-04 Kelvin Nilsen
* gcc.target/powerpc/dg-future
Bill Schmidt
* config/rs6000/altivec.h (vec_clzm): New macro.
(vec_ctzm): Likewise.
* config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
(UNSPEC_VCTZDM): Likewise.
(vclzdm): New insn.
(vctzdm): Likewise.
* config/rs6000
Bill Schmidt
* config/rs6000/altivec.h (vec_pdep): New macro implementing new
built-in function.
(vec_pext): Likewise.
* config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
(UNSPEC_VPEXTD): Likewise.
(vpdepd): New insn.
(vpextd
From: Kelvin Nilsen
Add support for the vgnb instruction, which gathers every Nth bit
per vector element.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-07 Kelvin Nilsen
Bill Schmidt
From: Kelvin Nilsen
Add the centrifuge-doubleword instruction and built-in access.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC
From: Kelvin Nilsen
Add the new vector centrifuge-doubleword instruction and built-in
function access.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* config/rs6000/altivec.h (vec
From: Kelvin Nilsen
Add support for new scalar instructions for counting leading or
trailing zeros under control of a bitmask.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* conf
From: Kelvin Nilsen
Add new vector instructions to clear leftmost and rightmost bytes.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* config/rs6000/altivec.h (vec_clrl): New #def
On 5/8/20 2:00 PM, Segher Boessenkool wrote:
On Thu, May 07, 2020 at 09:11:32PM -0500, Bill Schmidt wrote:
From: Kelvin Nilsen
Add support for new vclzdm and vctzdm vector instructions that
count leading and trailing zeros under control of a mask.
Bootstrapped and tested on powerpc64le
From: Kelvin Nilsen
Add scalar instructions for parallel bit deposit and extract, with
built-in function support.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* config/rs6000/alt
Please ignore, I sent the wrong ChangeLog. Will try again momentarily.
Sorry,
Bill
On 5/8/20 3:05 PM, Bill Schmidt via Gcc-patches wrote:
From: Kelvin Nilsen
Add scalar instructions for parallel bit deposit and extract, with
built-in function support.
Bootstrapped and tested on powerpc64le
From: Kelvin Nilsen
Add scalar instructions for parallel bit deposit and extract, with
built-in function support.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen
* config/rs6000/rs6
From: Kelvin Nilsen
Add the xxeval insn and access it via the vec_ternarylogic built-in
function. As part of this, add support to the built-in function
infrastructure for functions that take four arguments.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions, using a na
From: Kelvin Nilsen
Adds new instructions vstribr, vstrihr, vstribl, and vstrihl, with
overloaded built-in support.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions, using a compiler configured for Power9. Is this okay
for master?
Thanks,
Bill
[gcc]
2020-05-08 Ke
From: Carl Love
Add support for xxgenpcv[dw]m, along with individual and overloaded
built-in functions for access.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions, using a POWER9 compiler. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-09 Carl Love
From: Kelvin Nilsen
Changes to the built-in specification occurred after early patches
added support for these. The name of vec_clzm became vec_cntlzm,
and vec_ctzm became vec_cnttzm. Four of the overloaded forms of
vec_gnb were removed, and the fourth argument redefined as an
unsigned int, not
From: Kelvin Nilsen
Add new insns vextdu[bhw]vlx, vextddvlx, vextdu[bhw]vhx, and
vextddvhx, along with built-in access and overloaded built-in
access to these insns.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions, using a Power9 configuration. Is this okay for
mast
On 5/8/20 3:47 PM, Segher Boessenkool wrote:
Hi,
On Thu, May 07, 2020 at 09:29:03PM -0500, Bill Schmidt wrote:
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 5ef4889ba55..33ba57855bc 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
On 5/8/20 6:51 PM, Segher Boessenkool wrote:
On Fri, May 08, 2020 at 08:17:18AM -0500, Bill Schmidt wrote:
From: Kelvin Nilsen
Add support for new scalar instructions for counting leading or
trailing zeros under control of a bitmask.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu
On 5/11/20 5:21 AM, Segher Boessenkool wrote:
Hi!
On Sat, May 09, 2020 at 12:05:08PM -0500, Bill Schmidt wrote:
From: Carl Love
Add support for xxgenpcv[dw]m, along with individual and overloaded
built-in functions for access.
(xxgenpcvm_): New insn.
(xxgenpcvm): New
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