Re: [PATCH 3/3] aarch64: Convert aarch64 multi choice patterns to new syntax

Richard Sandiford writes: > Andrea Corallo writes: >> Hi all, >> this patch converts a number of multi multi choice patterns within the >> aarch64 backend to the new syntax. >> >> The list of the converted patterns is in the Changelog. >> >> Fo

[committed] contrib: add mdcompact

back-ends (arm, loongarch). The tool can be used to convert a single pattern, an open buffer or all md files in a directory. The tool might need further adjustment to run on some specific back-end, in case very happy to help. This patch was pre-approved here [1]. Best Regards Andrea Corallo

Re: [committed] contrib: add mdcompact

Richard Biener writes: > On Thu, Oct 5, 2023 at 5:49 PM Andrea Corallo wrote: >> >> Hello all, >> >> this patch checks in mdcompact, the tool written in elisp that I used >> to mass convert all the multi choice pattern in the aarch64 back-end to >> the n

[PATCH V2] vec: don't select partial vectors when looping on full vectors

regtested on aarch64-linux-gnu. Okay for trunk? Thanks Andrea >From 45b5e45a7ab2eecfa8489d2a7b8341556e9e8d7c Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Fri, 28 Aug 2020 16:01:15 +0100 Subject: [PATCH] vec: don't select partial vectors when unnecessary gcc/ChangeLog 2020-09-

[PATCH] aarch64: Fix ICE on fpsr fpcr getters [PR96968]

>From 74f5223724fe8ff2649ce6a0860f415052340a04 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Mon, 14 Sep 2020 14:47:24 +0100 Subject: [PATCH] aarch64: Fix ICE on fpsr fpcr getters [PR96968] gcc/ChangeLog 2020-09-14 Andrea Corallo PR target/96968 * config/aarch64/aarch64-bu

Re: [PATCH V2] vec: don't select partial vectors when looping on full vectors

Richard Sandiford writes: > OK with two incredibly petty comments fixed: [...] Installed with the two suggestions as 052204fac58. Thanks for reviewing! Andrea

Re: Commit 052204fac580 was never sent to gcc-patches

Segher Boessenkool writes: > ... and it causes testsuite regressions on Power. We haven't determined > et if it actually is worse code, but there are testcases that trip on > it. Either way, all patches should be send to gcc-patches@, whether > pre-approved or not. > > Please correct this. Tha

Re: [PATCH V2] vec: don't select partial vectors when looping on full vectors

Christophe Lyon writes: > On Wed, 16 Sep 2020 at 15:40, Andrea Corallo wrote: >> >> Richard Sandiford writes: >> >> > OK with two incredibly petty comments fixed: >> >> [...] >> >> Installed with the two suggestions as 052204fac58. >&g

[PATCH] aarch64: Fix dejaGNU directive in clastb_8.c testcase

directive >From 6628a4bbfa909ac2fda789e549c7e7067ecaddad Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Thu, 17 Sep 2020 15:36:22 +0200 Subject: [PATCH] aarch64: Fix dejaGNU directive in clastb_8.c testcase gcc/testsuite/ChangeLog 2020-09-17 Andre Corallo * gcc.

Re: [PATCH V2] aarch64: Fix ICE on fpsr fpcr getters [PR96968]

rom: Andrea Corallo Date: Mon, 14 Sep 2020 14:47:24 +0100 Subject: [PATCH] aarch64: Fix ICE on fpsr fpcr getters [PR96968] gcc/ChangeLog 2020-09-14 Andrea Corallo PR target/96968 * config/aarch64/aarch64-builtins.c (aarch64_expand_fpsr_fpcr_setter): Fix comment

Re: [PATCH] aarch64: Fix dejaGNU directive in clastb_8.c testcase

Richard Sandiford writes: > OK, thanks. FWIW, this would also have been OK under the > “obviously correct” rule (but asking is obviously OK too :-)) > > Richard Installed as ee7aa7e7b9d Thanks for having a look and for the info! Andrea

Re: [PATCH] vect/test: Don't check for epilogue loop [PR97075]

Richard Sandiford writes: [...] > Andrea, how should we handle this? Is it something you'd have time to > look at? Hi Richard, I've not but FWIW your observations here and on today's mail make alot of sense to me. We maybe want to install Kewen's fix anyway while we rework this logic? Andre

Re: [PATCH V2] aarch64: Fix ICE on fpsr fpcr getters [PR96968]

Richard Sandiford writes: > Richard Sandiford writes: >>> @@ -2034,6 +2034,18 @@ aarch64_expand_fpsr_fpcr_setter (int unspec, >>> machine_mode mode, tree exp) >>>emit_insn (gen_aarch64_set (unspec, mode, op)); >>> } >>> >>> +/* Expand a fpsr or fpcr getter (depending on UNSPEC) using MOD

[PATCH] aarch64: Do not alter value on a force_reg returned rtx expanding __jcvt

cvt` intrinsic. If is not the case please discard. Regtested and bootsraped on aarch64-linux-gnu. Andrea >From 403ad66b8f9c108d7f38b406ed1afcb603b7e25f Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Thu, 17 Sep 2020 17:17:52 +0100 Subject: [PATCH] aarch64: Do not alter value on a force_reg re

Re: [PATCH] aarch64: Do not alter value on a force_reg returned rtx expanding __jcvt

Kyrylo Tkachov writes: > Hi Andrea, > >> -Original Message- >> From: Gcc-patches On Behalf Of >> Richard Sandiford >> Sent: 21 September 2020 11:58 >> To: Andrea Corallo >> Cc: Richard Earnshaw ; nd ; >> gcc-patches@gcc.gnu.org >>

[PATCH] aarch64: Do not alter force_reg returned rtx expanding pauth builtins

>From 8869ee04e3788fdec86aa7e5a13e2eb477091d0e Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Mon, 21 Sep 2020 13:52:45 +0100 Subject: [PATCH] aarch64: Do not alter force_reg returned rtx expanding pauth builtins 2020-09-21 Andrea Corallo * config/aarch64/aarch64-builtins.c (aarch64_general_expand_buil

Re: [PATCH] aarch64: Do not alter value on a force_reg returned rtx expanding __jcvt

Andrea Corallo writes: > Kyrylo Tkachov writes: [...] >> >> Can you please also backport it to the appropriate branches as well after >> some time on trunk. >> Thanks, >> Kyrill > > Ciao Kyrill, > > Sure happy to do that. For now into tru

Re: [PATCH] aarch64: Do not alter force_reg returned rtx expanding pauth builtins

Hi Richard, thanks for reviewing Richard Sandiford writes: > Andrea Corallo writes: >> Hi all, >> >> having a look for force_reg returned rtx later on modified I've found >> this other case in `aarch64_general_expand_builtin` while expanding &g

[PATCH V2] aarch64: Do not alter force_reg returned rtx expanding pauth builtins

Hi all, here the reworked patch addressing Richard's suggestions. Regtested and bootsraped on aarch64-linux-gnu. Okay for trunk? Thanks! Andrea >From 946d22aa247f2d1bb0c6b10a6e6db415b34feff2 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Mon, 21 Sep 2020 13:52:45 +0100

Re: [PATCH V2] aarch64: Do not alter force_reg returned rtx expanding pauth builtins

Richard Sandiford writes: > Andrea Corallo writes: >> Hi all, >> >> here the reworked patch addressing Richard's suggestions. >> >> Regtested and bootsraped on aarch64-linux-gnu. >> >> Okay for trunk? > > OK, thanks. > > Richard Into trunk as 92f0d3d03a7. Thanks! Andrea

Re: [PATCH][gcc] libgccjit: handle long literals in playback::context::new_string_literal

Andrea Corallo writes: > Andrea Corallo writes: > >> Andrea Corallo writes: >> >>> Hi all, >>> yesterday I've found an interesting bug in libgccjit. >>> Seems we have an hard limitation of 200 characters for literal strings. >>> Attempt

[PATCH][gcc] libgccjit: introduce version entry points

. Andrea gcc/jit/ChangeLog 2020-??-?? Andrea Corallo * Make-lang.in (libgccjit.o): Add dependecy plus define BASEVER. * docs/topics/compatibility.rst (LIBGCCJIT_ABI_13): New ABI tag plus add version paragraph. * libgccjit++.h (namespace gccjit::version): Add new

Re: [PATCH][gcc] libgccjit: introduce version entry points

Hi, second version of the patch here cleaning up an unnecessary change. Does not introduce regressions with make check-jit. Andrea gcc/jit/ChangeLog 2020-??-?? Andrea Corallo * docs/topics/compatibility.rst (LIBGCCJIT_ABI_13): New ABI tag plus add version paragraph

Re: [PATCH][gcc] libgccjit: handle long literals in playback::context::new_string_literal

> Andrea Corallo writes: > >> Andrea Corallo writes: >> >>> Andrea Corallo writes: >>> >>>> Hi all, >>>> yesterday I've found an interesting bug in libgccjit. >>>> Seems we have an hard limitation of 200 characters for

[PATCH] [arm] Implement Armv8.1-M low overhead loops

/ChangeLog: 2020-??-?? Andrea Corallo 2020-??-?? Mihail-Calin Ionescu 2020-??-?? Iain Apreotesei * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): (arm_invalid_within_doloop): Implement invalid_within_doloop hook. * config/arm/arm.h (TARGET_HAVE_LOB): Add new macro

Re: [PATCH] [arm] Implement Armv8.1-M low overhead loops

Hi Richard, "Richard Earnshaw (lists)" writes: >> gcc/ChangeLog: >> 2020-??-?? Andrea Corallo >> 2020-??-?? Mihail-Calin Ionescu >> 2020-??-?? Iain Apreotesei >> * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): >>

Re: [PATCH] [arm] Implement Armv8.1-M low overhead loops

Hi Roman, Roman Zhuykov writes: > This patch is stage1 material, right? Yes >> >>> +(define_insn "*doloop_end" >>> + [(parallel [(set (pc) >>> + (if_then_else >>> + (ne (reg:SI LR_REGNUM) (const_int 1)) >>> + (label_ref (match_operan

Re: [PATCH] arm/aarch64: Add bti for all functions [PR106671]

Feng Xue OS via Gcc-patches writes: > This patch extends option -mbranch-protection=bti with an optional argument > as bti[+all] to force compiler to unconditionally insert bti for all > functions. Because a direct function call at the stage of compiling might be > rewritten to an indirect call w

Re: [PATCH] arm/aarch64: Add bti for all functions [PR106671]

Andrea Corallo writes: > Feng Xue OS via Gcc-patches writes: > >> This patch extends option -mbranch-protection=bti with an optional argument >> as bti[+all] to force compiler to unconditionally insert bti for all >> functions. Because a direct function call at the sta

[PATCH 2/3] recog: Support space in "[ cons"

egister_operand")))] "TARGET_SIMD" {@ [ cons: =0 , 1 ; attrs: type ] [ w, w ; neon_dup ] dup\t%0., %1.[0] [ w, ?r ; neon_from_gp ] dup\t%0., %1 } ) gcc/Changelog 2023-09-20 Andrea Corallo * gensupport.cc (convert_syntax): Skip sp

[PATCH 1/3] recog: Improve parser for pattern new compact syntax

From: Richard Sandiford Hi all, this is to add support to the new compact pattern syntax for the case where the constraints do appear unsorted like: (define_insn "*si3_insn_uxtw" [(set (match_operand:DI 0 "register_operand") (zero_extend:DI (SHIFT_no_rotate:SI (match_operand:

[PATCH 3/3] aarch64: Convert aarch64 multi choice patterns to new syntax

[Resending this with the patch compressed as it's more than 400 KB...] Hi all, this patch converts a number of multi multi choice patterns within the aarch64 backend to the new syntax. The list of the converted patterns is in the Changelog. For completeness here follows the list of multi choice

Re: [PATCH V2] libgccjit: Add new gcc_jit_context_new_blob entry point

gcc/jit/jit-recording.c >> +++ b/gcc/jit/jit-recording.c > > [...] > >> @@ -4440,9 +4510,26 @@ recording::global::write_to_dump (dump &d) >>d.write ("extern "); >>break; >> } >> - d.write ("%s %s;\n", >>

[PATCH] libgccjit: update some comments in libgccjit.c

Hi all, just a small patch updating some comments that apparently went out of sync a while ago adding gcc_jit_context_new_rvalue_from_long. Okay for trunk? Thanks Andrea >From 84b94a039d164878bdbf8bfd1a2038960f813c76 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Thu, 6 Aug 2020 10

Re: [PATCH 1/2] Add new RTX instruction class FILLER_INSN

Segher Boessenkool writes: > Hi Andrea, > > On Wed, Jul 22, 2020 at 12:02:33PM +0200, Andrea Corallo wrote: >> This first patch implements the addition of a new RTX instruction class >> FILLER_INSN, which has been white listed to allow placement of NOPs >> outside of

Re: [PATCH 1/2] Add new RTX instruction class FILLER_INSN

Segher Boessenkool writes: > [ Please don't post new patch series as replies to old ] > > On Wed, Jul 22, 2020 at 12:02:33PM +0200, Andrea Corallo wrote: >> This first patch implements the addition of a new RTX instruction class >> FILLER_INSN, which has been white li

Re: [PATCH] libgccjit: update some comments in libgccjit.c

David Malcolm writes: > On Wed, 2020-08-19 at 09:24 +0200, Andrea Corallo wrote: >> Hi all, >> >> just a small patch updating some comments that apparently went out of >> sync a while ago adding gcc_jit_context_new_rvalue_from_long. > >> Okay for trunk?

[PATCH] vec: remove unreachable code

rea >From 6bd96581410d9847ab78e6761178d4efbc9a5af2 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Fri, 4 Sep 2020 09:56:59 +0100 Subject: [PATCH] vec: dead code removal in tree-vect-loop.c gcc/ChangeLog 2020-09-04 Andrea Corallo * tree-vect-loop.c (vect_estimate_min_profitable_i

Re: [PATCH] vec: remove unreachable code

Richard Biener writes: > On Fri, 4 Sep 2020, Andrea Corallo wrote: > >> Hi all, >> >> just a small patch removing a piece of unreachable code in >> 'vect_estimate_min_profitable_iters' given the condition >> (LOOP_VINFO_USING_PARTIAL_VECTORS_P (

[PATCH] vec: Revert "dead code removal in tree-vect-loop.c" and add a comment.

Hi Richard, this reverts the discussed patch and adds what was suggested as a comment. Apologies for the inconvenience, okay for trunk? Thanks Andrea >From 84dfa2d461692f445f45b3c3498f9bedba5c3848 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Mon, 7 Sep 2020 13:45:47 +0100 Subj

Re: [PATCH] vec: Revert "dead code removal in tree-vect-loop.c" and add a comment.

Richard Sandiford writes: > Andrea Corallo writes: >> Hi Richard, >> >> this reverts the discussed patch and adds what was suggested as a >> comment. >> >> Apologies for the inconvenience, okay for trunk? > > OK, thanks! And sorry for not comme

Re: [PATCH V2] libgccjit: Add new gcc_jit_context_new_blob entry point

Andrea Corallo writes: [...] > Sure it is, thanks for reviewing. > > Attached the updated version of the patch. > > make check-jit is clean plus I tested the new entry point with the > modified Emacs. > > Thanks > > Andrea Ping

Re: [PATCH] libgccjit: Improve doc and comments regarding type casts

Andrea Corallo writes: > Andrea Corallo writes: > >> Hi Alex, >> >> Looking at the code I believe all these casts are meant to be supported >> (read your intuition was correct). >> >> Also IMO source of confusion is that the doc is mentioning 'in

[PATCH] vec: don't select partial vectors when looping on full vectors

rom 'determine_peel_for_niter' to 'vect_need_peeling_or_part_vects_p' so it can be used for this purpose. Bootstrapped and regtested on aarch64-linux-gnu. Feedback is welcome, thanks. Andrea >From fdcceaa420d6c3b03cf22ab50e0f9c393e8e3932 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Da

Re: [PATCH V2] libgccjit: Add new gcc_jit_context_new_blob entry point

Hi Dave, thanks for the review! David Malcolm writes: [...] > Was there a reason for using reinterpret_cast here, rather than > static_cast? Yes the reason is that apparently we can't use static_cast for that: "error: invalid ‘static_cast’ from type ‘gcc_jit_lvalue*’ to type ‘gcc::jit::reco

Re: [PATCH] [arm] Implement Armv8.1-M low overhead loops

str r3, [r0, #4]! addsr3, r3, #1 le lr, .L2 ldr pc, [sp], #4 SMS is disabled in tests not to break them when SMS does loop versioning. bootstrapped arm-none-linux-gnueabihf, do not introduce testsuite regressions. Andrea gcc/ChangeLog: 2020-??-

Re: [PATCH] [arm] Implement Armv8.1-M low overhead loops

Hi Roman, Roman Zhuykov writes: >> SMS is disabled in tests not to break them when SMS does loop versioning. > > And I'm not really sure about this.  First of all, there are a lot of > scan-assembler-times tests which fail when modulo-scheduler is enabled, > probably the same happens when some u

Re: [PATCH] [arm] Implement Armv8.1-M low overhead loops

str r3, [r0, #4]! addsr3, r3, #1 le lr, .L2 ldr pc, [sp], #4 bootstrapped arm-none-linux-gnueabihf, do not introduce testsuite regressions. Andrea gcc/ChangeLog: 2020-??-?? Andrea Corallo Mihail-Calin Ionescu

Re: [PATCH][gcc] libgccjit: introduce version entry points

David Malcolm writes: > On Thu, 2020-01-16 at 11:11 +0000, Andrea Corallo wrote: >> Hi, second version of the patch here cleaning up an unnecessary >> change. >> >> Does not introduce regressions with make check-jit. >> >> Andrea >> >&

Re: [PATCH][gcc] libgccjit: handle long literals in playback::context::new_string_literal

David Malcolm writes: > On Mon, 2019-09-02 at 09:16 +0000, Andrea Corallo wrote: >> Hi all, >> yesterday I've found an interesting bug in libgccjit. >> Seems we have an hard limitation of 200 characters for literal >> strings. >> Attempting to create longer

Re: [PATCH][gcc] libgccjit: introduce version entry points

Hi, thanks for reviewing, I've totally missed this multi-thread aspect. David Malcolm writes: > On Thu, 2020-03-05 at 21:34 -0500, David Malcolm wrote: >> On Thu, 2020-01-16 at 11:11 +, Andrea Corallo wrote: > > Responding to my own ideas about thread-safety. >

Re: [PATCH v2][gcc] libgccjit: handle long literals in playback::context::new_string_literal

Hi all, second version of the patch for the 200 characters limit for literal strings addressing comments. make check-jit is passing clean. Best Regards Andrea gcc/jit/ChangeLog 2020-??-?? Andrea Corallo * jit-playback.h (gcc::jit::playback::context m_recording_ctxt

[PATCH 1/2] [aarch64] Rework fpcr fpsr getter/setter builtins

void __builtin_aarch64_set_fpsr64 (unsigned long long) Regards Andrea gcc/ChangeLog: 2020-??-?? Andrea Corallo * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums for 64bits fpsr/fpcr getter setters builtin variants. (aarch64_init_fpsr_fpcr_builtins)

[PATCH 2/2] [aarch64] Rework fpcr fpsr getter/setter builtins

order to preserve the original high 32 bits of the system register. Both FPSR and FPCR became 64bit regs with armv8.1. Bootstrapped on aarch64-linux-gnu, does not introduce regressions. Regards Andrea gcc/ChangeLog: 2020-??-?? Andrea Corallo * config/aarch64/aarch64.md (insv_reg

Re: [PATCH 2/2] [aarch64] Rework fpcr fpsr getter/setter builtins

Andrea Corallo writes: > Hi all, > > second and last patch of the two reworking FPCR and FPSR builtins. > > This rework __builtin_aarch64_set_fpcr (unsigned) and > __builtin_aarch64_set_fpsr (unsigned) to emit a read-modify-sequences > as: > > mrs x1, fps

Re: [PATCH V3][gcc] libgccjit: introduce version entry points

ll in stage4. As result I've mostly applied the mutex solution. 'make check-jit' runs clean Bests Andrea gcc/jit/ChangeLog 2020-??-?? Andrea Corallo David Malcolm * docs/topics/compatibility.rst (LIBGCCJIT_ABI_13): New ABI tag plus a

Re: [PATCH v2][gcc] libgccjit: handle long literals in playback::context::new_string_literal

Andrea Corallo writes: > Hi all, > > second version of the patch for the 200 characters limit for literal > strings addressing comments. > > make check-jit is passing clean. > > Best Regards > Andrea > > gcc/jit/ChangeLog > 2020-??-?? Andrea Corallo >

[PATCH] Fix ICE PR94144

I (reg:CC 66 cc) (const_int 0 [0]))) was simplified into (ordered:SI (reg:CC 66 cc) (const_int 0 [0])) causing ICE. Bootstrapped on x86_64-linux-gnu and aarch64-unknown-linux-gnu does not introduce testsuite regressions. Andrea gcc/ChangeLog 2020-??-?? Andrea Corall

Re: [committed][gcc] libgccjit: handle long literals in playback::context::new_string_literal

2020-03-23 Andrea Corallo * jit-playback.h (gcc::jit::playback::context m_recording_ctxt): Remove m_char_array_type_node field. * jit-playback.c (playback::context::context) Remove m_char_array_type_node from member initializer list.

Re: [PATCH v4] arm: Implement Armv8.1-M low overhead loops

Andrea Corallo writes: > Andrea Corallo writes: > >> Hi all, >> >> here the latest version of the patch to enable Armv8.1-M Mainline >> LOB (low overhead branch) extension low overhead loops (LOL) feature >> using the 'loop-doloop' pass. >>

Re: [PATCH v4] arm: Implement Armv8.1-M low overhead loops

Kyrylo Tkachov writes: [...] > > Ok. > Thanks for doing this. > Kyrill Hi Kyrill, installed into trunk as d2ed233cb940. Thanks Andrea

Re: [PATCH] libgccjit: Add new gcc_jit_context_new_blob entry point

Andrea Corallo writes: > Andrea Corallo writes: > >>> It occurred to me that the entrypoint is combining two things: >>> - creating a global char[] >>> - creating an initializer for that global >>> >>> which got me wondering if we should ins

[committed] build: Fix 'make TAGS' in gcc/

Hi all, the following simple patch fixes 'make TAGS' for gcc/ Wasn't working because still searching for params.def. Committed as obvious fix. Regards Andrea gcc/ChangeLog: 2020-07-16 Andrea Corallo * Makefile.in (TAGS): Remove 

Re: [PATCH][GCC][aarch64] Generation of adjusted ldp/stp for vector types

Przemyslaw Wirkus writes: > diff --git a/gcc/testsuite/gcc.target/aarch64/ldp_vec_v2sf.c > b/gcc/testsuite/gcc.target/aarch64/ldp_vec_v2sf.c > new file mode 100644 > index > ..fbdae1c6cff1aef40db644361381ce511f0be64a > --- /dev/null > +++ b/gcc/testsuite/

Re: [PATCH][GCC][aarch64] Generation of adjusted ldp/stp for vector types

Richard Sandiford writes: > Yeah, that's certainly true for code in the compiler itself. Tests > kind-of get a pass stylewise though. It would be bad if everything in > the testsuite used GNU style, since then we'd never test anything else. ;-) LOL, good to know thanks Andrea

Re: [PATCH] libgccjit: Handle truncation and extension for casts [PR 95498]

Hi Antoni, a couple of nits and some thoughts. Antoni Boucher via Gcc-patches writes: > 2020-07-12 Antoni Boucher > > gcc/jit/ > PR target/95498 > * jit-playback.c: Add support to handle truncation and extension ^^^ here we usually a

[PATCH] libgccjit: Improve doc and comments regarding type casts (Was: Clarifying the permitted type conversions)

documenting what do we accept, and I guess we should just consider bugs if some of these conversions is not handled correctly or leads to ICE. Bests Andrea gcc/jit/ChangeLog 2020-07-21 Andrea Corallo * docs/_build/texinfo/libgccjit.texi (Type-coercion): Improve doc on allowed

[PATCH 1/2] Add new RTX instruction class FILLER_INSN

ssive eating of nops. It was deemed that a new RTX class was less invasive than modifying behavior in regards to standard UNSPEC nops. 1/2 is requirement for 2/2. Please see this the cover letter of this last for more details on the pass itself. Regards Andrea gcc/ChangeLog 2020-07-17 Andrea Co

[PATCH 2/2] Aarch64: Add branch diluter pass

cessful compilation of 3 stage bootstrap with the pass forced on (for stage 2, 3) - No additional compilation failures (SPEC CPU 2006 and SPEC CPU 2017) - No 'make check' regressions Regards Andrea gcc/ChangeLog 2020-07-17 Andrea Corallo Carey Williams *

Re: [PATCH 2/2] Aarch64: Add branch diluter pass

Hi Andrew, thanks for reviewing I'll work on your comments. Just replying to the high level questions. Andrew Pinski writes: > On Wed, Jul 22, 2020 at 3:10 AM Andrea Corallo wrote: >> >> Hi all, >> >> this second patch implements the AArch64 specific b

Re: [PATCH 1/2] Add new RTX instruction class FILLER_INSN

Richard Biener writes: > I wonder if such effect of instructions on the pipeline can be modeled > in the DFA and thus whether the scheduler could issue (always ready) > NOPs? I might be wrong but the DFA model should be reasoning in terms of executed instructions given an execution path, on the

Re: [PATCH 2/2] Aarch64: Add branch diluter pass

Segher Boessenkool writes: > Hi! > > On Wed, Jul 22, 2020 at 03:53:34PM +0200, Andrea Corallo wrote: >> Andrew Pinski writes: >> > Can you give a simple example of what this patch does? >> >> Sure, this pass simply moves a sliding window over the insns tryin

Re: [PATCH 2/2] Aarch64: Add branch diluter pass

Segher Boessenkool writes: > On Wed, Jul 22, 2020 at 09:45:08PM +0200, Andrea Corallo wrote: >> > Should that actually be a sliding window, or should there actually just >> > not be more than N branches per aligned block of machine code? Like, >> > per fetch gr

Re: [PATCH 2/2] Aarch64: Add branch diluter pass

Segher Boessenkool writes: > Hi! > > On Fri, Jul 24, 2020 at 09:01:33AM +0200, Andrea Corallo wrote: >> Segher Boessenkool writes: >> >> Correct, it's a sliding window only because the real load address is not >> >> known to the compiler and

Re: [PATCH 2/2] Aarch64: Add branch diluter pass

ss sure if text/x-diff is such and insane mime type for a mailing list software :) ] > On Wed, Jul 22, 2020 at 12:09:08PM +0200, Andrea Corallo wrote: >> this second patch implements the AArch64 specific back-end pass >> 'branch-dilution' controllable by the followings comm

Re: [PATCH 1/2] Add new RTX instruction class FILLER_INSN

Segher Boessenkool writes: > Hi Andrea, > > On Wed, Jul 22, 2020 at 12:02:33PM +0200, Andrea Corallo wrote: >> This first patch implements the addition of a new RTX instruction class >> FILLER_INSN, which has been white listed to allow placement of NOPs >> outside of

[PATCH] Aarch64: Add missing clobber for fjcvtzs

a [1] https://developer.arm.com/docs/ddi0596/latest/simd-and-floating-point-instructions-alphabetic-order/fjcvtzs-floating-point-javascript-convert-to-signed-fixed-point-rounding-toward-zero gcc/ChangeLog 2020-07-30 Andrea Corallo * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add mi

Re: [PATCH] libgccjit: Add new gcc_jit_context_new_blob entry point

t num_bytes); 'global' must be an array but in the seek of generality it now supports all the various integral types and is not limited to char[]. As you anticipated the implementation I came up is currently not safe for cross-compilation, not sure is requirement tho. make check-jit is cle

Re: [PATCH] Aarch64: Add missing clobber for fjcvtzs

gcc/ChangeLog 2020-07-30 Andrea Corallo * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing clobber. gcc/testsuite/ChangeLog 2020-07-30 Andrea Corallo * gcc.target/aarch64/acle/jcvt_2.c: New testcase. * lib/target-support

Re: [PATCH] Aarch64: Add missing clobber for fjcvtzs

hat. The attached is committed into master as d2b86e14c14. Andrea >From d2b86e14c14020f3e119ab8f462e2a91bd7d46e5 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Wed, 29 Jul 2020 19:04:40 +0200 Subject: [PATCH] aarch64: Add missing clobber for fjcvtzs gcc/ChangeLog 2020-07-30 Andrea Cor

Re: [PATCH] Aarch64: Add missing clobber for fjcvtzs

Andrea Corallo writes: > Hi Kyrill, > > thanks for catching that. > > The attached is committed into master as d2b86e14c14. > > Andrea And backported in releases/gcc-10 as e5907f3b631. Andrea

[PATCH PR96375] arm: Fix testcase selection for Low Overhead Loop tests

oduce regressions in my testing and fix the reported one according to Christophe (in Cc). Okay for trunk? Thanks Andrea 2020-07-31 Andrea Corallo * gcc.target/arm/lob1.c: Fix missing flag. * gcc.target/arm/lob2.c: Likewise. * gcc.target/arm/lob3.c: Lik

Re: [PATCH] libgccjit: Improve doc and comments regarding type casts

Andrea Corallo writes: > Hi Alex, > > Looking at the code I believe all these casts are meant to be supported > (read your intuition was correct). > > Also IMO source of confusion is that the doc is mentioning 'int' and > 'float' but I believe wo

Re: [PATCH V3][gcc] libgccjit: introduce version entry points

David Malcolm writes: > On Wed, 2020-03-18 at 23:51 +0100, Andrea Corallo wrote: > Please add the new test to the header in its alphabetical location, > i.e. between: > > /* test-vector-types.cc: We don't use this, since it's C++. */ > > and > > /* test-

Re: [PATCH V3][gcc] libgccjit: introduce version entry points

David Malcolm writes: > Andrea: I've pushed my proposed fix for the above to master as > 3809bcd6c0ee324cbd855c68cee104c8bf134dbe. Does this fix the issue you > were seeing? > > Thanks > Dave Hi, yes super! I'll update the patch thanks. Andrea

Re: [PATCH 2/2] [aarch64] Rework fpcr fpsr getter/setter builtins

Richard Earnshaw writes: > On 17/03/2020 12:34, Wilco Dijkstra wrote: >> Hi Andrea, >> I think the first part is fine when approved, but the 2nd part is >> problematic like Szabolcs >> already pointed out. We can't just change the ABI or semantics, and these >> builtins are critical >> for GLIBC

[PATCH V4][gcc] libgccjit: introduce version entry points

Hi all, Updated version of the patch addressing last comments. Regression clean, okay to apply? Bests Andrea gcc/jit/ChangeLog 2020-??-?? Andrea Corallo David Malcolm * docs/topics/compatibility.rst (LIBGCCJIT_ABI_13): New ABI tag plus add version paragraph

Re: [PATCH V4][gcc] libgccjit: introduce version entry points

David Malcolm writes: > On Tue, 2020-03-31 at 14:05 +0200, Andrea Corallo wrote: >> Hi all, >> >> Updated version of the patch addressing last comments. > > Thanks. > >> Regression clean, okay to apply? > > OK Committed as 63b2923dc6f5. Thanks Andrea

[PATCH]libstdc++-v3/test: Skip "use_service.cc" for aarch64 baremetal

ssue is tackled would be possible to install this patch to have it disabled on aarch64 baremetal where it is known to be failing? Thanks Andrea libstdc++-v3/ChangeLog 2020-??-?? Andrea Corallo * testsuite/experimental/net/execution_context/use_service.cc: Skip on aarch64-

Re: [PATCH]libstdc++-v3/test: Skip "use_service.cc" for aarch64 baremetal

Jonathan Wakely writes: > On 01/04/20 16:56 +0100, Jonathan Wakely wrote: > Does that help, or does it still fail for other reasons? Yes it does thanks! Updated patch follows. Okay for trunk? Thanks Andrea libstdc++-v3/ChangeLog 2020-??-?? Andrea Corallo * tes

Re: [PATCH]libstdc++-v3/test: Skip "use_service.cc" for aarch64 baremetal

Jonathan Wakely writes: > On 02/04/20 10:44 +0200, Andrea Corallo wrote: >>Jonathan Wakely writes: >> >>> On 01/04/20 16:56 +0100, Jonathan Wakely wrote: >> >>> Does that help, or does it still fail for other reasons? >> >>Yes it does thanks!

[PATCH] PR target/48240

Hi all, I'd like to submit this for PR48240. Bootstrapped on aarch64-unknown-linux-gnu. Okay for trunk when finished with regression? Andrea gcc/ChangeLog 2020-??-?? Andrea Corallo PR target/48240 * gcc/config/aarch64/falkor-tag-collision-avoidance.c (valid_

Re: [PATCH] PR target/48240

Richard Sandiford writes: > Andrea Corallo writes: >> Hi all, >> >> I'd like to submit this for PR48240. >> >> Bootstrapped on aarch64-unknown-linux-gnu. >> Okay for trunk when finished with regression? > > OK, but the PR number looks like a

Re: [PATCH] PR target/48240

Kyrylo Tkachov writes: > diff --git a/gcc/config/aarch64/falkor-tag-collision-avoidance.c > b/gcc/config/aarch64/falkor-tag-collision-avoidance.c > index 719df484ee61..4e07a43282f7 100644 > --- a/gcc/config/aarch64/falkor-tag-collision-avoidance.c > +++ b/gcc/config/aarch64/falkor-tag-collision-

[committed] PR target/94530 (was [PATCH] PR target/48240)

Hi all, Second version of the patch for PR94530 (pr num fixed) addressing comments. Bootstrapped on aarch64-unknown-linux-gnu. Committed. Andrea gcc/ChangeLog 2020-04-09 Andrea Corallo PR target/pr94530 * config/aarch64/falkor-tag-collision-avoidance.c

[PATCH]aarch64: falkor-tag-collision-avoidance.c fix valid_src_p for use of uninitialized value

r field in aarch64_classify_address for safeness. gcc/ChangeLog 2020-??-?? Andrea Corallo * config/aarch64/falkor-tag-collision-avoidance.c (valid_src_p): Check for aarch64_address_info type before accessing base field. >From 4af5bb32cd88bb4e65591207839fb0e276b2eb23 Mon

Re: [PATCH]aarch64: falkor-tag-collision-avoidance.c fix valid_src_p for use of uninitialized value

Kyrylo Tkachov writes: > - if (!REG_P (addr.base)) > + if (addr.type == ADDRESS_SYMBOLIC || !REG_P (addr.base)) > return false; > > Hmm, given that the code below only handles the ADDRESS_REG_* forms, how > about we get defensive here and check that addr.type is not one of > ADDRESS_REG

Re: [PATCH V2]aarch64: falkor-tag-collision-avoidance.c fix valid_src_p for use of uninitialized value

Hi all, Second version of this addressing comments. Bootstraped on aarch64 and regressioned. Okay for trunk? Andrea gcc/ChangeLog 2020-??-?? Andrea Corallo * config/aarch64/falkor-tag-collision-avoidance.c (valid_src_p): Check for aarch64_address_info type before

Re: [PATCH V2]aarch64: falkor-tag-collision-avoidance.c fix valid_src_p for use of uninitialized value

Kyrylo Tkachov writes: > Hi Andrea, > >> -Original Message----- >> From: Andrea Corallo >> Sent: 15 April 2020 09:47 >> To: Kyrylo Tkachov >> Cc: nd ; gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH V2]aarch64: falkor-tag-collision-avoidance.c f

Re: [PATCH V2]aarch64: falkor-tag-collision-avoidance.c fix valid_src_p for use of uninitialized value

gcc/ChangeLog 2020-??-?? Andrea Corallo * config/aarch64/falkor-tag-collision-avoidance.c (valid_src_p): Check for aarch64_address_info type before accessing base field. gcc/testsuite/ChangeLog 2020-??-?? Andrea Corallo * gcc.target/aarch64/pr94530.c: New

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