Hi,
Applied https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02155.html on
embedded-5-branch using included patch at revision r234589.
*** gcc/ ***
2016-03-30 Andre Vieira
Thomas Preud'homme
* config/arm/arm-builtins.c (arm_builtins): D
On 18/03/16 10:34, Andre Vieira (lists) wrote:
> On 21/10/15 16:59, Jeff Law wrote:
>> On 10/21/2015 09:52 AM, Alan Lawrence wrote:
>>> gcc.dg/tree-ssa/sra-12.c is skipped on a bunch of targets, including
>>> AArch64,
>>> because the default max-scalarization-si
On 17/03/16 16:33, Andre Vieira (lists) wrote:
> On 23/10/15 12:31, Bernd Schmidt wrote:
>> On 10/12/2015 11:58 AM, Ulrich Weigand wrote:
>>>
>>> Index: gcc/configure.ac
>>> ===
>>
Hi,
I have added myself to the "Write After Approval" maintainers list.
Committed revision r234902.
Cheers,
Andre
ChangeLog:
2016-04-12 Andre Vieira
* MAINTAINERS (Write After Approval): Add myself.
Index:
On 27/05/16 15:51, Ulrich Weigand wrote:
> Andre Vieira (lists) wrote:
>> On 07/04/16 10:30, Andre Vieira (lists) wrote:
>>> On 17/03/16 16:33, Andre Vieira (lists) wrote:
>>>> On 23/10/15 12:31, Bernd Schmidt wrote:
>>>>> On 10/12/2015 11:58 AM, U
On 26/08/16 18:56, Tim Shen wrote:
>>
>> Adding '#include ' to
>> 'include/c++/7.0.0/variant' "fixes" that. Not sure its the right
>> approach though.
>
> Why not?
>
I'm not saying its the wrong approach, I'm just saying thats the first
thing I tried and it "seemed" to solve it but I didnt really
On 30/08/16 09:01, Andre Vieira (lists) wrote:
> On 11/08/16 15:13, Andre Vieira (lists) wrote:
>> On 25/07/16 11:52, Andre Vieira (lists) wrote:
>>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>>> On 07/07/16 13:30, mickael guene wrote:
>>>>> Hi
On 22/09/16 14:52, Richard Earnshaw (lists) wrote:
> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>> On 07/07/16 13:30, mickael guene wrote:
>>> Hi Andre,
>>>
>>> Another feedback on your purecode patch.
>>> You have to disable casesi pattern si
On 22/09/16 16:28, Richard Earnshaw (lists) wrote:
> On 22/09/16 16:04, Andre Vieira (lists) wrote:
>>
>> I reworked the patch according to the comments above.
>>
>> Is this OK?
>>
>> gcc/ChangeLog:
>> 2016-09-22 Andre Vieira
>>
On 23/09/16 02:21, Sandra Loosemore wrote:
> On 09/22/2016 07:52 AM, Richard Earnshaw (lists) wrote:
>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>> +
>>> diff --git a/gcc/target.def b/gcc/target.def
>>> index
>>
On 23/09/16 11:04, Jakub Jelinek wrote:
> On Thu, Sep 22, 2016 at 10:37:21PM +0200, Uros Bizjak wrote:
>> diff --git a/gcc/hooks.c b/gcc/hooks.c
>> index
>> 99ec4014adb6fcbb073bf538dd00fe8695ee6cb2..1e925645c3173f8d97e104b9b2f480fca2ede438
>> 100644
>> --- a/gcc/hooks.c
>> +++ b/gcc/hooks.c
>> @@
On 23/09/16 09:33, Andre Vieira (lists) wrote:
> On 23/09/16 02:21, Sandra Loosemore wrote:
>> On 09/22/2016 07:52 AM, Richard Earnshaw (lists) wrote:
>>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>>> +
>>>> diff --git a/
On 22/09/16 16:04, Andre Vieira (lists) wrote:
> On 22/09/16 14:52, Richard Earnshaw (lists) wrote:
>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>> On 07/07/16 13:30, mickael guene wrote:
>>>> Hi Andre,
>>>>
>>>> Another feedback on
Hi Jonathan,
On 27/09/16 16:11, Jonathan Wakely wrote:
>
> The test might not be very good, but tests some small integer values
> and some other values where accuracy is lost for one or other of the
> alternative implementations mentioned above. If this FAILs for some
> 32-bit targets we might ne
On 04/10/16 14:24, mickael guene wrote:
> Hi Andre,
>
> I can't see new testsuite files in trunk :
> gcc.target/arm/pure-code/ffunction-sections.c
> gcc.target/arm/pure-code/no-literal-pool.c
> gcc.target/arm/pure-code/pure-code.exp
>
> It seems you forgot to include them in your patch.
> Can y
2016-10-06 Andre Vieira
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer take cost into consideration
if 'arm_disable_literal_pool' is enabled.
(32-bit const split): Remove SImode from constant, which was
not all
target_cortex_m'.
Is this OK for trunk?
Ran these tests for a ARMv7-A.
Cheers,
Andre
gcc/testsuite/ChangeLog:
2016-10-14 Andre Vieira
* gcc.target/arm/pure-code/pure-code.exp: Adjust targets to test for.
>From a5f9063dd8e3c6405c40a7e99d0bf322dc6d58a9 Mon Sep 17 00:00:00 2001
On 09/09/16 15:32, Andre Vieira (lists) wrote:
> On 27/05/16 15:51, Ulrich Weigand wrote:
>> Andre Vieira (lists) wrote:
>>> On 07/04/16 10:30, Andre Vieira (lists) wrote:
>>>> On 17/03/16 16:33, Andre Vieira (lists) wrote:
>>>>> On 23/10/15 12:31, Be
On 13/10/16 20:34, Jason Merrill wrote:
> On Tue, Oct 11, 2016 at 9:39 AM, Jakub Jelinek wrote:
>
>> And, as mentioned in the DWARF mailing list, I think we should emit
>> DW_AT_inline on the inline vars (both explicit and implicit - static
>> constexpr data members in C++17 mode). I hope that
On 06/10/16 14:57, Andre Vieira (lists) wrote:
> Hello,
>
> This patch tackles the issue reported in PR71607. This patch takes a
> different approach for disabling the creation of literal pools. Instead
> of disabling the patterns that would normally transform the rtl into
> ac
Hello,
I noticed I forgot to restore the changed global values in
pure-code.exp. Failing to restore them could influence subsequent testing.
Committed this as obvious in revision r241466.
Cheers,
Andre
gcc/testsuite/ChangeLog:
2016-10-24 Andre Vieira
* gcc.target/arm/pure-code
On 21/10/16 16:14, Jakub Jelinek wrote:
> On Fri, Oct 21, 2016 at 03:57:34PM +0100, Yao Qi wrote:
>> Hi Jakub,
>>
>> On Thu, Oct 20, 2016 at 5:21 PM, Andre Vieira (lists)
>> wrote:
>>> <2><8f5>: Abbrev Number: 38 (DW_TAG_member)
>>&
On 24/08/16 12:00, Andre Vieira (lists) wrote:
> On 25/07/16 14:19, Andre Vieira (lists) wrote:
>> This patch adds the support of the '-mcmse' option to enable ARMv8-M's
>> Security Extensions and supports the following intrinsics:
>> cmse_TT
>>
On 24/08/16 12:00, Andre Vieira (lists) wrote:
> On 25/07/16 14:21, Andre Vieira (lists) wrote:
>> This patch adds support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_entry' attribute. In this patch we implement the
>> attribute handling and diagnosis ar
On 25/07/16 14:23, Andre Vieira (lists) wrote:
> This patch extends support for the ARMv8-M Security Extensions
> 'cmse_nonsecure_entry' attribute in two ways:
>
> 1) Generate two labels for the function, the regular function name and
> one with the function's name
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>> This patch extends support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_entry' attribute to safeguard against leak of
>> information through unbanked registe
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:25, Andre Vieira (lists) wrote:
>> This patch adds support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_call' attribute. This attribute may only be used for
>> function types and when used
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:26, Andre Vieira (lists) wrote:
>> This patch extends support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_call' to use a new library function
>> '__gnu_cmse_nonsecure_call'.
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:28, Andre Vieira (lists) wrote:
>> This patch adds support ARMv8-M's Security Extension's
>> cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether
>> an entry function was called
On 26/10/16 13:51, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 25/10/16 17:29, Andre Vieira (lists) wrote:
>> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>>> This patch extends support
On 26/10/16 10:33, Kyrill Tkachov wrote:
>
> +static tree
> +arm_handle_cmse_nonsecure_entry (tree *node, tree name,
> + tree /* args */,
> + int /* flags */,
> + bool *no_add_attrs)
> +{
> + tree fndecl;
> +
> + if (!use_cmse)
> +{
> + *n
On 26/10/16 14:00, Kyrill Tkachov wrote:
>
> On 26/10/16 10:12, Kyrill Tkachov wrote:
>> Hi Andre, thanks for resending them.
>>
>> On 25/10/16 17:26, Andre Vieira (lists) wrote:
>>> On 24/08/16 12:00, Andre Vieira (lists) wrote:
>>>> On 25/07/16
On 26/10/16 17:28, Kyrill Tkachov wrote:
>
> On 26/10/16 17:28, Andre Vieira (lists) wrote:
>> On 26/10/16 10:33, Kyrill Tkachov wrote:
>>> +static tree
>>> +arm_handle_cmse_nonsecure_entry (tree *node, tree name,
>>> + tree /* args
On 26/10/16 11:03, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 25/10/16 17:28, Andre Vieira (lists) wrote:
>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>> This patch extends support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_entry' att
On 26/10/16 17:30, Kyrill Tkachov wrote:
>
> On 26/10/16 17:26, Andre Vieira (lists) wrote:
>> On 26/10/16 13:51, Kyrill Tkachov wrote:
>>> Hi Andre,
>>>
>>> On 25/10/16 17:29, Andre Vieira (lists) wrote:
>>>> On 24/08/16 12:01, Andre Vieira (
On 25/10/16 17:29, Andre Vieira (lists) wrote:
> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>> On 25/07/16 14:25, Andre Vieira (lists) wrote:
>>> This patch adds support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_call' attribute. This attrib
On 25/10/16 17:30, Andre Vieira (lists) wrote:
> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>> On 25/07/16 14:26, Andre Vieira (lists) wrote:
>>> This patch extends support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_cal
On 27/10/16 11:44, Kyrill Tkachov wrote:
>
> On 27/10/16 11:00, Andre Vieira (lists) wrote:
>> On 26/10/16 17:30, Kyrill Tkachov wrote:
>>> On 26/10/16 17:26, Andre Vieira (lists) wrote:
>>>> On 26/10/16 13:51, Kyrill Tkachov wrote:
>>>>> Hi An
with a Cortex-M3 target.
gcc/ChangeLog:
2016-06-30 Andre Vieira
Terry Guo
* target.def (elf_flags_numeric): New target hook.
* targhooks.h (default_asm_elf_flags_numeric): New.
* varasm.c (default_asm_elf_flags_numeric): New.
(default_elf
On 01/07/16 14:40, Ramana Radhakrishnan wrote:
>
>
> On 13/10/15 18:01, Andre Vieira wrote:
>> This patch ports the aeabi_idiv routine from Linaro Cortex-Strings
>> (https://git.linaro.org/toolchain/cortex-strings.git), which was contributed
>> by ARM under Free
x, PC, #offset') which will not work in our
> case since 'Lx' label is put in an .rodata section.
> So offset value is unknown and can be impossible
> to encode correctly.
>
> Regards
> Mickael
>
> On 06/30/2016 04:32 PM, Andre Vieira (lists) wrote:
>>
On 06/07/16 11:52, Andre Vieira (lists) wrote:
> On 01/07/16 14:40, Ramana Radhakrishnan wrote:
>>
>>
>> On 13/10/15 18:01, Andre Vieira wrote:
>>> This patch ports the aeabi_idiv routine from Linaro Cortex-Strings
>>> (https://git.linaro.org/t
On 11/07/16 18:09, Andre Vieira (lists) wrote:
> On 06/07/16 11:52, Andre Vieira (lists) wrote:
>> On 01/07/16 14:40, Ramana Radhakrishnan wrote:
>>>
>>>
>>> On 13/10/15 18:01, Andre Vieira wrote:
>>>> This patch ports the aeabi_idiv routine from Lin
On 11/07/16 17:56, Andre Vieira (lists) wrote:
> On 07/07/16 13:30, mickael guene wrote:
>> Hi Andre,
>>
>> Another feedback on your purecode patch.
>> You have to disable casesi pattern since then it will
>> generate wrong code with -mpure-code option.
>&
k for
cmse_nonsecure_{call,entry} functions,
- only test Security Extensions for -mfpu=fpv5-d16 and fpv5-sp-d16 and
only support single and double precision FPU's with d16.
Bootstrapped and tested on arm-none-linux-gnueabihf and tested on
arm-none-eabi with ARMv8-M Baseline and Mainline targets.
Andre
* gcc/ChangeLog ***
2016-07-25 Andre Vieira
Thomas Preud'homme
* config.gcc (extra_headers): Added arm_cmse.h.
* config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
ecm0359818/index.html).
*** gcc/ChangeLog ***
2016-07-25 Andre Vieira
Thomas Preud'homme
* config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_nonsecure_entry
(arm_compute_func_type): Handle cmse_
e a secure gateway veneer for this entry function.
2) Return from cmse_nonsecure_entry marked functions using bxns.
See Section 5.4 of ARM®v8-M Security Extensions
(http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2016-07-25 Andre Vieira
and union return types. For unions a bit is only considered
a padding bit if it is an unused bit in every field of that union. The
function that calculates these is used in a later patch to do the same
for arguments of cmse_nonsecure_call's.
*** gcc/ChangeLog ***
2016-07-2
r.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
We currently do not support cmse_nonsecure_call functions that pass
arguments or return variables on the stack and we diagnose this.
*** gcc/ChangeLog ***
2016-07-25 Andre Vieira
Thomas Preud'homme
* con
e bits' clearing and floating
point registers (single/double precision) all depends on the multilib used.
See Section 5.5 of ARM®v8-M Security Extensions
(http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2016-07-25 Andre Vieira
ation does mention that such a diagnostic might become
mandatory, so I might have to pick this up later, otherwise it is left
as a potential extra feature.
*** gcc/ChangeLog ***
2016-07-25 Andre Vieira
Thomas Preud'homme
* config/arm/ar
On 17/11/16 10:00, Ramana Radhakrishnan wrote:
> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
> wrote:
>> Hello,
>>
>> This patch tackles the issue reported in PR71607. This patch takes a
>> different approach for disabling the creation of literal pool
On 21/11/16 08:42, Christophe Lyon wrote:
> Hi,
>
>
> On 17 November 2016 at 11:45, Kyrill Tkachov
> wrote:
>>
>> On 17/11/16 10:31, Andre Vieira (lists) wrote:
>>>
>>> Hi Kyrill,
>>>
>>> On 17/11/16 10:11, Kyrill Tkachov wrote
On 29/11/16 10:37, Kyrill Tkachov wrote:
>
> On 29/11/16 10:35, Andre Vieira (lists) wrote:
>> On 21/11/16 08:42, Christophe Lyon wrote:
>>> Hi,
>>>
>>>
>>> On 17 November 2016 at 11:45, Kyrill Tkachov
>>> wrote:
>>>> On 17/11/
the
ARM implementation of TARGET_COMP_TYPE_ATTRIBUTES, deny compatibility
between function types with the attribute and without.
I added a test case to test the issue solved with these changes.
*** gcc/ChangeLog ***
2016-11-xx Andre Vieira
Thomas Preud'homme
* config/arm/a
Hi,
I changed the testcase with this patch since the old testcase was
casting a function pointer to another function pointer and using that
pointer to call the function. This is undefined behavior. The new test
reflects a more sane use of the intrinsics.
Cheers,
Andre
diff --git a/gcc/config/arm/
On 23/11/16 11:52, Andre Vieira (lists) wrote:
> Hi,
>
> After some extra testing I realized there was an issue with the way we
> were clearing registers when returning from a cmse_nonsecure_entry
> function for ARMv8-M.Baseline. This patch fixes that and changes the
> tes
On 17/11/16 10:42, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> Refactor NEON builtin framework such that it can be used to implement
>> other builtins.
>>
>> Is this OK for trunk?
>>
>
On 09/11/16 10:11, Andre Vieira (lists) wrote:
> Hi,
>
> This patch refactors the implementation of the ARM ACLE CRC builtins to
> use the builtin framework.
>
> Is this OK for trunk?
>
> Regards,
> Andre
>
> gcc/ChangeLog
> 2016-11-09 Andre Vieira
On 23/11/16 11:53, Andre Vieira (lists) wrote:
> On 11/11/16 16:19, Kyrill Tkachov wrote:
>> And CC'ing Ramana and Richard this time...
>>
>
> Hi,
>
> After some extra testing I found that the sibcall optimization was not
> disabled for calls to function po
On 02/12/16 21:16, Jeff Law wrote:
>
> Trying to build arm-netbsdelf:
>
> g++ -fno-PIE -c -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE
> -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall
> -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute
> -Woverloaded-virtual
On 27/10/16 11:01, Kyrill Tkachov wrote:
>
> On 27/10/16 10:53, Andre Vieira (lists) wrote:
>> On 26/10/16 14:00, Kyrill Tkachov wrote:
>>> On 26/10/16 10:12, Kyrill Tkachov wrote:
>>>> Hi Andre, thanks for resending them.
>>>>
>>>> On 25/1
On 27/10/16 11:19, Kyrill Tkachov wrote:
>
> On 27/10/16 10:54, Andre Vieira (lists) wrote:
>> On 26/10/16 17:28, Kyrill Tkachov wrote:
>>> On 26/10/16 17:28, Andre Vieira (lists) wrote:
>>>> On 26/10/16 10:33, Kyrill Tkachov wrote:
>>>>> +static t
On 27/10/16 10:55, Andre Vieira (lists) wrote:
> On 26/10/16 11:03, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 25/10/16 17:28, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>>> This patch extends s
On 30/11/16 17:22, Kyrill Tkachov wrote:
>
> On 30/11/16 15:32, Andre Vieira (lists) wrote:
>> On 23/11/16 11:52, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> After some extra testing I realized there was an issue with the way we
>>&g
On 30/11/16 17:22, Kyrill Tkachov wrote:
>
> On 30/11/16 12:05, Andre Vieira (lists) wrote:
>> Hi,
>>
>> I got a bug report against the old version of this patch and fixed it
>> here. This had to do with GCC optimizations sharing types with and
>> without the &
On 02/12/16 13:41, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 02/12/16 13:36, Andre Vieira (lists) wrote:
>> On 23/11/16 11:53, Andre Vieira (lists) wrote:
>>> On 11/11/16 16:19, Kyrill Tkachov wrote:
>>>> And CC'ing Ramana and Richard this time...
>&g
On 30/11/16 12:06, Andre Vieira (lists) wrote:
> Hi,
>
> I changed the testcase with this patch since the old testcase was
> casting a function pointer to another function pointer and using that
> pointer to call the function. This is undefined behavior. The new test
> reflects
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>> use the builtin framework.
>>
>> Is this OK for trunk?
>>
>>
e-space fixes.
>> (arm_expand_neon_builtin): Move code into the standalone function
>> arm_expand_neon_builtin_1.
>>
>
Hi,
Backported this to embedded-6-branch in revision r.
gcc/ChangeLog.arm:
2016-12-05 Andre Vieira
Backport fr
On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 17/11/16 10:42, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> Refactor NEON builtin framework such that it can be used to implement
On 05/12/16 15:05, Andre Vieira (lists) wrote:
> On 01/12/16 17:25, Andre Vieira (lists) wrote:
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>>> use the bu
On 09/11/16 10:11, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor CDP
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor LDC and STC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 05/12/16 11:52, Andre Vieira (lists) wrote:
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
>> intrinsics. See below a table mapping the intrinsics to their
On 29/11/16 09:45, Andre Vieira (lists) wrote:
> On 17/11/16 10:00, Ramana Radhakrishnan wrote:
>> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
>> wrote:
>>> Hello,
>>>
>>> This patch tackles the issue reported in PR71607. This patch takes
on arm-none-eabi.
Is this OK for trunk?
Cheers,
Andre
gcc/ChangeLog
2016-12-09 Andre Vieira
PR rtl-optimization/78255
* gcc/postreload.c (reload_cse_simplify): Do not CSE a function if
NO_FUNCTION_CSE is true.
gcc/testsuite/ChangeLog:
2016-12-09 Andre Vieira
On 09/12/16 15:02, Bernd Schmidt wrote:
> On 12/09/2016 03:03 PM, Andre Vieira (lists) wrote:
>> This patch fixes the issue reported in PR78255 by making postreload
>> aware it should not be performing CSE on functions if NO_FUNCTION_CSE is
>> defined to true.
>>
>&
On 09/12/16 16:02, Ramana Radhakrishnan wrote:
> On Fri, Dec 9, 2016 at 3:58 PM, Bernd Schmidt wrote:
>> On 12/09/2016 04:34 PM, Andre Vieira (lists) wrote:
>>
>>> Regardless, the other testcases I add in this patch show a sub-optimal
>>> transformation done by
Hi
I backported this patch to the embedded-6-branch in revision r243496.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-12-09 Andre Vieira
Backport from mainline
2016-12-09 Andre Vieira
PR rtl-optimization/78255
* gcc/postreload.c (reload_cse_simplify): Do not CSE
On 21/06/16 15:16, Andre Vieira (lists) wrote:
> Hello,
>
> After some changes to GCC this test no longer tests the desired code
> generation behavior. The generated assembly is better than it used to
> be, but it has become too smart. I add an extra parameter to make sure
>
Hi,
It seems I backported the wrong versions of the testcases to
embedded-6-branch. Fixed them with this patch.
Cheers,
Andre
gcc/testsuite/ChangeLog.arm:
2016-12-14 Andre Vieira
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Fix testsuite.
* gcc.target/arm/cmse/mainline/hard/cmse
will be changing the patch for trunk to reflect these findings, even
though this did not show up during trunk testing.
Tested with various arm-none-eabi configurations: -mcpu=cortex-m0/m3/m7
and -march=armv8-m.baseline.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-12-14 Andre Vieira
* confi
'bl?' rather than 'b'.
The test is really to make sure a direct call is not turned into an
indirect call.
gcc/testsuite/ChangeLog:
2016-12-20 Andre Vieira
* gcc.target/arm/pr78255-2.c: Fix to work for targets
that do not optimize for tailcall.
diff --git a/gcc/testsu
On 20/04/16 18:40, Jonathan Wakely wrote:
> On 19/04/16 19:07 +0100, Jonathan Wakely wrote:
>> This was reported as a bug in the Filesystem library, but it's
>> actually a problem in the codecvt_utf8 facet that it uses.
>
> The fix had a silly typo meaning it didn't work for big endian
> targets,
Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0.
Might be worth mentioning that this patch has been used in three
releases of the GNU ARM embedded toolchain, using GCC versions 4.9 and
5, and no issues have been reported so far.
On 25/01/16 17:15, Andre Vieira (lists
Hi,
I backported this
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02196.html to the
embedded-6-branch. Tested on arm-none-eabi.
Committed in revision r241960.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-11-08 Andre Vieira
Backport from mainline
2016-05-27 Ulrich Weigand
On 21/10/16 09:55, Andre Vieira (lists) wrote:
> On 06/10/16 14:57, Andre Vieira (lists) wrote:
>> Hello,
>>
>> This patch tackles the issue reported in PR71607. This patch takes a
>> different approach for disabling the creation of literal pools. Instead
>> of
Hi,
Backported the support for the ARM -mpure-code option, including the
follow-up fixes to the embedded-6-branch. Tested for arm-none-eabi.
Committed in revision r241970.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-11-08 Andre Vieira
Backport from mainline
2016-09-23 Uros Bizjak
for arm-none-eabi and ran the
acle.exp tests for a Cortex-M3.
(6) Andre Vieira
Refactor NEON builtin framework to work for other builtins
Move CRC builtins to refactored framework
Implement support for ACLE Coprocessor CDP intrinsics
Implement support for ACLE Coprocessor LDC and STC intrinsics
Hi,
Refactor NEON builtin framework such that it can be used to implement
other builtins.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog
2016-11-09 Andre Vieira
* config/arm/arm-builtins.c (neon_builtin_datum): Rename to ..
(arm_builtin_datum): ... this
Hi,
This patch refactors the implementation of the ARM ACLE CRC builtins to
use the builtin framework.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog
2016-11-09 Andre Vieira
* config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.
(UBINOP_QUALIFIERS): New.
(si_UP
w for assembly scans.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira
* config/arm/arm.md (): New.
* config/arm/arm.c (neon_const_bounds): Rename this ...
(arm_const_bounds): ... this.
(arm_coproc_builtin_available): New.
* config/arm/arm-builtins.c (S
We do some
boundary checks for coproc:[0-15], CR*:[0-31]. If either of these
requirements are not met a diagnostic is issued.
Is this ok for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira
* config/arm/arm.md (*ldcstc): New.
(): New.
* config/arm/arm.c (arm_coproc_builtin
'unsigned int'. We do some
boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31],opc2:[0-7]. If
either of these requirements are not met a diagnostic is issued.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira
* config/arm/arm.md (): New.
(): New.
*
for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira
* config/arm/arm.md (): New.
(): New.
* config/arm/arm.c (arm_arch5te): New.
(arm_option_override): Set arm_arch5te.
(arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
and mrrc2.
* config/arm/arm-
On 09/11/16 10:26, Kyrill Tkachov wrote:
>
> @@ -1832,6 +1834,17 @@ arm_init_builtins (void)
> = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr,
> ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE);
> }
> +
> + if (arm_arch_cmse)
> +{
> + tree
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