} } }
+// Likewise for ARM targets
+// { dg-final { if [string match arm*-*-* $target_triplet ] {return} } }
// Likewise for CRIS targets.
// { dg-final { if [string match cris-*-* $target_triplet ] {return} } }
// Likewise for m68k targets.
--
Alexandre Oliva, happy hackerhttps://FSFLA.org
cc.dg/analyzer/strndup-1.c
@@ -1,4 +1,5 @@
-/* { dg-skip-if "no strndup in libc" { *-*-darwin[789]* *-*-darwin10*
*-*-mingw* } } */
+/* { dg-skip-if "no strndup in libc" { *-*-darwin[789]* *-*-darwin10*
*-*-mingw* *-*-vxworks* } } */
+
#include
#include
--
Alex
} {
+return [check_no_compiler_messages arm_soft_ok_link executable {
+ #include
+ int dummy;
+ int main (void) { return 0; }
+ } "-mfloat-abi=soft"]
+}
+
# Return 1 if this is an ARM target supporting -mfpu=vfp with an
# appropriate abi.
--
Alexandre Oliva, happy
{
return 0;
--
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le } */
-/* { dg-options "-std=gnu99 -O -Wall -Wno-unused -ftrack-macro-expansion=0" }
*/
+/* { dg-options "-std=gnu99 -O -Wall -Wno-unused -ftrack-macro-expansion=0
-Wno-array-parameter" } */
/* C99 6.2.7: Compatible type and composite type. */
--
Alexandre Oliva, happy
llocating RTL that
we have handy. This function could in theory make several attempts at
allocating rtl for each register in the shrinking pending set. I
thought every saved bit could help.
Here's what I'm regstrapping on x86_64-linux-gnu, after verifying that
it does the job on the affecte
On Apr 4, 2022, Richard Sandiford wrote:
> But if that's true, it should happen in gen_rtx_REG.
Yeah, I agree, that makes sense.
> OK without the introduction of the ?:, thanks.
Thanks, here's what I'm checking in.
try multi-reg dest in default_zero_call_used_regs
On Mar 31, 2022, Alexandre Oliva wrote:
> g++.dg/modules/virt-2_a.C fails on arm-eabi and many other arm targets
> that use the AAPCS variant. ARM is the only target that overrides
> TARGET_CXX_KEY_METHOD_MAY_BE_INLINE. It's not clear to me which way the
> clash between AAPC
{
if (!ctx->quiet)
error ("% call flows off the end "
--
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Disinformation flourishes bec
D (t, 0), loc);
+}
else if (t && TREE_CODE (t) == STATEMENT_LIST)
{
t = expr_single (t);
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because
On Apr 6, 2022, Marek Polacek wrote:
> On Wed, Apr 06, 2022 at 04:36:49PM -0300, Alexandre Oliva via Gcc-patches
> wrote:
>> else
>> {
>> result = *ctx->global->values.get (res);
>> - if (result == NULL_TREE && !*non_const
Hello, Jason,
On Apr 6, 2022, Jason Merrill wrote:
> On 4/6/22 15:36, Alexandre Oliva wrote:
> Please adjust your patch subject lines for the new guidelines adopted
> as part of the git transition:
> https://gcc.gnu.org/contribute.html#patches
Oh, wow, I had missed those guideli
On Apr 6, 2022, Jason Merrill wrote:
> On 4/6/22 15:37, Alexandre Oliva wrote:
> Need to adjust this subject line, as well.
*nod*, thanks
>> * tree.cc (protected_set_expr_location): Propagate locus to
>> call wrapped in cast-to-void.
> I'm reluctant to put thi
d" } */
/*
* PR target/104253
--
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result = *ctx->global->values.get (res);
- if (result == NULL_TREE && !*non_constant_p)
+ if (result == NULL_TREE && !*non_constant_p
+ && !DECL_DESTRUCTOR_P (fun))
{
if (!ctx->quiet
*/
+ if (TREE_CODE (t) == NOP_EXPR
+ && TREE_TYPE (t) == void_type_node
+ && TREE_CODE (TREE_OPERAND (t, 0)) == CALL_EXPR)
+ protected_set_expr_location (TREE_OPERAND (t, 0), loc);
set_cleanup_locs (CLEANUP_BODY (stmts), loc);
}
else if (TREE_CODE (
ombine" } } */
+/* { dg-final { scan-rtl-dump-times {\(compare:CC
\((?:and|zero_extend):(?:[SD]I) \((?:sub)?reg:[SD]I} 1 "combine" } } */
--
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pc_p8vector_ok } */
/* { dg-options "-mdejagnu-cpu=power8 -O3" } */
--
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Free Software Activist GNU Toolchain Engineer
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get { lp64 } } } } } */
+/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times
{\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { ilp32 } } } } } */
+/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times
{\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { ilp32 } } } } } */
+/* { dg-final { if { $h
On Apr 12, 2022, Segher Boessenkool wrote:
> On Mon, Apr 11, 2022 at 08:59:41PM -0300, Alexandre Oliva wrote:
>>
>> gcc.target/powerpc/fold-vec-insert-double.c is compiled with -mvsx,
>> while the expected asm output depends on target has_arch_pwr7, which
>>
On Apr 12, 2022, Segher Boessenkool wrote:
> Hi!
> On Mon, Apr 11, 2022 at 08:57:07PM -0300, Alexandre Oliva wrote:
>> If neither 128-bit long double format is available, skip pr60203.c.
>>
>> Tested with gcc-11 targeting ppc64-vx7r2, with neither long double
>>
On Apr 17, 2021, Alexandre Oliva wrote:
> On Apr 12, 2021, Segher Boessenkool wrote:
>> Hi!
>> Sorry for the late answer.
Likewise :-)
>> On Fri, Apr 02, 2021 at 01:52:59PM -0300, Alexandre Oliva wrote:
>>> Several compile tests that use the __ieee128 type d
Hello, Iain,
Sorry about the late response.
On Mar 11, 2021, Iain Sandoe wrote:
> Alexandre Oliva wrote:
>> On Mar 10, 2021, Alexandre Oliva wrote:
>>
>>> * gcc.target/powerpc/prefix-ds-dq.c: Enable __float128.
>>
>> I've been reminded that this i
eg-4.c
b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-4.c
index 4a3f25e7f6349..adf9a0f353bfe 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-test-neg-4.c
@@ -1,7 +1,8 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
fully supported" } */
/* PR 81959, the compiler raised on unrecognizable insn message in converting
int to __float128, where the int had a PRE_INC in the address. */
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist
" } */
/* Make sure the old 'q' builtin functions work correctly when the long double
default uses the IBM double-double format. */
--
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Free Software Activist GNU Toolchain Engineer
On Apr 13, 2022, Alexandre Oliva wrote:
> * gcc.target/powerpc/pr79004.c: Prune the -mfloat128 warning.
I failed to mention that this fixed a problem in the test, but that was
not enough for this test to pass; here's an incremental patch that is.
Some of the asm opcodes exp
On Apr 14, 2022, Segher Boessenkool wrote:
> Hi!
> On Sat, Apr 17, 2021 at 06:19:02AM -0300, Alexandre Oliva wrote:
>> On Apr 12, 2021, Segher Boessenkool wrote:
>> > On Fri, Apr 02, 2021 at 01:52:59PM -0300, Alexandre Oliva wrote:
>> >> Several compile tests t
9004.c sent out ealier today, but I don't think I'd
risk such changes at this stage of development of gcc-12, let alone when
maintainer and implementation seem to me to disagree as to what the
expected behavior is :-(
--
Alexandre Oliva, happy hackerhttps://FSFLA.
rpc/p9-vec-length-full-run-7.c
b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c
index 0c21d137b9d58..53ba4a55ed47d 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-run-7.c
@@ -1,5 +1,5 @@
/* { dg-do ru
distinguishes debug insns if we find this to
break something.
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but very few c
gcc/expr.cc
@@ -3929,7 +3929,7 @@ emit_move_multi_word (machine_mode mode, rtx x, rtx y)
hard regs shouldn't appear here except as return values.
We never want to emit such a clobber after reload. */
if (x != y
- && ! (lra_in_progress || reload_in_progress || reload_comp
&& need_clobber != 0)
emit_clobber (x);
--
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es"
} */
+
+struct S {
+ S(float);
+ S();
+ operator float();
+ ~S() {}
+};
+
+int
+main() {
+ S s_arr[] = {2};
+ S var1;
+ if (var1)
+;
+}
--
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Free Software Activist GNU Toolchain Engi
+
+
+void foo() {
+ int s = c == 0 ? 1 : 2;
+ bar(s);
+ if (i)
+S s(0);
+}
--
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void
+bar (void)
+{
+}
+
+int
+quux (int y, int z)
+{
+ return (y || z >= 0) ? y : z;
+}
+
+int
+foo (int x)
+{
+ int a = 0, b = x == a;
+
+ bar ();
+
+ if (!!baz () < quux (b, a))
+++x;
+
+ return x;
+}
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
F
c option.
So I find the abstraction useful. However, I don't have plans to add
other kinds of debug stmts, and I don't know of anyone else who does, so
I won't stand in the way if others think removing these abstractions is
a positive change.
--
Alexandre Oliva, happy hacker
_file_p (output_file)))
{
/* Do nothing. */
}
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but ver
t; } */
+
+/* DECL_BY_REFERENCE RESULT_DECL is read-only, we can't create a copy
+ of its (address) default def and set it. */
+
+void ll();
+struct k {
+ ~k();
+};
+k ice(k *a)
+{
+ k v;
+ if (&v!= a)
+ll();
+ return v;
+}
--
Alexandre Oliva, happy hackerh
hat use
'$oaout', changing them to use -o /dev/null without any changes to the
expected output file names, would give us more coverage of expected
behavior than just checking that we just don't get an error.
Thanks again,
--
Alexandre Oliva, happy hackerhttps://
for vectorized booleans, which can't go on
+ GENERAL_REGS. */
+
+void
+foo (int *p)
+{
+ while (*p < 1)
+++*p;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr85030.c
b/gcc/testsuite/gcc.target/i386/pr85030.c
index ff41df6bb643c..f24e690b8c11d 100644
--- a/gcc/testsuite/gcc.tar
introduce it, now or at a later time. It would bring
some slight codegen benefit, but we could do without it at this stage.
[PR103149] detach values through mem only if general regs won't do
From: Alexandre Oliva
When hardening compares or conditional branches, we perform redundant
tests
))
+ __builtin_trap();
+ return x;
+ }
+
+ return 0;
+}
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but very
On Dec 3, 2021, Olivier Hainque wrote:
> Alex, how does that look to you?
LGTM, thanks,
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people c
/pr103530.C b/gcc/testsuite/g++.dg/pr103530.C
new file mode 100644
index 0..c1d2059542ba3
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr103530.C
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fharden-compares -Wno-c++11-extensions" } */
+
+enum E:bool
+{ E0
ot;" : "=g"(res) /* this is ok. */
+ : "0"(x));
+ assert (res == x);
+}
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes
0, (v512u32)
+ {
+ }, (v256u64)
+ {
+ }, (v512u64)
+ {
+ }, (v256u128)
+ {
+ }, (v512u128)
+ {
+ });
+}
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinfor
On Dec 8, 2021, Jeff Law wrote:
> On 12/7/2021 10:37 PM, Alexandre Oliva via Gcc-patches wrote:
>> expr.c (emit_move_multi_word): Skip clobber during lra.
> OK. Nit in the ChangeLog. You forgot a '*' before the expr.c entry.
Thanks, fixed. Here's what
On Dec 8, 2021, Jeff Law wrote:
> On 12/7/2021 7:00 PM, Alexandre Oliva via Gcc-patches wrote:
>> PR target/103097
>> * reg-stack.c (convert_regs_1): Move any_malformed_asm
>> resetting...
>> (reg_to_stack): ... here.
> So it's "stickier" aft
on of lra_in_progress,
but that's too many occurrences to try to make sense of :-(
--
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@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -w" } */
+
+char c;
+void *memset();
+void test_integer_conversion_memset(void *d) {
+ memset(d, '\0', c);
+}
--
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Free Software Activist
g-do compile } */
+/* { dg-options "-mabi=ilp32 -mstrict-align -O2" } */
+
+int unsigned_range_min, unsigned_range_max, a11___trans_tmp_1;
+
+void a11() {
+ a11___trans_tmp_1 = unsigned_range_max < unsigned_range_min;
+ __builtin_memset((char *)1, 0, a11___trans_tmp_1);
+}
--
Alexa
we were to modify callers, it would be just guarding the calls of
try_store_by_multiple_pieces with max_len >= min_len: 3 callers in 2
files, which didn't seem appealing to me.
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist
On Oct 12, 2022, Jonathan Wakely wrote:
> On Wed, 12 Oct 2022 at 12:41, Jonathan Wakely wrote:
>>
>> On Thu, 23 Jun 2022 at 12:38, Alexandre Oliva via Libstdc++
>> wrote:
>> >
>> > On Jun 22, 2022, Alexandre Oliva wrote:
>> >
>> > >
On Oct 13, 2022, Richard Biener wrote:
> On Tue, Oct 11, 2022 at 3:33 PM Alexandre Oliva wrote:
>>
>> On Oct 11, 2022, Richard Biener wrote:
>>
>> > On Tue, Oct 11, 2022 at 1:57 PM Alexandre Oliva wrote:
>> >>
>> >> On Oct 10, 2022
o-call-used-regs=leafy-gpr -fno-stack-protector
-fno-PIC" } */
+
+extern int bar (int);
+
+void
+foo (void)
+{
+ int x = bar (0);
+ if (x)
+bar (1);
+}
+
+/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */
+/* { dg-final { scan-assembler "xorl\[ \t\
c.gnu.org/pipermail/gcc-patches/2022-October/604083.html
--
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plug? cork? another leak antonym?)
> For this improvement, I am still thinking no need to add a new mode,
> just add it by default?
Even if it is default, it may still need a name to appear before
e.g. '-gpr'. 'default-gpr' might do, but I'm not happy with it either.
ned, but...
we can't depend on its being inlined, can we?
--
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t the first time around.
The patch looks good to me, thanks Martin,
--
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On Apr 14, 2022, Alexandre Oliva wrote:
> * gcc.target/powerpr/pr79004.c: Add -mlong-double-128.
Just like pr79004, float128-hw.c requires -mlong-double-128 for some
the expected asm opcodes to be output on target variants that have
64-bit long doubles. That's because their e
a/show_bug.cgi?id=105359 the other
day, how does that look?
--
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oops" 0 "vect" { target {
! vect_hw_misalign } } } } */
--
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w/o VSX");
+static_assert(!(is_same_v<_Tp, double>
+ || (_S_is_ldouble && sizeof(long double) ==
sizeof(double))),
+ "no __intrinsic_type support for [long] double on PPC w/o
VSX");
#endif
using type =
typename __intrinsic_type_i
On Apr 28, 2022, Segher Boessenkool wrote:
> On Thu, Apr 28, 2022 at 03:09:54AM -0300, Alexandre Oliva wrote:
>> +# ifdef __VSX__
> No space after # (here and everywhere else).
'k, thanks
>> + "no __intrinsic_type support for [long] double on PPC w
y simd intrinsics
From: Alexandre Oliva
libstdc++'s bits/simd.h section for PPC (Altivec) defines various
intrinsic vector types that are only available along with VSX: 64-bit
long double, double, (un)signed long long, and 64-bit (un)signed long.
experimental/simd/standard_abi_usable{,_2}.
On Apr 28, 2022, Richard Biener wrote:
> On Thu, 28 Apr 2022, Alexandre Oliva wrote:
>>
>> gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c covers ppc variants
>> that accept and reject misaligned accesses. The message that it
>> expects for rejection was removed in t
'.';
long double d;
std::from_chars(s.data(), s.data() + s.size(), d);
+#endif
}
--
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+++ b/gcc/testsuite/gcc.target/powerpc/vec-mul.c
@@ -1,4 +1,5 @@
-/* { dg-do run } */
+/* { dg-do compile { target { ! vsx_hw } } } */
+/* { dg-do run { target vsx_hw } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -O3" } */
--
Alexandre Oliva, ha
nge.
> gcc-12 branch needs RM approval. OK for 12.2 if not approved for 12.1
[PR105324] libstdc++: testsuite: pr105324 requires FP from_char
From: Alexandre Oliva
The floating-point overloads of from_char are only declared if
_GLIBCXX_HAVE_USELOCALE is #defined as nonzero. That&#x
c/pr100106-sa.c
new file mode 100644
index 0..6cc29595c8b25
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target { ilp32 } } } */
+/* { dg-options "-mcpu=604 -O -mstrict-align" } */
+
+#include "../../gcc.c-tortur
+ milliseconds(500));
VERIFY(status == std::future_status::ready);
auto const elapsed = steady_clock::now() - steady_begin;
-VERIFY(elapsed < seconds(2));
+if (elapsed >= seconds(3))
+ std::cout << elapsed.count () << "ns > 2s" << std::e
On May 5, 2022, Segher Boessenkool wrote:
> On Thu, May 05, 2022 at 03:52:01AM -0300, Alexandre Oliva wrote:
>> + else if (reg && MEM_P (reg)
>> + && STRICT_ALIGNMENT && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode))
>> +return false;
On May 5, 2022, Segher Boessenkool wrote:
> On Thu, May 05, 2022 at 08:59:21AM +0100, Richard Sandiford wrote:
>> Alexandre Oliva via Gcc-patches writes:
>> I know this is the best being the enemy of the good, but given
>> that we're at the start of stage 1, would i
izeof(long double) ==
sizeof(double))),
+ "no __intrinsic_type support for 64-bit floating point on
PowerPC w/o VSX");
#endif
using type =
typename __intrinsic_type_impl<
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
F
aseh));
+ }
+
+ if (dump_file)
+ fprintf (dump_file,
+"Copying PHI args in EH block %i from %i to %i\n",
+aseh->dest->index, aseh->src->index,
+ckeh->
{
+ int i;
+
+ for (i = 0; i < 101; ++i)
+ bar ();
+}
+}
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injus
REG_BR_PROB, NULL_RTX));
+#endif
+}
/* If there are other edges out of e->src, redistribute probabilitity
there. */
else if (prob_sum > profile_probability::never ())
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activis
105455
>> * gimple-harden-conditionals.cc (insert_check_and_trap): Set
>> probabilities for newly-conditional edges.
--
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Free Software Activist GNU Toolchain Engineer
Disinformation flourishes
->dest);
+ !gsi_end_p (psi); gsi_next (&psi))
+ {
+ gphi *phi = psi.phi ();
+ add_phi_arg (phi, PHI_ARG_DEF_FROM_EDGE (phi, aseh), ckeh,
+ gimple_phi_arg_location_from_edge (ph
27;Size use 16;
+ pragma Machine_Attribute (HBool2, "hardbool");
+
+ X : HBool1 := False;
+ Y : HBool2 := True;
+
+ function T return Boolean;
+ procedure P1;
+ procedure P2;
+ procedure P3;
+ procedure Q1;
+ procedure Q2;
+ procedure Q3;
+end Hardbool;
--
Alexandre O
nat_entity, false, sp);
void *mem;
--
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but very few
sed and retested patch I'm about to install.
Avoid visiting newly-created blocks in harden-conditionals
From: Alexandre Oliva
Reverse iteration over blocks, in gimple-harden-conditionals.cc, was
supposed to avoid visiting blocks introduced by hardening and
introducing further reversed conditio
On May 18, 2022, Andrew MacLeod via Gcc-patches wrote:
> I'm open to suggestions for a better term!
How about inference?
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinf
leaving the top-level alone, and changing gcc/configure.ac to
clear STMP_FIXINC when --disable-fixincludes is given?
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourishes beca
case OPT_multiflags:
+ gcc_checking_assert (lang_mask == CL_DRIVER);
+ break;
+
default:
/* If the flag was handled in a standard way, assume the lack of
processing here is intentional. */
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/
post-install mkheaders still has a
functional limits.h with these changes? The patch is ok (with the typo
fixes) if so. The cleanups it enables would be welcome as separate
patches ;-)
Thanks!
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist
FYI, I'm putting in this follow-up tweak to the GNAT manual.
Implied compares in Ada Harded Conditionals documentation
From: Alexandre Oliva
Improve the wording on optimizations that prevent compare hardening,
so as to also cover cases in which explicit compares get combined into
opera
ure at
https://gcc.gnu.org/pipermail/gcc-patches/2021-September/579091.html and
it's yet to be reviewed.
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many
ecause the mapping of locations to values is kept
most accurate.
Thanks!
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
bu
onals.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Alexandre Oliva .
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version
tin_hidden_copy or somesuch, but it
didn't seem worth it.
> I'd have expected such hardening to occur very late in the RTL
> pipeline.
Yeah, that would be another way to do it, but then it would have to be a
lot trickier, given all the different ways in which compare-and-br
set to the original value of
var, and that eventually resolves to the same location that holds that
value, but marked in a way that prevents CSE, fwprop and whatnot (make
it volatile?) would likely get 99% of the way there, but making pseudos
to that end (and having such marks remain after reloa
end if;
+
+Unit_Node := Specification (Unit_Node);
end if;
if Nkind (Unit_Node) in N_Task_Body
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourish
could have a plugin collection in our source tree, to hold
stuff like this and to offer examples of plugins, and means to build
select plugins as such, or as preloaded modules into the compiler for
easier deployment.
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
+1,435 @@
+/* Harden conditionals.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Alexandre Oliva .
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Softwa
On Oct 20, 2021, Alexandre Oliva wrote:
> I suppose it's a latent issue exposed by the patch,
I was mistaken. Though I even had bisected the -fcompare-debug problem
back to a patch from back in May, that added a new sink_code pass before
store_merging, it was actually a bug in my patch
cc: New.
+ * Makefile.in (OBJS): Build it.
>> * passes.def: Add new passes.
>> * tree-pass.h (make_pass_harden_compares): Declare.
>> (make_pass_harden_conditional_branches): Declare.
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Sof
11:18 2021 +0530
--
Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but very few check the facts. Ask me about <https://stallmansupport.org>
s -fno-lto" } */
+
+void *zero (unsigned long long (*p)[32], int n)
+{
+ return __builtin_memset (p, 0, n * sizeof (*p));
+}
+
+void *ones (char (*p)[128], int n)
+{
+ return __builtin_memset (p, -1, n * sizeof (*p));
+}
+
+/* { dg-final { scan-assembler-not "memset
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