This patch improves the updated memory cost in coloring pass of integrated
register
allocator. Only enter_freq of the loop is considered in updated memory cost in
the
coloring pass. Consideration of only enter_freq is based on the concept that
live Out
of the entry or header of the Loop is live
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Wednesday, January 27, 2016 12:48 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
This patch improves the allocation of registers in the given function. The
allocation
is optimized for the conditional branches. The temporary register used in the
conditional branches to store the comparison results and use of temporary in the
conditional branch is optimized. Such temporary regi
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Friday, January 29, 2016 11:33 PM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Better register allocation to
-Original Message-
From: Mike Stump [mailto:mikest...@comcast.net]
Sent: Tuesday, February 02, 2016 12:12 AM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Better register allocation to
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Thursday, July 16, 2015 4:30 PM
To: Ajit Kumar Agarwal
Cc: l...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization
I have made the following changes in the estimate_reg_pressure_cost function
used
by the loop invariant and IVOPTS.
Earlier the estimate_reg_pressure cost uses the cost of n_new variables that
are generated by the Loop Invariant
and IVOPTS. These are not sufficient for register pressure calcu
-Original Message-
From: Segher Boessenkool [mailto:seg...@kernel.crashing.org]
Sent: Sunday, September 27, 2015 7:49 PM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,optimization]: Optimized changes
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Monday, September 28, 2015 7:05 AM
To: Ajit Kumar Agarwal
Cc: Segher Boessenkool; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,optimization]: Optimized
-Original Message-
From: Aaron Sawdey [mailto:acsaw...@linux.vnet.ibm.com]
Sent: Monday, September 28, 2015 11:55 PM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,optimization]: Optimized changes in
Following Proposed:
Changes are done in the Loop Invariant(LICM) at RTL level and also the
Induction variable optimization based on SSA representation.
The current logic used in LICM for register used inside the loops is changed.
The Live Out of the loop latch node and the Live in of the
desti
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Thursday, October 08, 2015 10:29 AM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [RFC, Patch]: Optimized changes in the register used
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Friday, October 09, 2015 8:15 AM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [RFC, Patch]: Optimized changes in the register used
Hello Jeff:
Did you get a chance to look at the below response. Please let me know your
opinion on the below.
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Saturday, Septe
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Friday, November 13, 2015 3:28 AM
To: Richard Biener
Cc: Ajit Kumar Agarwal; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Friday, November 13, 2015 11:44 AM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [RFC, Patch]: Optimized changes in the register used inside
Sorry I missed out some of the points in earlier mail which is given below.
-Original Message-
From: Ajit Kumar Agarwal
Sent: Monday, November 16, 2015 11:07 PM
To: 'Jeff Law'; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject
Hello Jeff:
Please ignore my previous mails as they bounced back. Sorry for that.
I have fixed the problem with the testcase. The splitting path optimization
remains intact.
Attached is the patch.
The problem was related to the testcase as the loop bound goes beyond the
malloced array.
There
-Original Message-
From: Tom de Vries [mailto:tom_devr...@mentor.com]
Sent: Wednesday, November 18, 2015 1:14 PM
To: Jeff Law; Richard Biener
Cc: Ajit Kumar Agarwal; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree
Hello Jeff:
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Tuesday, November 17, 2015 4:30 AM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [RFC, Patch]: Optimized changes in the register
This patch made correction in the comment for SLP profitable vectorization case.
Correction in the comment for vectorizable profitable case. The comment is
contradicting the condition vec_outside_cost + vec_inside_cost > scalar_cost.
ChangeLog:
2015-11-30 Ajit Agarwal
* tree-vect-slp.
The changes are made in this patch for the instruction prefetch optimizations
for Microblaze.
Reg tested for Microblaze target.
The changes are made for instruction prefetch optimizations for Microblaze. The
"wic" microblaze instruction is the
instruction prefetch instruction. The instruction p
-Original Message-----
From: Ajit Kumar Agarwal
Sent: Tuesday, December 01, 2015 2:19 PM
To: GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: [Patch,microblaze]: Instruction prefetch optimization for microblaze.
The changes are made in this
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Thursday, December 03, 2015 7:27 PM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Instruction prefetch optimization
Based on the comments on RFC patch this patch incorporates all the comments
from Jeff. Thanks Jeff for the valuable feedback.
This patch enables the better register pressure estimate for Loop Invariant
code motion. This patch Calculate the Loop Liveness used for regs_used
used to calculate the
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Wednesday, December 09, 2015 4:06 PM
To: Ajit Kumar Agarwal
Cc: Jeff Law; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,rtl Optimization
-Original Message-
From: Bernd Schmidt [mailto:bschm...@redhat.com]
Sent: Wednesday, December 09, 2015 7:34 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: Jeff Law; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,rtl Optimization
You can assign the same register to more than operand based on the Liveness. It
will be tricky if on the basis of Liveness available registers not found. In
that you need to spill one of the operands and use the registers assigned to
the next operand. This forms the basis of spilling one of the
-Original Message-
From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
Sent: Friday, April 24, 2015 12:40 AM
To: Ajit Kumar Agarwal
Cc: vmaka...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch] OPT: Update
b74acf44ce4286649e5be7cff7518d814cb2491f
Author: Ajit Kumar Agarwal
Date: Wed Feb 25 15:33:02 2015 +0530
[Patch,microblaze]: Optimized usage of pcmp conditional instruction.
The changes are made in the patch for optimized usage of pcmpne/pcmpeq
instructions. The xor with
Hello All:
Please find the patch for the optimized usage of fint instruction changes. No
regression is seen
in the deja GNU tests.
commit ed4dc0b96bf43c200cacad97f73a98ab7048e51b
Author: Ajit Kumar Agarwal
Date: Wed Feb 25 15:36:29 2015 +0530
[Patch,microblaze]: Optimized usage of fint
changes with MIBench and EEMBC benchmarks and there is a
gain in the Geomean for the overall benchmarks for
Microblaze target. Also no regressions are seen in deja GNU tests run for
microblaze.
Please let us know with your feedbacks.
commit e6a2edd3794080a973695f80e77df3e7de55452d
Author: Ajit Kumar
039b95028c93f99fc1da7fa255f9b5fff4e17223
Author: Ajit Kumar Agarwal
Date: Wed Mar 4 15:46:45 2015 +0530
[Patch] OPT: Update heuristics for loop-invariant for address arithmetic.
The changes are made in the patch to update the heuristics
for loop invariant for address arithmetic. The
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Thursday, February 26, 2015 4:33 AM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Optimized usage of fint
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Thursday, February 26, 2015 4:29 AM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Optimized usage of pcmp
Hello Vladimir:
Did you get a chance to look at the below patch.
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Friday, February 27, 2015 11:25 AM
To: vmaka...@redhat.com;
Hello All:
Did you get a chance to look at the below patch.
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Wednesday, March 04, 2015 3:57 PM
To: vmaka...@redhat.com; GCC Pat
ld_ssa (gcc::context *ctxt);
extern gimple_opt_pass *make_pass_build_alias (gcc::context *ctxt);
diff --git a/gcc/tree-ssa-path-split.c b/gcc/tree-ssa-path-split.c
new file mode 100644
index 000..3da7791
--- /dev/null
+++ b/gcc/tree-ssa-path-split.c
@@ -0,0 +1,462 @@
+/* Support routines fo
-Original Message-
From: Bernhard Reutner-Fischer [mailto:rep.dot@gmail.com]
Sent: Tuesday, June 30, 2015 3:57 PM
To: Ajit Kumar Agarwal; l...@redhat.com; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Tuesday, June 30, 2015 4:42 PM
To: Ajit Kumar Agarwal
Cc: l...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add
I forgot to attach the Link of the RFC comments from Jeff for reference.
https://gcc.gnu.org/ml/gcc/2015-05/msg00302.html
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Tue
-Original Message-
From: Joseph Myers [mailto:jos...@codesourcery.com]
Sent: Wednesday, July 01, 2015 3:48 AM
To: Ajit Kumar Agarwal
Cc: l...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Tuesday, June 30, 2015 4:42 PM
To: Ajit Kumar Agarwal
Cc: l...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add
All:
The below patch optimized the usage of the reserved stack space for function
arguments. The stack space is reserved if
the function is a libcall, variable number of arguments, aggregate data types,
and some parameter are reserved in registers
and some parameters is reserved in the stack.
-Original Message-
From: Oleg Endo [mailto:oleg.e...@t-online.de]
Sent: Monday, July 06, 2015 7:07 PM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Optimized usage of reserved stack
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Tuesday, July 07, 2015 2:21 PM
To: Ajit Kumar Agarwal
Cc: l...@redhat.com; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add
All:
Please find the patch for optimized usage of instruction prefetch with the
generation of microblaze instruction "wic".
No regressions is seen in Deja GNU tests for microblaze.
[Patch,microblaze]: Optimized Instruction prefetch with the generation of wic
instruction.
The change
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Jeff Law
Sent: Tuesday, February 10, 2015 5:03 AM
To: Bin.Cheng
Cc: Alex Velenko; Felix Yang; Yangfei (Felix); Marcus Shawcroft; GCC Patches;
vmaka...@redhat.com
Subject: Re: [PATC
.
(fdump-tree-path_split): Document.
Signed-off-by:Ajit Agarwal ajit...@xilinx.com.
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Wednesday, July 29, 2015 10:13 AM
To: Ric
All:
Does the Logic to calculate the Loop bound information through Value Range
Analyis uses the post dominator and
Dominator info. The iteration branches instead of Loop exit condition can be
calculated through post dominator info.
If the node in the Loop has two successors and post dominates t
gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Monday, August 17, 2015 4:19 PM
To: Bin.Cheng; Richard Biener
Cc: Bin Cheng; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
Subject: RE: [PATCH GCC]I
-Original Message-
From: Bin.Cheng [mailto:amker.ch...@gmail.com]
Sent: Tuesday, August 18, 2015 1:08 PM
To: Ajit Kumar Agarwal
Cc: Richard Biener; Bin Cheng; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [PATCH GCC]Improve bound
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Thursday, August 20, 2015 1:13 AM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Thursday, August 20, 2015 3:16 AM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
All:
I have done the vectorization cost changes as given below. I have considered
only the cost associated with the inner instead of outside.
The consideration of inside scalar and vector cost is done as the inner cost
are the most cost effective than the outside cost.
min_profitable_i
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Friday, August 21, 2015 2:03 PM
To: Ajit Kumar Agarwal
Cc: Jeff Law; GCC Patches; g...@gcc.gnu.org; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [RFC
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Thursday, August 20, 2015 9:19 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Bin Cheng
Sent: Thursday, August 27, 2015 3:12 PM
To: gcc-patches@gcc.gnu.org
Subject: [PATCH GCC][rework]Improve loop bound info by simplifying conversions
in iv base
Hi,
>>This
umar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path Splitting pass on tree ssa
representation
On 08/15/2015 11:01 AM, Ajit Kumar Agarwal wrote:
>
&g
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Thursday, September 10, 2015 3:10 AM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
%), ospfv2_lite(1.35%).
We are seeing minor negative gains that are mainly noise.(less than 0.5%)
Thanks & Regards
Ajit
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Friday, December 11, 2015 1:39 AM
To: Richard Biener
Cc: Ajit Kumar Agarwal; GCC Patches; Vinod Kathail; Shail Ad
of call_p.
Signed-off-by:Ajit Agarwal ajit...@xilinx.com.
Thanks & Regards
Ajit
-Original Message-
From: Bernd Schmidt [mailto:bschm...@redhat.com]
Sent: Wednesday, December 09, 2015 7:34 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: Jeff Law; GCC Patches; Vinod Kathail; Shai
l Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Wednesday, December 16, 2015 5:20 AM
To: Richard Biener
Cc: Ajit Kumar Agarwal; GCC Patches; Vinod Kathail; Shail Aditya Gupta;
Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path Splitting pass on
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Richard Biener
Sent: Wednesday, December 16, 2015 3:27 PM
To: Ajit Kumar Agarwal
Cc: Jeff Law; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju
The estimate on target_clobbered_registers based on the call_used arrays is not
correct. This is the worst case
heuristics on the estimate on target_clobbered_registers. This disables many of
the loop Invariant code motion
opportunities in presence of call. Instead of considering the spill cos
+ tracer enabled. The
Split Paths pass is very much required.
Thanks & Regards
Ajit
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Ajit Kumar Agarwal
Sent: Wednesday, December 16, 2015 3:44 PM
To: Richard Biener
Cc: Jeff Law;
Hello Jeff:
I am out on vacation till 3rd Jan 2016.
Is it okay If I respond on the below once I am back in office.
Thanks & Regards
Ajit
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Wednesday, December 23, 2015 12:06 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc:
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Wednesday, December 23, 2015 12:06 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
The patch contains the changes in the macros fixed_registers and
call_used_registers.
Earlier the register r21 is marked as fixed and also marked as 1 for call_used
registers.
On top of that r21 is not assigned to any of the temporaries in rtl insns.
This makes the usage of registers r21 in the
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Saturday, January 16, 2016 12:03 PM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
-Original Message-
From: Jeff Law [mailto:l...@redhat.com]
Sent: Saturday, January 16, 2016 4:33 AM
To: Ajit Kumar Agarwal; Richard Biener
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida;
Nagaraju Mekala
Subject: Re: [Patch,tree-optimization]: Add new path
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Richard Sandiford
Sent: Monday, September 22, 2014 12:54 PM
To: Jeff Law
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 0/5] Fix handling of word subregs of wide registers
Jeff La
-Original Message-
From: Richard Sandiford [mailto:richard.sandif...@arm.com]
Sent: Monday, September 22, 2014 4:56 PM
To: Ajit Kumar Agarwal
Cc: Jeff Law; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 0/5] Fix handling of word subregs of wide registers
Ajit Kumar Agarwal writes:
> J
From 15dfaee8feef37430745d3dbc58f74bed876aabb Mon Sep 17 00:00:00 2001
From: Ajit Kumar Agarwal
Date: Tue, 13 May 2014 13:25:52 +0530
Subject: [PATCH] [Patch, microblaze] Added Break Handler support
Added Break Handler support to incorporate the hardware and software break. The
Break Handler routine
will be genera
2014 10:30 PM
To: Ajit Kumar Agarwal; gcc-patches@gcc.gnu.org
Cc: Vinod Kathail; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,Microblaze]: Added Break Handler Support
On 05/13/14 02:14, Ajit Kumar Agarwal wrote:
> Hello Michael:
>
> The following patch is to handle Software
Hello Michael:
Resubmitting the Patch with documentation for _break_handler in the
config/microblaze/microblaze.h.
Thanks & Regards
Ajit
-Original Message-
From: Michael Eager [mailto:ea...@eagercon.com]
Sent: Wednesday, May 14, 2014 12:55 AM
To: Ajit Kumar Agarwal; gcc-pat
@code{text} section.
diff --git a/gcc/testsuite/gcc.target/microblaze/others/break_handler.c
b/gcc/testsuite/gcc.target/microblaze/others/break_handler.c
new file mode 100644
index 000..1ccafd0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/microblaze/others/break_handler.c
@@ -0,0 +1,15 @@
+int f
Please find the following patch for init_priority support for microblaze.
Testing Done : No regressions seen in gcc and g++ regressions testsuite.
[Patch, microblaze]: Add Init_priority support.
Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros. These
macros allows use
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