Hello Richard:
On 11/06/24 6:12 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 5:15 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>> On 11/06/24 4:56 pm, Ajit Agarwal wr
Hello Richard:
On 11/06/24 7:07 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>> On 11/06/24 6:12 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> On 11/06/24 5:15 pm, Richa
Hello Richard:
On 11/06/24 8:59 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 11/06/24 7:07 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>> On 11/06/24 6:12 pm, Richard Sandiford wrote:
>>>>> Aji
Hello Richard:
On 11/06/24 9:41 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>> Thanks a lot. Can I know what should we be doing with neg (fma)
>>>> correctness failures with load fusion.
>>>
>>> I think it would involve:
>>>
&g
Hello Richard:
On 12/06/24 3:02 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 9:41 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> Thanks a lot. Can I know what should we be doing with neg (f
Hello Richard:
On 12/06/24 3:02 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 9:41 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> Thanks a lot. Can I know what should we be doing with neg (f
Hello Richard:
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped and regtested on p
Hello Richard:
On 14/06/24 4:26 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> All comments are addressed.
>
> I don't think this addresses the following comments from the previous
> reviews:
>
> (1) It is not corre
Hello Richard:
On 19/06/24 2:01 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 14/06/24 4:26 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> All comments
Hello Richard:
On 19/06/24 12:52 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 19/06/24 2:01 am, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>> Hello Richard:
>>>
>>> On 14/06/24 4:26 pm, Richard Sandiford wrote:
>>>> Ajit Agarwal
Hello Richard:
On 19/06/24 1:54 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>> What happens if you leave the assert alone? When does it fire? Is it
>>> still for uses in debug insns? If so, it's the fusion pass's responsibility
>>> to update
Hello Richard:
On 19/06/24 2:40 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 19/06/24 1:54 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>> What happens if you leave the assert alone? When does it fir
Hello Richard:
On 19/06/24 2:52 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 19/06/24 2:40 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> On 19/06/24 1:54 pm, Richard Sandiford wrote:
>>
Hello Richard:
All review comments are incorporated.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped and regt
Hello Richard:
On 19/06/24 3:26 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 19/06/24 2:52 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 19/06/24 2:40 pm, Richard Sandiford wrote:
>>>>> Ajit Agarwal writes:
>>&g
Hello All:
This patch addressed cleanup of the code and fix linaro failures.
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are
Hello All:
This patch improve determine_suggested_unroll_factor in finish_cost
with reduction factor of loads/stores/non_load_stores.
Return unroll factor calculated as per reduction factor
with number of loads/stores/non_load_stores (general_ops).
Bootstrapped and regtested on powerpc64-linux-g
Hello All:
This patch improves loop_unroll_adjust by adding mem count to calculate
unroll factor.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Improve loop_unroll_adjust
Improves loop_unroll_adjust by adding mem count to calculate
unroll factor.
2024-07-24
Hello Richard:
Did you get a chance to look at the changes. Ok to install?
Thanks & Regards
Ajit
Forwarded Message
Subject: [Patch, rs6000, middle-end] v7: Add implementation for different
targets for pair mem fusion
Date: Fri, 19 Jul 2024 14:46:13 +0530
From: Ajit Aga
Hello Alex:
On 11/04/24 7:55 pm, Alex Coplan wrote:
> On 10/04/2024 23:48, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 10/04/24 7:52 pm, Alex Coplan wrote:
>>> Hi Ajit,
>>>
>>> On 10/04/2024 15:31, Ajit Agarwal wrote:
>>>> Hello Alex
Hello Alex:
On 12/04/24 8:15 pm, Alex Coplan wrote:
> On 12/04/2024 20:02, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>> On 10/04/2024 23:48, Ajit Agarwal wrote:
>>>> Hello Alex:
>>>>
>>>> On
Hello Alex:
On 12/04/24 11:02 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 8:15 pm, Alex Coplan wrote:
>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>> Hello Alex:
>>>
>>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>>> On
Hello Alex/Richard:
All review comments are addressed and changes are made to transform_for_base
function as per consensus.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure
Hello Alex:
On 14/04/24 10:29 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 11:02 pm, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 12/04/24 8:15 pm, Alex Coplan wrote:
>>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>>> Hello Alex:
>>&g
und comments. It's important to have good clear comments for
> functions with the parameters (and return value, if any) clearly
> described. See https://www.gnu.org/prep/standards/standards.html#Comments
>
> Note that this now needs a little rebasing, too.
>
Done.
> On
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependen
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target
Hello Richard:
This patch addressed all review comments in version 8 of the patch.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fu
Hello Richard:
This patch addresses all the review comments.
It also fix the arm build failure.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in r
Hello Richard:
On 22/05/23 6:26 pm, Richard Biener wrote:
> On Thu, May 18, 2023 at 9:14 AM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> This patch improves code sinking pass to sink statements before call to
>> reduce
>> register pressure.
>> Review
Hello Richard:
On 30/05/23 12:34 pm, Richard Biener wrote:
> On Tue, May 30, 2023 at 7:06 AM Ajit Agarwal wrote:
>>
>> Hello Richard:
>>
>> On 22/05/23 6:26 pm, Richard Biener wrote:
>>> On Thu, May 18, 2023 at 9:14 AM Ajit Agarwal wrote:
>>>>
&g
Hello Jeff:
Please review Jeff.
Thanks & Regards
Ajit
On 12/05/23 4:48 pm, Ajit Agarwal via Gcc-patches wrote:
> Hello Jeff:
>
>
> On 29/04/23 3:40 am, Jeff Law wrote:
>>
>>
>> On 4/20/23 15:03, Ajit Agarwal wrote:
>>
>>>
>>> Currently
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
Hello All:
This new version of patch 4 use improve ree pass for rs6000 target using
defined ABI interfaces.
Bootstrapped and regtested on power64-linux-gnu.
Review comments incorporated.
Thanks & Regards
Ajit
Improve ree pass for rs6000 target using defined abi interfaces
For rs6000 target we
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
On 01/06/23 2:06 pm, Bernhard Reutner-Fischer wrote:
> On 1 June 2023 09:20:08 CEST, Ajit Agarwal wrote:
>> Hello All:
>>
>> This patch improves code sinking pass to sink statements before call to
>> reduce
>> register pressure.
>> Review comments are
Hello All:
This patch provide functionality to improve ree pass for rs6000 target.
Eliminated sign_extend/zero_extend/AND with varying constants.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target
For rs6000 target we see redundant
Hello Segher:
Please review and let me know your feedback to submit in trunk.
Thanks & Regards
Ajit
On 25/02/23 3:20 pm, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> Here is the patch that uses xxlor instead of fmr where possible.
> Performance results shows that
commit 17714c08e9013b51cf8d04ac39f844d355c923f2 (HEAD -> master, origin/master,
origin/HEAD)
Author: “Ajit Kumar Agarwal”
Date: Fri May 19 02:30:44 2023 -0500
testsuite: Update powerpc test fold-vec-extract-int.p8.c
Update powerpc tests with extra zero_extend removal with default
Ping!
please review.
Thanks & Regards
Ajit
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +
Ping^2.
Please review.
Thanks & Regards
Ajit
This new version of patch 4 use improve ree pass for rs6000 target using
defined ABI interfaces.
Bootstrapped and regtested on power64-linux-gnu.
Review comments incorporated.
Thanks & Regards
Ajit
Improve ree pass for rs6000 target using defin
Ping^2.
Please review.
Thanks & Regards
Ajit
This patch provide functionality to improve ree pass for rs6000 target.
Eliminated sign_extend/zero_extend/AND with varying constants.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target
On 18/07/23 4:38 pm, Prathamesh Kulkarni wrote:
> On Tue, 18 Jul 2023 at 13:26, Ajit Agarwal via Gcc-patches
> wrote:
>>
>>
>> Ping!
>>
>> please review.
>>
>> Thanks & Regards
>> Ajit
>>
>>
>> This patch improve
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
Ping!
Forwarded Message
Subject: [PATCH v8] tree-ssa-sink: Improve code sinking pass.
Date: Tue, 18 Jul 2023 19:03:37 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Richard Biener , Jeff Law
, Segher Boessenkool , Peter
Bergner
Hello All:
This patch improves code sinking
Ping!
Forwarded Message
Subject: [PING^2] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using
defined ABI interfaces.
Date: Tue, 18 Jul 2023 13:28:08 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Jeff Law , Richard Biener
, Segher Boessenkool ,
Peter Bergner
Ping
Ping!
Forwarded Message
Subject: [PING^2] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000
target.
Date: Tue, 18 Jul 2023 13:31:27 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Jeff Law , Richard Biener
, Segher Boessenkool ,
Peter Bergner
Ping^2.
Please
Ping!
Forwarded Message
Subject: [PING^1] [PATCH v8] tree-ssa-sink: Improve code sinking pass.
Date: Tue, 1 Aug 2023 13:47:10 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Richard Biener , Jeff Law
, Peter Bergner , Segher
Boessenkool , rashmi.srid...@ibm.com
Ping
Ping!
Forwarded Message
Subject: PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000
target.
Date: Tue, 1 Aug 2023 13:50:21 +0530
From: Ajit Agarwal
To: gcc-patches , Jeff Law ,
Richard Biener , Peter Bergner
, Segher Boessenkool ,
rashmi.srid...@ibm.com
Ping!
Forwarded Message
Subject: [PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using
defined ABI interfaces.
Date: Tue, 1 Aug 2023 13:48:58 +0530
From: Ajit Agarwal
To: gcc-patches , Jeff Law ,
Richard Biener , Peter Bergner
, Segher Boessenkool
On 23/06/23 7:44 am, Peter Bergner wrote:
> On 6/1/23 11:54 PM, Ajit Agarwal via Gcc-patches wrote:
>>
>>
>> On 01/06/23 2:06 pm, Bernhard Reutner-Fischer wrote:
>>> On 1 June 2023 09:20:08 CEST, Ajit Agarwal wrote:
>>>> Hello All:
>>>&
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This new version of patch 4 use improve ree pass for rs6000 target using
> defined ABI interfaces.
> Bootstrapped and regtested on power64-lin
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 07/06/23 3:55 pm, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This patch provide functionality to improve ree pass for rs6000 target.
> Eliminated sign_extend/zero_extend/AND with varying constants.
>
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This new version of patch 4 use improve ree pass for rs6000 target using
> defined ABI interfaces.
> Bootstrapped and regtested on power64-lin
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 26/06/23 6:12 pm, Ajit Agarwal via Gcc-patches wrote:
> All:
>
> Ok for trunk. Please review.
>
> Thanks & Regards
> Ajit
>
> On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
>> Hello
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
Hello All:
This patch replaces fmr instruction (6 cycles) with xxlor instruction ( 2
cycles)
Bootstrapped and regtested on powerpc64-linux-gnu.
copyright assignment form is still in the process of being sent.
Thanks & Regards
Ajit
rs6000: fmr gets used instead of faster xxlor
%0,%1";
+ case 13 : return "mt%0 %1";
+ case 14 : return "mf%1 %0";
+ case 15 : return "nop";
+ case 16: return "mfvsrd %0,%x1";
+ case 17 : return "mtvsrd %x0,%1";
+ }
+ return "unreachable";
+}
[(set_attr &qu
Hello Segher:
On 21/02/23 4:34 pm, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Feb 21, 2023 at 02:18:25PM +0530, Ajit Agarwal wrote:
>> This patch replaces fmr instruction 6 cycles with 2 cycles xxlor instruction
>> for p7 and p8 architecture.
>>
>> I have
On 21/02/23 7:39 pm, Segher Boessenkool wrote:
> On Tue, Feb 21, 2023 at 06:00:52PM +0530, Ajit Agarwal wrote:
>> On 21/02/23 4:34 pm, Segher Boessenkool wrote:
>>> Please domn't use a switch, it isn't needed. Instead use the "isa"
>>> a
p8v,p8v,p10")
+"*, *, p7p8,p9v,p9v,
+ p7v, p7v,*, *, *,
+ *, *, *, *, *,
+ *, p8v,p8v, *, *,
+ p10")
(set_attr "prefixed"
"*, *, *, *, *,
*, *, *, *, *,
*,
On Fri, Feb 24, 2023 at 01:41:49PM +0530, Ajit Agarwal wrote:
>> Here is the patch that uses xxlor instead of fmr where possible.
>> Performance results shows that fmr is better in power9 and
>> power10 architectures whereas xxlor is better in power7 and
>> power 8 archit
Hello All:
Here is the patch that uses xxlor instead of fmr where possible.
Performance results shows that fmr is better in power9 and
power10 architectures whereas xxlor is better in power7 and
power 8 architectures. fmr is the only option before p7.
Bootstrapped and regtested on powerpc64-linu
Hello All:
Here is the patch for Inline lrint and lrintf. Currently glibc don't
use __builtin_lrint as they inline lrint with fctid/fctiw instruction.
With the below changes such inlines are not required and lrint builtin
can be used.
Bootstrapped and regtested on powerpc64-linux-gnu.
rs
Hello All:
This patch eliminates unnecessary zero extension instruction from power
generated assembly.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: suboptimal code for returning bool value on target ppc.
New pass to eliminate unnecessary zer
Hello Richard:
On 16/03/23 1:10 pm, Richard Biener wrote:
> On Thu, Mar 16, 2023 at 6:21 AM Ajit Agarwal via Gcc-patches
> wrote:
>>
>> Hello All:
>>
>>
>> This patch eliminates unnecessary zero extension instruction from power
>> generated assembly.
On 16/03/23 1:44 pm, Richard Biener wrote:
> On Thu, Mar 16, 2023 at 9:11 AM Ajit Agarwal wrote:
>>
>> Hello Richard:
>>
>> On 16/03/23 1:10 pm, Richard Biener wrote:
>>> On Thu, Mar 16, 2023 at 6:21 AM Ajit Agarwal via Gcc-patches
>>> wrote:
&
Hello Jeff:
On 29/04/23 3:40 am, Jeff Law wrote:
>
>
> On 4/20/23 15:03, Ajit Agarwal wrote:
>
>>
>> Currently I support AND with const1_rtx. This is what is equivalent to zero
>> extension instruction in power instruction set. When you specify many other
>
Hello All:
This patch enable ree pass as a default pass for rs6000 target.
Bootstrapped and regtested for powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Enable REE pass by default
Add ree pass as a default pass for rs6000 target for
O2 and above.
2023-05-16
On 29/04/23 5:03 am, Jeff Law wrote:
>
>
> On 4/28/23 16:42, Hans-Peter Nilsson wrote:
>> On Sat, 22 Apr 2023, Ajit Agarwal via Gcc-patches wrote:
>>
>>> Hello All:
>>>
>>> This new version of patch 4 use improve ree pass for rs6000 target usi
rs6000: Enable REE pass by default
Add ree pass as a default pass for rs6000 target for
O2 and above.
2023-05-16 Ajit Kumar Agarwal
gcc/ChangeLog:
* common/config/rs6000/rs6000-common.cc: Add REE pass as a
default rs6000 target pass for O2 and above.
* doc/invoke.texi
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
tree-ssa-sink: Improve code sinking pass.
Code Sinking sinks the blocks after
Hello All:
Update powerpc tests with extra zero_extend removal with default ree pass.
Bootstrapped and Regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Update powerpc test fold-vec-extract-int.p8.c
Update powerpc tests with extra zero_extend removal with default ree pass.
202
Hello All:
Update powerpc tests for both le and be endian with extra removal of zero
extension and sign extension.
with default ree pass for rs6000 target.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Update powerpc test fold-vec-extract-int.p8.c
Update pow
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
bar(
This patch removes zero extension from vctzlsbb as it already zero extends.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index
For rs6000 target we dont need zero_extend after vctzlsbb as vctzlsbb
al
This patch removes zero extension from vctzlsbb as it already zero extends.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index
For rs6000 target we dont need zero_extend after vctzlsbb as vctzlsbb
alre
Hello Jeff:
This patch eliminates redundant zero and sign extension with ree pass for rs6000
target.
Bootstrapped and regtested for powerpc64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass
For rs6000 target we see redundant zero and sign extension and ree pass
s improved to eliminat
Ping!
Forwarded Message
Subject: [PATCH] rs6000: unnecessary clear after vctzlsbb in
vec_first_match_or_eos_index
Date: Thu, 31 Aug 2023 16:14:46 +0530
From: Ajit Agarwal via Gcc-patches
Reply-To: Ajit Agarwal
To: gcc-patches
CC: Peter Bergner , Segher Boessenkool
This
Ping!
Forwarded Message
Subject: [PATCH 3/4] Improve functionality of ree pass.
Date: Mon, 4 Sep 2023 13:27:42 +0530
From: Ajit Agarwal via Gcc-patches
Reply-To: Ajit Agarwal
To: Jeff Law , gcc-patches
CC: Peter Bergner , Segher Boessenkool
Hello Jeff:
This patch
Ping!
Forwarded Message
Subject: [PING^4] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using
defined ABI interfaces.
Date: Mon, 21 Aug 2023 12:16:44 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Jeff Law , Richard Biener
, Segher Boessenkool ,
Peter Bergner
Ping!
Forwarded Message
Subject: [PING^2] [PATCH v8] tree-ssa-sink: Improve code sinking pass.
Date: Mon, 21 Aug 2023 12:14:03 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Richard Biener , Jeff Law
, Segher Boessenkool , Peter
Bergner , rashmi.srid...@ibm.com
Ping
This patch removes zero extension from vctzlsbb as it already zero extends.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index
For rs6000 target we dont need zero_extend after vctzlsbb as vctzlsbb
alre
This new version of patch 6 use improve ree pass for rs6000 target using
defined ABI interfaces.
Bootstrapped and regtested on power64-linux-gnu.
Review comments incorporated.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target using defined abi interfaces
For rs6000 target we see r
Hello All:
This is the patch-1 for improving ree pass for rs6000 target.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target.
Add ree pass as a default pass for rs6000 target.
2023-04-19 Ajit Kumar Agarwal
Hello All:
This is the patch-2 to improve ree pass for rs6000 target.
Bootstrapped and regtested on powerpc64-gnu-linux.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target.
For rs6000 target we see redundant zero and sign
extension and done to improve ree pass
Hello All:
This is patch-3 to improve ree pass for rs6000 target.
Main functionality routines to imprve ree pass.
Bootstrapped and regtested on powerpc64-gnu-linux.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target.
For rs6000 target we see redundant zero and sign
Hello All:
This is patch-4 to improve ree pass for rs6000 target.
Use ABI interfaces support.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target.
For rs6000 target we see redundant zero and sign
extension and
Hello Jeff:
On 20/04/23 3:23 am, Jeff Law wrote:
>
>
> On 4/19/23 12:00, Ajit Agarwal wrote:
>> Hello All:
>>
>> This is patch-3 to improve ree pass for rs6000 target.
>> Main functionality routines to imprve ree pass.
>>
>> Bootstrapped and r
Hello Jeff:
On 21/04/23 2:33 am, Ajit Agarwal via Gcc-patches wrote:
> Hello Jeff:
>
> On 20/04/23 3:23 am, Jeff Law wrote:
>>
>>
>> On 4/19/23 12:00, Ajit Agarwal wrote:
>>> Hello All:
>>>
>>> This is patch-3 to improve ree pass for rs6000
Hello Jeff:
On 21/04/23 2:33 am, Ajit Agarwal wrote:
> Hello Jeff:
>
> On 20/04/23 3:23 am, Jeff Law wrote:
>>
>>
>> On 4/19/23 12:00, Ajit Agarwal wrote:
>>> Hello All:
>>>
>>> This is patch-3 to improve ree pass for rs6000 targ
Hello All:
This patch enable REE pass by default at O2 and above.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Enable REE pass by default
Add ree pass as a default pass for rs6000 target for
O2 and above.
2023-04-21 Ajit Kuma
Hello All:
This patch is the new version of patch-3 to improve ree pass for rs6000 target.
Bootstrapped and regtested on power64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target
For rs6000 target we see redundant zero and sign
extension and done t
Hello All:
This new version of patch 4 use improve ree pass for rs6000 target using
defined ABI interfaces.
Bootstrapped and regtested on power64-linux-gnu.
Thanks & Regards
Ajit
ree: Improve ree pass for rs6000 target using defined abi interfaces
For rs6000 target we see redu
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