[PATCH v2] c++: P2036R3 - Change scope of lambda trailing-return-type [PR102610]

2025-07-11 Thread Marek Polacek
On Thu, Jul 10, 2025 at 02:13:06PM -0400, Jason Merrill wrote: > On 7/9/25 4:27 PM, Marek Polacek wrote: > > On Tue, Jul 08, 2025 at 12:15:03PM -0400, Jason Merrill wrote: > > > On 7/7/25 4:52 PM, Marek Polacek wrote: > > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? > > > > > >

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jason Merrill
On 7/11/25 2:17 PM, Jakub Jelinek wrote: On Fri, Jul 11, 2025 at 12:26:54PM -0400, Jason Merrill wrote: On 7/11/25 9:09 AM, Jakub Jelinek wrote: On Thu, Jul 10, 2025 at 04:35:49PM -0400, Jason Merrill wrote: --- gcc/cp/cp-gimplify.cc.jj2025-04-12 21:41:42.660924514 +0200 +++ gcc/cp/cp-gimp

[PATCH] testsuite: Fix overflow in gcc.dg/vect/pr116125.c

2025-07-11 Thread Siddhesh Poyarekar
The test ends up writing a byte beyond bounds of the buffer, which gets trapped on some targets when the test is run with -fstack-protector-strong. testsuite/ChangeLog: * gcc.dg/vect/pr116125.c (mem_overlap): Reduce iteration count to 8. Signed-off-by: Siddhesh Poyarekar --- OK

[pushed]PR121007, LRA]: Fall back to reload of whole inner address in PR case and constrain iteration number of address reloads

2025-07-11 Thread Vladimir Makarov
The following patch solves https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121007 The patch was successfully bootstrapped and tested on amd64, arm64, ppc64le. commit 06c41504bd4a23c3f5848793fda503c30fe51353 Author: Vladimir N. Makarov Date: Fri Jul 11 11:27:54 2025 -0400 [PR121007, LRA]: F

Re: [PATCH] aarch64: Support unpacked SVE integer division

2025-07-11 Thread Remi Machet
On 7/11/25 08:21, Spencer Abson wrote: External email: Use caution opening links or attachments This patch extends the existing patterns for SVE_INT_BINARY_SD to support partial SVE integer modes, including those implement the conditional form. gcc/ChangeLog: * config/aarch64/aarch64-

Re: [PATCH] c++, v3: Implement C++26 P2786R13 - Trivial Relocatability [PR119064]

2025-07-11 Thread Jason Merrill
On 7/10/25 6:34 PM, Jakub Jelinek wrote: On Thu, Jul 10, 2025 at 05:46:06PM -0400, Jason Merrill wrote: + bool trivially_relocatable_if_eligible : 1; + bool replaceable_if_eligible : 1; + + bool trivially_relocatable : 1; + bool trivially_relocatable_computed : 1; + bool replaceable : 1; +

Re: [PATCH] aarch64: PR target/120999: Avoid movprfx for NBSL implementation of NOR

2025-07-11 Thread Kyrylo Tkachov
> On 11 Jul 2025, at 16:48, Richard Sandiford wrote: > > Kyrylo Tkachov writes: >>> On 10 Jul 2025, at 11:12, Kyrylo Tkachov wrote: >>> >>> >>> On 10 Jul 2025, at 10:40, Richard Sandiford wrote: Kyrylo Tkachov writes: > Hi all, > > While the SVE2 NBSL i

Re: [RFC v2] c++: Quoting in -fmodules-mapper [PR110153]

2025-07-11 Thread Jason Merrill
On 7/10/25 4:41 PM, Nicolas Werner wrote: Users might be using a space in their build directory path. To allow specifying such a root for the module mapper started by GCC, we need the command to allow quotes. Previously quoting a path passed to the module mapper was not possible, so replace the c

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jakub Jelinek
On Fri, Jul 11, 2025 at 12:26:54PM -0400, Jason Merrill wrote: > On 7/11/25 9:09 AM, Jakub Jelinek wrote: > > On Thu, Jul 10, 2025 at 04:35:49PM -0400, Jason Merrill wrote: > > > > --- gcc/cp/cp-gimplify.cc.jj2025-04-12 21:41:42.660924514 +0200 > > > > +++ gcc/cp/cp-gimplify.cc 2025-04-23

Re: [PATCH] testsuite: Disable musttail tests if target uses SJLJ exceptions

2025-07-11 Thread Andrew Pinski
On Fri, Jul 11, 2025 at 9:59 AM Andi Kleen wrote: > > Dimitar Dimitrov writes: > > > A few tests started failing recently on pru-unknown-elf because it uses > > SJLJ implementation for exceptions: > > FAIL: g++.dg/ext/musttail3.C -std=c++11 (test for excess errors) > > .../gcc/gcc/testsuite/

Re: [PATCH] aarch64: PR target/120999: Avoid movprfx for NBSL implementation of NOR

2025-07-11 Thread Richard Sandiford
Kyrylo Tkachov writes: >> On 10 Jul 2025, at 11:12, Kyrylo Tkachov wrote: >> >> >> >>> On 10 Jul 2025, at 10:40, Richard Sandiford >>> wrote: >>> >>> Kyrylo Tkachov writes: Hi all, While the SVE2 NBSL instruction accepts MOVPRFX to add more flexibility due to its tied

Re: [PATCH] MicroBlaze : Enhance support for atomics. Fix PR118280

2025-07-11 Thread Michael Eager
On 7/10/25 4:41 AM, Gopi Kumar Bulusu wrote: namaskaaram Hi Gopi! Please find the patch attached. This addresses regression for MicroBlaze (PR118280) Neal Frager posted a different patch (or an RFC) to address pr118280 on 7/1/25: https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg3

[PATCH] aarch64: Tweak handling of general SVE permutes [PR121027]

2025-07-11 Thread Richard Sandiford
This PR is partly about a code quality regression that was triggered by g:caa7a99a052929d5970677c5b639e1fa5166e334. That patch taught the gimple optimisers to fold two VEC_PERM_EXPRs into one, conditional upon either (a) the original permutations not being "native" operations or (b) the combined p

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jason Merrill
On 7/11/25 9:09 AM, Jakub Jelinek wrote: On Thu, Jul 10, 2025 at 04:35:49PM -0400, Jason Merrill wrote: --- gcc/cp/cp-gimplify.cc.jj2025-04-12 21:41:42.660924514 +0200 +++ gcc/cp/cp-gimplify.cc 2025-04-23 21:33:19.050931604 +0200 @@ -3200,7 +3200,23 @@ cp_fold (tree x, fold_flags_t fla

Re: [Patch, Fortran, Coarray, PR88076, v2] Add a shared memory multi process coarray library.

2025-07-11 Thread Jerry D
On 7/10/25 2:27 AM, Andre Vehreschild wrote: Hi all, after Jerry had the idea to use OpenCoarray's tests to also test caf_shmem, a few issue arose. Those have been fixed now in the updated patch-series. I have put all patches into one mail to allow the CIs to pick them all up and hopefully test

Re: [PATCH] ipa: Disallow signature changes in fun->has_musttail functions [PR121023]

2025-07-11 Thread Martin Jambor
Hi, On Fri, Jul 11 2025, Richard Biener wrote: > On Fri, 11 Jul 2025, Jakub Jelinek wrote: > >> Hi! >> >> As the following testcase shows e.g. on ia32, letting IPA opts change >> signature of functions which have [[{gnu,clang}::musttail]] calls >> can turn programs that would be compiled normally

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-11 Thread Uros Bizjak
On Fri, Jul 11, 2025 at 9:57 AM Uros Bizjak wrote: > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > gcc/ > > > > PR target/121015 > > * config/i386/constraints.md (BX): New constraint. > > * config/i386/i386.cc (ix86_print_operand): Support CONSTM1_RTX. > > * config/i386/mmx.md (MMXMODE:*

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-11 Thread H.J. Lu
On Fri, Jul 11, 2025 at 4:23 PM Uros Bizjak wrote: > > On Fri, Jul 11, 2025 at 9:57 AM Uros Bizjak wrote: > > > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > > > gcc/ > > > > > > PR target/121015 > > > * config/i386/constraints.md (BX): New constraint. > > > * config/i386/i386.cc (ix86_

Re: [PATCH] [x86] properly compute fp/mode for scalar ops for vectorizer costing

2025-07-11 Thread Richard Biener
On Thu, 10 Jul 2025, Richard Biener wrote: > On Thu, 10 Jul 2025, Jan Hubicka wrote: > > > > The x86 add_stmt_hook relies on the passed vectype to determine > > > the mode and whether it is FP for a scalar operation. This is > > > unreliable now for stmts involving patterns and in the future whe

[PATCH] testsuite: arm: Add effective-target vect_early_break to vect-tsvc-*

2025-07-11 Thread Torbjörn SVENSSON
Ok for trunk, gcc-15 and gcc-14. I discovered that the dg-require-effective-target is missing on gcc-14, but it's probably the right thing to add on gcc-15 and trunk too. Without the `dg-require-effective-target vect_early_break`, the `dg-add-options vect_early_break` will return the flags unchan

Re: [PATCH v1 1/2] Match: Leverage BITS_PER_WORD for unsigned SAT_MUL pattern

2025-07-11 Thread Richard Biener
On Fri, Jul 11, 2025 at 9:13 AM Li, Pan2 wrote: > > Thanks Richard for comments. > > > Why is it important to constrain the widen-mult input to a > > fixed precision at all? > > I suppose widen-mult only occurs when the result exceed the max bits of gpr. > So, here I would like to make sure the pr

GCC 12 branch is now closed

2025-07-11 Thread Richard Biener
The GCC 12 branch is now closed, no further changes can be pushed there.

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-11 Thread Uros Bizjak
On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > gcc/ > > PR target/121015 > * config/i386/constraints.md (BX): New constraint. > * config/i386/i386.cc (ix86_print_operand): Support CONSTM1_RTX. > * config/i386/mmx.md (MMXMODE:*mov_internal): Replace C with > BX for memory and integer register de

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-11 Thread Uros Bizjak
On Fri, Jul 11, 2025 at 10:39 AM H.J. Lu wrote: > > On Fri, Jul 11, 2025 at 4:23 PM Uros Bizjak wrote: > > > > On Fri, Jul 11, 2025 at 9:57 AM Uros Bizjak wrote: > > > > > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > > > > > gcc/ > > > > > > > > PR target/121015 > > > > * config/i386/

Re: [PATCH v3 2/9] opts: use uint64_t for sanitizer flags

2025-07-11 Thread Claudiu Zissulescu-Ianculescu
Hi, > > Currently, the data type of sanitizer flags is unsigned int, with > SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual > enumerator for enum sanitize_code.  Use 'uint64_t' data type to allow > for more distinct instrumentation modes be added when needed. > >

Re: [PATCH v4 0/1] Add warnings of potentially-uninitialized padding bits

2025-07-11 Thread Christopher Bazley
Ping. Thanks, Chris On 23/06/2025 14:48, Christopher Bazley wrote: Dear GCC Developers, I previously received comments from Joseph and Jakub, which I believe I addressed more than a month ago. Please could someone review version 4? Thanks, Chris On 21/05/2025 16:13, Christopher Bazley wro

Re: [PATCH] c++, libstdc++, v5: Implement C++26 P3068R5 - constexpr exceptions [PR117785]

2025-07-11 Thread Jonathan Wakely
I think we want something like this: --- a/libstdc++-v3/libsupc++/exception_ptr.h +++ b/libstdc++-v3/libsupc++/exception_ptr.h @@ -297,10 +297,13 @@ namespace std _GLIBCXX_VISIBILITY(default) /// Obtain an exception_ptr pointing to a copy of the supplied object. #if (__cplusplus >= 201103L && __

Re: [PATCH] tree-optimization/120939 - remove uninitialized use of LOOP_VINFO_COST_MODEL_THRESHOLD

2025-07-11 Thread Richard Biener
On Thu, 10 Jul 2025, Richard Sandiford wrote: > Richard Biener writes: > > The following removes an optimization that wrongly triggers right now > > because it accesses LOOP_VINFO_COST_MODEL_THRESHOLD which might not be > > computed yet. > > > > Testing on x86_64 didn't reveal any testsuite cover

Re: Rewrite assign_discriminators pass

2025-07-11 Thread Jan Hubicka
> So with this the discriminator we assign might depend on whether > we have debug stmts or not. We output them only to debug info, so > it should in principle not cause compare-debug issues, right? And > we don't use discriminators to affect code generation (hopefully). This is the reason of op

GCC 15.1.1 Status Report (2025-07-11)

2025-07-11 Thread Richard Biener
The releases/gcc-15 branch is open for regression and documentation fixes. This is now the time to prepare for the GCC 15.2 release - a release candidate is planned for Friday Aug 1st, three weeks from now, with the GCC 15.2 release following a week after that. Please go over reported regression

Re: [PATCH] tree-optimization/120939 - remove uninitialized use of LOOP_VINFO_COST_MODEL_THRESHOLD

2025-07-11 Thread Richard Sandiford
Richard Biener writes: > On Thu, 10 Jul 2025, Richard Sandiford wrote: > >> Richard Biener writes: >> > The following removes an optimization that wrongly triggers right now >> > because it accesses LOOP_VINFO_COST_MODEL_THRESHOLD which might not be >> > computed yet. >> > >> > Testing on x86_64

RE: [PATCH v1 1/2] Match: Leverage BITS_PER_WORD for unsigned SAT_MUL pattern

2025-07-11 Thread Li, Pan2
> A widen-mul could also be a QImode x QImode -> HImode operation, or a > QImode x QImode -> SImode > operation. The only restriction is the result is at least twice as > wide as the inputs. I see, that make sense, looks like what we do from truncate, will update in v2. Pan -Original Messag

RE: [PATCH] i386: Add a new peeophole2 for PR91384 under APX_F

2025-07-11 Thread Liu, Hongtao
> -Original Message- > From: Hu, Lin1 > Sent: Wednesday, June 4, 2025 3:26 PM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH] i386: Add a new peeophole2 for PR91384 under APX_F > > gcc/ChangeLog: > > PR target/91384 > * config/i386/i

Re: [Patch, fortran] PR106135 - Implement F2018 IMPORT statements

2025-07-11 Thread Paul Richard Thomas
Thanks, Jerry. Pushed as r16-2189. Note however that s/pr106135/pr106035 is required throughout. I will attend to it tomorrow. Paul On Mon, 23 Jun 2025 at 19:27, Jerry D wrote: > On 6/23/25 9:43 AM, Paul Richard Thomas wrote: > > Hello All, > > > > I was mulling over the F2018 status of gfort

[PATCH v3 5/5] riscv: testsuite: Fix misalignment check.

2025-07-11 Thread Robin Dapp
This fixes a thinko in the misalignment check. If we want to check for vector misalignment support we need to load 16-byte elements, not 8-byte elements that will never be misaligned. gcc/testsuite/ChangeLog: * lib/target-supports.exp: Fix misalignment check. --- gcc/testsuite/lib/targe

[PATCH v3 1/5] ifn: Add helper functions for gather/scatter.

2025-07-11 Thread Robin Dapp
This patch adds access helpers for the gather/scatter offset and scale parameters. gcc/ChangeLog: * internal-fn.cc (expand_scatter_store_optab_fn): Use new function. (expand_gather_load_optab_fn): Ditto. (internal_fn_offset_index): Ditto. (internal_fn_scale

[PATCH v3 4/5] vect: Misalign checks for gather/scatter.

2025-07-11 Thread Robin Dapp
This patch adds simple misalignment checks for gather/scatter operations. Previously, we assumed that those perform element accesses internally so alignment does not matter. The riscv vector spec however explicitly states that vector operations are allowed to fault on element-misaligned accesses.

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jakub Jelinek
On Thu, Jul 10, 2025 at 04:35:49PM -0400, Jason Merrill wrote: > > --- gcc/cp/cp-gimplify.cc.jj2025-04-12 21:41:42.660924514 +0200 > > +++ gcc/cp/cp-gimplify.cc 2025-04-23 21:33:19.050931604 +0200 > > @@ -3200,7 +3200,23 @@ cp_fold (tree x, fold_flags_t flags) > > loc = EXPR_LOCAT

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jonathan Wakely
On Fri, 11 Jul 2025 at 14:02, Jonathan Wakely wrote: > > The if-consteval branches in std::make_exception_ptr and > std::exception_ptr_cast use a try-catch block, which gives an error for > -fno-exceptions. Just make them return a null pointer at compile-time > when -fno-exceptions is used, becaus

[committed] testsuite: Add testcase for already fixed PR [PR120954]

2025-07-11 Thread Jakub Jelinek
Hi! This was a regression introduced by r16-1893 (and its backports) for C++, though for C it had false positive warning for years. Fixed by r16-2000 (and its backports). Tested on x86_64-linux, committed to trunk as obvious. 2025-07-11 Jakub Jelinek PR c++/120954 * c-c++-co

Re: [PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-11 Thread Siddhesh Poyarekar
On 2025-07-08 18:07, Sam James wrote: OK in principle, but please allow some time for distro maintainers (CC'd) to voice their opinion. It looks good to me and I plan on us using it. I'd like opinions from one other group first before it goes in if possible though, as our perspective is differe

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jonathan Wakely
On Fri, 11 Jul 2025 at 14:21, Jakub Jelinek wrote: > > On Fri, Jul 11, 2025 at 02:11:05PM +0100, Jonathan Wakely wrote: > > On Fri, 11 Jul 2025 at 14:02, Jonathan Wakely wrote: > > > > > > The if-consteval branches in std::make_exception_ptr and > > > std::exception_ptr_cast use a try-catch block

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jakub Jelinek
On Fri, Jul 11, 2025 at 01:47:18PM +0100, Jonathan Wakely wrote: Thanks for doing this. > @@ -301,8 +301,9 @@ namespace std _GLIBCXX_VISIBILITY(default) > _GLIBCXX26_CONSTEXPR exception_ptr > make_exception_ptr(_Ex __ex) _GLIBCXX_USE_NOEXCEPT > { > -#if __cplusplus >= 202400L > +#if

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jakub Jelinek
On Fri, Jul 11, 2025 at 02:11:05PM +0100, Jonathan Wakely wrote: > On Fri, 11 Jul 2025 at 14:02, Jonathan Wakely wrote: > > > > The if-consteval branches in std::make_exception_ptr and > > std::exception_ptr_cast use a try-catch block, which gives an error for > > -fno-exceptions. Just make them r

Re: [PATCH] testsuite: arm: Add effective-target vect_early_break to vect-tsvc-*

2025-07-11 Thread Christophe Lyon
Hi Torbjörn, On Fri, 11 Jul 2025 at 10:47, Torbjörn SVENSSON wrote: > > Ok for trunk, gcc-15 and gcc-14. > > I discovered that the dg-require-effective-target is missing on gcc-14, > but it's probably the right thing to add on gcc-15 and trunk too. > > Without the `dg-require-effective-target vec

RE: [PATCH v1 1/2] Match: Leverage BITS_PER_WORD for unsigned SAT_MUL pattern

2025-07-11 Thread Li, Pan2
Thanks Richard for comments. > Why is it important to constrain the widen-mult input to a > fixed precision at all? I suppose widen-mult only occurs when the result exceed the max bits of gpr. So, here I would like to make sure the precision is matching the bits of gpr. For rv32 with 32-bits gpr

make autprofiledbootstrap with LTO meaningful

2025-07-11 Thread Jan Hubicka
Hello, currently autoprofiled bootstrap produces auto-profiles for cc1 and cc1plus binaries. Those are used to build respective frontend files. For backend cc1plus.fda is used. This does not work well with LTO bootstrap where cc1plus backend is untrained since it is used only for parsing and eal

[PATCH 1/7 v2] RISC-V: Add basic XAndes vendor extension support.

2025-07-11 Thread Kuan-Lin Chen
This patch add basic support for the following XAndes ISA extensions: XANDESPERF XANDESBFHCVT XANDESVBFHCVT XANDESVSINTLOAD XANDESVPACKFPH XANDESVDOT gcc/ChangeLog: * config/riscv/riscv-ext.def: Include riscv-ext-andes.def. * config/riscv/riscv-ext.opt (riscv_xandes_subext): New

[PATCH 0/7 v2] Add Xandes vender extension support.

2025-07-11 Thread Kuan-Lin Chen
Changes since v1: [PATCH 1/7] Replaced "UPPERCAE_NAME" with "UPPERCASE_NAME". [PATCH 2/7] Renamed predicates - extract_loc_imm_si → unsigned_5_bit_integer_operand - extract_loc_imm_di → unsigned_6_bit_integer_operand Replaced with existing predicates - Used const_int6_operand in place of ext

Re: Rewrite assign_discriminators pass

2025-07-11 Thread Richard Biener
On Thu, 10 Jul 2025, Jan Hubicka wrote: > Hi, > to assign debug locations to corresponding statements auto-fdo uses > discriminators. Documentation says that if given statement belongs to > multiple > basic blocks, the discrminator distinguishes them. > > Current implementation however only wor

[PATCH 3/7 v2] RISC-V: Add support for the XAndesbfhcvt ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This extension defines instructions to perform scalar floating-point conversion between the BFLOAT16 floating-point data and the IEEE-754 32-bit single-precision floating-point (SP) data in a scalar floating point register. gcc/ChangeLog: * config/riscv/andes.def: Add nds_fcvt_s_bf16 and

[PATCH 7/7 v2] RISC-V: Add support for the XAndesvdot ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This extension defines vector instructions to calculae of the signed/unsigned dot product of four SEW/4-bit data and accumulate the result into a SEWbit element for all elements in a vector register. gcc/ChangeLog: * config/riscv/andes-vector-builtins-bases.cc (nds_vd4dot): New class.

[PATCH 2/7 v2] RISC-V: Add support for the XAndesperf ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This patch adds support for the XAndesperf ISA extension. The 32-bit AndeStar V5 extension includes branch instructions, load effective address instructions, and string processing instructions for performance improvement. New INSN patterns are added into the new file andes.md as a seprated vender e

[PATCH 4/7 v2] RISC-V: Add support for the XAndesvbfhcvt ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This patch add support for XAndesvbfhcvt ISA extension. This extension defines instructions to perform vector floating-point conversion between the BFLOAT16 floating-point data and the IEEE-754 32-bit single-precision floating-point (SP) data in a vector register. gcc/ChangeLog: * common/

[PATCH v3 0/5] vect: Misalign for gather/scatter.

2025-07-11 Thread Robin Dapp
Hi, this is v3 with the patch split up into multiple ones. Sorry that it took so long... The first two patches and the fifth are independent but (3) and (4) are not so they would be squashed. 4 is still the largest one and now includes the suggested refactoring. It's still not terribly obvious w

[PATCH v3 2/5] vect: Add helper macros for gather/scatter.

2025-07-11 Thread Robin Dapp
This encapsulates the IFN and the builtin-function way of handling gather/scatter via three defines: GATHER_SCATTER_IFN_P GATHER_SCATTER_LEGACY_P GATHER_SCATTER_EMULATED_P and introduces a helper define for SLP operand handling as well. gcc/ChangeLog: * tree-vect-slp.cc (GATHER_SC

[PATCH 5/7 v2] RISC-V: Add support for the XAndesvsintload ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This extension defines vector load instructions to move sign-extended or zero-extended INT4 data into 8-bit vector register elements. gcc/ChangeLog: * config/riscv/andes-vector-builtins-bases.cc (nds_nibbleload): New class. * config/riscv/andes-vector-builtins-bases.h (nds

[PATCH 6/7 v2] RISC-V: Add support for the XAndesvpackfph ISA extension.

2025-07-11 Thread Kuan-Lin Chen
This extension defines vector instructions to extract a pair of FP16 data from a floating-point register. Multiply the top FP16 data with the FP16 elements and add the result with the bottom FP16 data. gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Turn on VECTOR_ELEN_FP_16

[PATCH v3 3/5] vect: Add is_gather_scatter argument to misalignment hook.

2025-07-11 Thread Robin Dapp
This patch adds an is_gather_scatter argument to the support_vector_misalignment hook. All targets but riscv do not care about alignment for gather/scatter so return true for is_gather_scatter. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_builtin_support_vector_misalignment):

[PATCH] aarch64: Support unpacked SVE integer division

2025-07-11 Thread Spencer Abson
This patch extends the existing patterns for SVE_INT_BINARY_SD to support partial SVE integer modes, including those implement the conditional form. gcc/ChangeLog: * config/aarch64/aarch64-sve.md (3): Extend to SVE_SDI_SIMD. (@aarch64_pred_): Likewise. (@cond_): Ex

[PATCH] tree-optimization/121034 - fix reduction vectorization

2025-07-11 Thread Richard Biener
The following fixes the loop following the reduction chain to properly visit all SLP nodes involved and makes the stmt info and the SLP node we track match. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/121034 * tree-vect-loop.cc (vectorizable_r

[PATCH][v2] Reject single lane vector types for SLP build

2025-07-11 Thread Richard Biener
The following makes us never consider vector(1) T types for vectorization and ensures this during SLP build. This is a long-standing issue for BB vectorization and when we remove early loop vector type setting we lose the single place we have that rejects this for loops. Once we implement partial

[PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jonathan Wakely
The if-consteval branches in std::make_exception_ptr and std::exception_ptr_cast use a try-catch block, which gives an error for -fno-exceptions. Just make them return a null pointer at compile-time when -fno-exceptions is used, because there's no way to get an active exception with -fno-exceptions

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jonathan Wakely
On Fri, 11 Jul 2025 at 14:19, Jakub Jelinek wrote: > > On Fri, Jul 11, 2025 at 01:47:18PM +0100, Jonathan Wakely wrote: > Thanks for doing this. > > > @@ -301,8 +301,9 @@ namespace std _GLIBCXX_VISIBILITY(default) > > _GLIBCXX26_CONSTEXPR exception_ptr > > make_exception_ptr(_Ex __ex) _G

Re: [PATCH] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jakub Jelinek
On Fri, Jul 11, 2025 at 02:26:28PM +0100, Jonathan Wakely wrote: > On Fri, 11 Jul 2025 at 14:19, Jakub Jelinek wrote: > > > > On Fri, Jul 11, 2025 at 01:47:18PM +0100, Jonathan Wakely wrote: > > Thanks for doing this. > > > > > @@ -301,8 +301,9 @@ namespace std _GLIBCXX_VISIBILITY(default) > > >

Re: [PATCH] aarch64: PR target/120999: Avoid movprfx for NBSL implementation of NOR

2025-07-11 Thread Kyrylo Tkachov
> On 10 Jul 2025, at 11:12, Kyrylo Tkachov wrote: > > > >> On 10 Jul 2025, at 10:40, Richard Sandiford >> wrote: >> >> Kyrylo Tkachov writes: >>> Hi all, >>> >>> While the SVE2 NBSL instruction accepts MOVPRFX to add more flexibility >>> due to its tied operands, the destination of the m

[PATCH v2] libstdc++: Fix constexpr exceptions for -fno-exceptions

2025-07-11 Thread Jonathan Wakely
The if-consteval branches in std::make_exception_ptr and std::exception_ptr_cast use a try-catch block, which gives an error for -fno-exceptions. Just make them return a null pointer at compile-time when -fno-exceptions is used, because there's no way to get an active exception with -fno-exceptions

Fix ICE with speculative devirtualization

2025-07-11 Thread Jan Hubicka
Hi, this patch fixes ICE bilding lto1 with autoprofiledbootstrap and in pr114790. What happens is that auto-fdo speculatively devirtualizes to a wrong target. This is due to a bug where it mixes up dwarf names and linkage names of inline functions I need to fix as well. Later we clone at WPA time.

Re: make autprofiledbootstrap with LTO meaningful

2025-07-11 Thread Andi Kleen
On Fri, Jul 11, 2025 at 12:14:46PM +0200, Jan Hubicka wrote: > Hello, > currently autoprofiled bootstrap produces auto-profiles for cc1 and > cc1plus binaries. Those are used to build respective frontend files. > For backend cc1plus.fda is used. This does not work well with LTO > bootstrap where

Re: [PATCH v3] libstdc++: Implement std::chrono::current_zone() for Windows

2025-07-11 Thread Jonathan Wakely
On 10/07/25 09:48 +0200, Björn Schäpers wrote: From: Björn Schäpers On Windows there is no API to get the current time zone as IANA name, instead Windows has its own zones. But there exists a mapping provided by the Unicode Consortium. This patch adds a script to convert the XML file with the m

Re: [PATCH v2] libstdc++: implement Philox Engine [PR119794]

2025-07-11 Thread Patrick Palka
Hi, On Thu, 22 May 2025, 1nfocalypse wrote: > Implements Philox Engine (P2075R6) and associated tests. > > v2 corrects a multiline comment left in error in serialize.cc, and > additionally corrects a bug hidden by said comment, where the stream was > given the output of 'y()' instead of 'y', c

Patch ping (Re: [PATCH] libstdc++: library side of C++26 P2786R13 - Trivial Relocatability [PR119064])

2025-07-11 Thread Jakub Jelinek
Hi! On Tue, Jun 17, 2025 at 01:14:03PM +0200, Jakub Jelinek wrote: > Here is a new version of the library side of the C++26 P2786R13 paper. > For if constexpr the patch uses __builtin_constant_p trick to figure > out if __result is non-equality comparable with __first, it adds recursion > for the

Re: [PATCH v2] libstdc++: implement Philox Engine [PR119794]

2025-07-11 Thread Jonathan Wakely
On Fri, 11 Jul 2025 at 18:12, Jonathan Wakely wrote: > > > +static constexpr std::array multipliers = > > > + philox_engine::__popMultArray(); > > > +static constexpr std::array round_consts = > > > + philox_engine::__popConstArray(); > > Since you're creating static data m

Re: [PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-11 Thread Siddhesh Poyarekar
On 2025-07-11 15:28, Uros Bizjak wrote: Why not just switch over unconditionally? __fentry__ seems like a better alternative to mcount overall and it has been around long enough that even older deployments should be relatively unaffected. Actually, it is switched on by default for i?86-*-linux

Re: [PATCH 2/2] lra: Reallow reloading user hard registers if the insn is not asm [PR 120983]

2025-07-11 Thread Vladimir Makarov
On 7/8/25 9:43 PM, Xi Ruoyao wrote: The PR 87600 fix has disallowed reloading user hard registers to resolve earlyclobber-induced conflict. However before reload, recog completely ignores the constraints of insns, so the RTL passes may produce insns where some user hard registers violate an ea

Re: [PATCH] aarch64: Tweak handling of general SVE permutes [PR121027]

2025-07-11 Thread Richard Sandiford
Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Friday, July 11, 2025 4:23 PM >> To: gcc-patches@gcc.gnu.org >> Cc: Alex Coplan ; Alice Carlotti >> ; >> pins...@gmail.com; ktkac...@nvidia.com; Richard Earnshaw >> ; Tamar Christina ; >> Wilco Dijkstra >>

Re: [PATCH] testsuite: Disable musttail tests if target uses SJLJ exceptions

2025-07-11 Thread Andi Kleen
Dimitar Dimitrov writes: > A few tests started failing recently on pru-unknown-elf because it uses > SJLJ implementation for exceptions: > FAIL: g++.dg/ext/musttail3.C -std=c++11 (test for excess errors) > .../gcc/gcc/testsuite/g++.dg/ext/musttail3.C:12:34: error: cannot > tail-call: caller

Re: [PATCH v3 2/9] opts: use uint64_t for sanitizer flags

2025-07-11 Thread Andrew Pinski
On Fri, Jul 11, 2025 at 2:51 AM Claudiu Zissulescu-Ianculescu wrote: > > Hi, > > > > Currently, the data type of sanitizer flags is unsigned int, with > > SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual > > enumerator for enum sanitize_code. Use 'uint64_t' data type to

Re: [PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-11 Thread Sam James
Siddhesh Poyarekar writes: > On 2025-07-08 18:07, Sam James wrote: >>> OK in principle, but please allow some time for distro maintainers >>> (CC'd) to voice their opinion. >> It looks good to me and I plan on us using it. I'd like opinions >> from >> one other group first before it goes in if po

Re: Rewrite assign_discriminators pass

2025-07-11 Thread Andrew Pinski
On Fri, Jul 11, 2025 at 2:26 AM Richard Biener wrote: > > On Thu, 10 Jul 2025, Jan Hubicka wrote: > > > Hi, > > to assign debug locations to corresponding statements auto-fdo uses > > discriminators. Documentation says that if given statement belongs to > > multiple > > basic blocks, the discrmi

Re: [PATCH v2] libstdc++: implement Philox Engine [PR119794]

2025-07-11 Thread Jonathan Wakely
On Fri, 11 Jul 2025 at 17:30, Patrick Palka wrote: > > Hi, > > On Thu, 22 May 2025, 1nfocalypse wrote: > > > Implements Philox Engine (P2075R6) and associated tests. > > > > v2 corrects a multiline comment left in error in serialize.cc, and > > additionally corrects a bug hidden by said comment,

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jakub Jelinek
On Fri, Jul 11, 2025 at 02:34:24PM -0400, Jason Merrill wrote: > But by the time we get to cp_fold, DECL_READ_P should have already been set > appropriately when we built the thing we're now folding. And calling Clearly it hasn't been, otherwise I'd need to patch different spots as well. > mark_

Re: [EXT] Re: [PATCH 2/2] lra: Reallow reloading user hard registers if the insn is not asm [PR 120983]

2025-07-11 Thread Peter Bergner
On 7/11/25 10:22 AM, Vladimir Makarov wrote: > On 7/8/25 9:43 PM, Xi Ruoyao wrote: >> >> IIUC "recog does not look at constraints until reload" has been a >> well-established rule in GCC for years and I don't have enough skill to >> challange it. So reallow reloading user hard registers (but still

[pushed: r16-2208] libgdiagnostics: doc fixes

2025-07-11 Thread David Malcolm
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r16-2208-g457464edf19f17. gcc/ChangeLog: * doc/libgdiagnostics/topics/compatibility.rst (_LIBGDIAGNOSTICS_ABI_2): Add missing anchor. * doc/libgdiagnostics/topics/diagnostic-manager.rst

[pushed: r16-2209] json: fix null-termination of json::string

2025-07-11 Thread David Malcolm
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r16-2209-g1ea72a15031cd8. gcc/ChangeLog: * json.cc (string::string): When constructing from pointer and length, ensure the new buffer is null-terminated. (selftest::test_strcmp): New.

[pushed: r16-2210] json: add json::value::clone

2025-07-11 Thread David Malcolm
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r16-2210-gd7c1e9b37caad5. gcc/ChangeLog: * json.cc (json::object::clone): New. (json::object::clone_as_object): New. (json::array::clone): New. (json::float_number::clone): New.

Re: [PATCH] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

2025-07-11 Thread Jason Merrill
On 7/11/25 3:00 PM, Jakub Jelinek wrote: On Fri, Jul 11, 2025 at 02:34:24PM -0400, Jason Merrill wrote: But by the time we get to cp_fold, DECL_READ_P should have already been set appropriately when we built the thing we're now folding. And calling Clearly it hasn't been, otherwise I'd need t

Re: [PATCH] testsuite: Disable musttail tests if target uses SJLJ exceptions

2025-07-11 Thread Joern Wolfgang Rennecke
Andi Kleen: > I would rather make it XFAIL and also open a PR, after all it is a limitation that could (and should) be fixed. Huh, I didn't see this thread in time. For the special case that the exception handling code in the caller is empty - which is what mustcall3.C and mustcall5.C are testin

Re: [PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-11 Thread Uros Bizjak
On Fri, Jul 11, 2025 at 2:33 PM Siddhesh Poyarekar wrote: > > On 2025-07-08 18:07, Sam James wrote: > >> OK in principle, but please allow some time for distro maintainers > >> (CC'd) to voice their opinion. > > > > It looks good to me and I plan on us using it. I'd like opinions from > > one othe

Re: [PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-11 Thread Sam James
Uros Bizjak writes: > On Fri, Jul 11, 2025 at 2:33 PM Siddhesh Poyarekar > wrote: >> >> On 2025-07-08 18:07, Sam James wrote: >> >> OK in principle, but please allow some time for distro maintainers >> >> (CC'd) to voice their opinion. >> > >> > It looks good to me and I plan on us using it. I'

Re: [PATCH] testsuite: arm: Add effective-target vect_early_break to vect-tsvc-*

2025-07-11 Thread Torbjorn SVENSSON
Hi Christophe, On 2025-07-11 15:47, Christophe Lyon wrote: Hi Torbjörn, On Fri, 11 Jul 2025 at 10:47, Torbjörn SVENSSON wrote: Ok for trunk, gcc-15 and gcc-14. I discovered that the dg-require-effective-target is missing on gcc-14, but it's probably the right thing to add on gcc-15 and trun

RE: [PATCH] aarch64: Tweak handling of general SVE permutes [PR121027]

2025-07-11 Thread Tamar Christina
> -Original Message- > From: Richard Sandiford > Sent: Friday, July 11, 2025 4:23 PM > To: gcc-patches@gcc.gnu.org > Cc: Alex Coplan ; Alice Carlotti > ; > pins...@gmail.com; ktkac...@nvidia.com; Richard Earnshaw > ; Tamar Christina ; > Wilco Dijkstra > Subject: [PATCH] aarch64: Tweak ha

Re: [PATCH] Allow explicitly specifying the thread model for runtime libs

2025-07-11 Thread John Ericson
Hello, this 4-year-old patch of mine was never reviewed. Per https://github.com/NixOS/nixpkgs/pull/414299, we in a package set / distro, Nixpkgs/NixOS, just began (albeit on an experimental basis) packaging GCC with this patch (among others) applied. It would thus be nice to get it applied upst

Re: [PATCH] ipa, cgraph: Enable constant propagation to OpenMP kernels

2025-07-11 Thread Martin Jambor
Hello, and sorry for a rather late reaction. First and foremost, thanks for the patch, I think it is great to have this finally implemented and although I would like to see a couple things changed, I think the patch is quite close to what could be committed to gcc master. After my first pass thr

[committed] PR modula2/120253: Error message column numbers should start at 1 not 0

2025-07-11 Thread Gaius Mulley
This patch ensures that column numbers start at 1 rather than 0. gcc/m2/ChangeLog: PR modula2/120253 * m2.flex (FIRST_COLUMN): New define. (updatepos): Remove commented code. (consumeLine): Assign column to FIRST_COLUMN. (initLine): Ditto. (m2fle

Re: [PATCH v2] libstdc++: implement Philox Engine [PR119794]

2025-07-11 Thread 1nfocalypse
Good evening! Thank you both for the review, I'll get to work on cleaning it up and send out a v3 soon. Additionally, don't worry about the delay, and thank you for your patience. Have a good weekend! Regards, 1nfocalypse On Friday, July 11th, 2025 at 9:29 AM, Patrick Palka wrote: > Hi, > >

Re: [Patch] Fortran/OpenACC: Permit PARAMETER as 'var' in clauses (+ ignore)

2025-07-11 Thread Tobias Burnus
Now, finally pushed as r16-2213-g451b6dbf475959. Tobias On June 27, 2025, Tobias Burnus wrote: Background: In real-world code, one can find: !$ACC DECLARE COPYIN(c1es, c2es, ...) as here for the ICON weather model. This clearly implies that other compilers accept and, potentially, require th

Re: Rewrite assign_discriminators pass

2025-07-11 Thread H.J. Lu
On Fri, Jul 11, 2025 at 7:32 PM Jan Hubicka wrote: > > > So with this the discriminator we assign might depend on whether > > we have debug stmts or not. We output them only to debug info, so > > it should in principle not cause compare-debug issues, right? And > > we don't use discriminators to

Re: [PATCH] testsuite: arm: Add effective-target vect_early_break to vect-tsvc-*

2025-07-11 Thread Alexandre Oliva
On Jul 11, 2025, Christophe Lyon wrote: > I have another concern (hence cc'ing Alexandre): vect.exp calls > check_vect_support_and_set_flags which defines dg-do-what-default > according to what it discovers, meaning that for some targets these > tests are 'run' and on others they are just 'compil