[PATCH, FYI] [vxworks] [x86] disable vxworks6 PIC on vxworks7

VxWorks6 used symbols __GOTT_BASE__ and __GOTT_INDEX__ to obtain the address of the global offset table. Starting with VxWorks7, that is no longer the case, but we've still issued these symbols in output_set_got. Do that only with VxWorks<7. Switching to the call-based PIC register sequence, w

[committed] Minor fix to gcc.dg/torture/pr120654.c

I don't recall which port complained, but pr120654.c was failing on one or more of the embedded targets due to the use of malloc/free. This change just turns them into the __builtin variants which makes everyone happy again. Pushing to the trunk. jeffcommit 477abe67d34f7f8d1b0b12408e08769995

Re: [PUSHED] GCN, nvptx: Support '-mfake-exceptions', and use it for offloading compilation [PR118794]

Hi Jan-Benedict! On 2025-06-05T10:24:35+0200, Jan-Benedict Glaw wrote: > On Tue, 2025-04-15 00:22:26 +0200, Thomas Schwinge > wrote: >> diff --git a/gcc/except.cc b/gcc/except.cc >> index d5eb9274a62..205811c6567 100644 >> --- a/gcc/except.cc >> +++ b/gcc/except.cc >> @@ -970,12 +970,26 @@ expa

Re: [PATCH 2/2] add masked-epilogue tuning

On Mon, Jul 7, 2025 at 3:18 PM Hongtao Liu wrote: > > On Fri, Jul 4, 2025 at 5:45 PM Richard Biener wrote: > > > > The following adds a x86 tuning to enable the use of AVX512 masked > > epilogues in cases we heuristically determine it to be not detrimental > > by high chance. Basically problemat

Re: [PATCH v3] x86: Improve vector_loop/unrolled_loop for memset/memcpy

On Mon, Jul 7, 2025 at 3:27 PM Hongtao Liu wrote: > > On Tue, Jun 24, 2025 at 2:11 PM H.J. Lu wrote: > > > > On Mon, Jun 23, 2025 at 2:24 PM H.J. Lu wrote: > > > > > > On Wed, Jun 18, 2025 at 3:17 PM H.J. Lu wrote: > > > > > > > > 1. Don't generate the loop if the loop count is 1. > > > > 2. Fo

Re: [PATCH 2/2] add masked-epilogue tuning

On Mon, 7 Jul 2025, Hongtao Liu wrote: > On Mon, Jul 7, 2025 at 3:18 PM Hongtao Liu wrote: > > > > On Fri, Jul 4, 2025 at 5:45 PM Richard Biener wrote: > > > > > > The following adds a x86 tuning to enable the use of AVX512 masked > > > epilogues in cases we heuristically determine it to be not

[PATCH v2] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

From: XU Kailiang C++ formatting locale could have a custom time_put that performs differently from the C locale, so do not use __timepunct directly, instead all of above specifiers use _M_locale_fmt. For %a/%A/%b/%h/%B, the code handling the exception is now moved to the _M_check_ok function, t

Re: [PATCH v2] s390: Add some missing vector patterns.

On Wed, Jun 25, 2025 at 10:04:49AM +0200, Juergen Christ wrote: > Some patterns that are detected by the autovectorizer can be supported by > s390. Add expanders such that autovectorization of these patterns works. > > RTL for the builtins used unspec to represent highpart multiplication. > Repla

Re: [PATCH v3 0/5] Implement mdspan.

On 7/7/25 11:01, Tomasz Kaminski wrote: Hi, The patches look good to me, the only real comment is about using header guard, that I plan to do locally. I am testing on full test suite now, and will merge them pending the approval from Jonathan. From the patch that will set __cpp_lib_mdspan,

Re: [PATCH v3 2/5] libstdc++: Check prerequisite of extents::extents.

On Fri, 4 Jul 2025 at 09:30, Luc Grosheintz wrote: > > Previously the prerequisite of the extents ctors that > > static_extent(i) == dynamic_extent || extent(i) == other.extent(i). > > was not checked. This commit adds the __glibcxx_assert and test them. > > libstdc++-v3/ChangeLog: > >

Re: [PATCH v3 3/5] libstdc++: Restructure mdspan tests to reuse IntLike.

On Fri, Jul 4, 2025 at 10:37 AM Luc Grosheintz wrote: > The class IntLike is used for testing extents with user-defined classes > that convert to int. This commit places the class into a separate header > file. This allows it to be reused across different parts of the mdspan > related testsuite.

Re: [PATCH] libstdc++: Format __float128 as _Float128 only when long double is not 128 IEE [PR119246]

On Fri, 16 May 2025 at 12:04, Tomasz Kamiński wrote: > > For powerpc64 and sparc architectures that both have __float128 and 128bit > long double, > the __float128 is same type as long double/__iee128 and already formattable. __ieee128 > > Remaining specializaiton make __float128 formattable on

Re: [PATCH v3 4/5] libstdc++: Implement __mdspan::__size.

On Fri, Jul 4, 2025 at 10:34 AM Luc Grosheintz wrote: > The current code uses __mdspan::__fwd_prod(__exts, __rank) to express > computing the size of an extent. This commit adds an function __mdspan:: > __size(__exts) to express the idea more directly. > > libstdc++-v3/ChangeLog: > > * in

[PATCH] aarch64: Implement sme2+faminmax extension.

Hello all, This patch implements the couple of amin/amax instructions that are part of SME2 + faminmax. Regression testsed and bootstrapped for Aarch64. Thanks, Alfie -- >8 -- Implements the sme2+faminmax svamin and svamax intrinsics. gcc/ChangeLog: * config/aarch64/aarch64-sme.md (@

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On Sat, Jul 5, 2025 at 2:10 PM Siddhesh Poyarekar wrote: > > On 2025-07-05 07:23, Richard Biener wrote: > >> OK, should I revert right away or can we wait till Qing returns on Monday? > > > > Monday is OK with me. > > > > Thanks, so I thought about this some more and I think when I said in > bugzi

Re: [PATCH, v2] Fortran: fix minor issues with coarrays (extended)

Hi Harald, I totally understand your confusion. I also had a hard time figuring what is needed there. I got to restructure the code fragment and now only allow pure *and* elemental intrinsic function and pure *and* elemental user-defined functions (hoping that's the opposite of intrinsics) in a ca

Re: Add template keyword to for Clang

On Mon, 7 Jul 2025 at 12:25, Luc Grosheintz wrote: > > > > On 7/5/25 01:13, Jonathan Wakely wrote: > > Clang wants this change: > > > > --- a/libstdc++-v3/include/std/mdspan > > +++ b/libstdc++-v3/include/std/mdspan > > @@ -509,7 +509,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION > > > > template > >

Re: [PATCH v2] s390: Optimize fmin/fmax.

On Wed, Jun 25, 2025 at 10:04:41AM +0200, Juergen Christ wrote: > On VXE targets, we can directly use the fp min/max instruction instead of > calling into libm for fmin/fmax etc. > > Provide fmin/fmax versions also for vectors even though it cannot be > called directly. This will be exploited wit

Re: [PATCH 0/7] Improve bit-manipulation SIMD codegen for 64-bit types

Resending due to difficulties with my email > On 7 Jul 2025, at 11:56, Kyrylo Tkachov wrote: > > Hi all, > > This series improves code generation for 64-bit vector types as well as the > scalar DImode types. > It makes use of SHA3 and SVE2 instructions like BCAX, EOR3, BSL*. > The first 2 patc

[PATCH 1/7] aarch64: Allow 64-bit vector modes in pattern for BCAX instruction

Hi all, The BCAX instruction from TARGET_SHA3 only operates on the full .16b form of the inputs but as it's a pure bitwise operation we can use it for the 64-bit modes as well as there we don't care about the upper 64 bits. This patch extends the relevant pattern in aarch64-simd.md to accept the 6

Re: [PATCH v3 5/5] libstdc++: Implement mdspan and tests [PR107761].

On 7/7/25 11:52, Jonathan Wakely wrote: On Fri, 4 Jul 2025 at 09:37, Luc Grosheintz wrote: Implements the class mdspan as described in N4950, i.e. without P3029. It also adds tests for mdspan. This commit completes the implementation of P0009, i.e. the C++23 part . PR libstdc++/10

Re: [PATCH] libstdc++: Make debug iterator pointer sequence const [PR116369]

On Sat, 5 Jul 2025 at 14:03, François Dumont wrote: > > On 01/07/2025 22:51, Jonathan Wakely wrote: > > On Mon, 16 Jun 2025 at 18:36, François Dumont wrote: > >> I eventually wonder if it is such a big deal to add the new symbols for > >> _GLIBCXX_DEBUG mode. > > I like this version much more th

Re: [PATCH v3 5/5] libstdc++: Implement mdspan and tests [PR107761].

On Mon, 7 Jul 2025 at 11:11, Luc Grosheintz wrote: > > > > On 7/7/25 11:52, Jonathan Wakely wrote: > > On Fri, 4 Jul 2025 at 09:37, Luc Grosheintz > > wrote: > >> > >> Implements the class mdspan as described in N4950, i.e. without P3029. > >> It also adds tests for mdspan. This commit completes

[PATCH 3/7] aarch64: Handle DImode BCAX operations

Hi all, To handle DImode BCAX operations we want to do them on the SIMD side only if the incoming arguments don't require a cross-bank move. This means we need to split back the combination to separate GP BIC+EOR instructions if the operands are expected to be in GP regs through reload. The split

[PATCH 2/7] aarch64: Use EOR3 for 64-bit vector modes

Hi all, Similar to the BCAX patch, we can also use EOR3 for 64-bit modes, just by adjusting the mode iterator used. Thus for input: uint32x2_t bcax_s (uint32x2_t a, uint32x2_t b, uint32x2_t c) { return EOR3 (a, b, c); } we now generate: bcax_s: eor3 v0.16b, v0.16b, v1.16b, v2.16b ret instead o

[PATCH 5/7] aarch64: Use SVE2 NBSL for DImode arguments

Hi all, Similar to the BCAX and EOR3 patterns from TARGET_SHA3 we can use the SVE2 NBSL instruction for DImode arugments when they come in SIMD registers. Again, this is accomplished with a new splitter for the GP case. I noticed that the split has a side-effect of producing a GP EON instruction w

Re: [PATCH v3 1/5] libstdc++: Check prerequisites of layout_*::operator().

On Fri, Jul 4, 2025 at 10:32 AM Luc Grosheintz wrote: > Previously, the prerequisite that the arguments passed to operator() are > a multi-dimensional index (of extents()) was not checked. > > Both mapping::operator() and mdspan::operator[] have the same > prerequisite. Since, mdspan must check t

[PATCH 4/7] aarch64: Use EOR3 for DImode values

Hi all, Similar to BCAX, we can use EOR3 for DImode, but we have to be careful not to force GP<->SIMD moves unnecessarily, so add a splitter for that case. So for input: uint64_t eor3_d_gp (uint64_t a, uint64_t b, uint64_t c) { return EOR3 (a, b, c); } uint64x1_t eor3_d (uint64x1_t a, uint64x1_t

[PATCH 6/7] aarch64: Use SVE2 BSL1N for DImode arguments

Hi all, Similar to other patches in this series, this patch adds a splitter for DImode BSL1N operations, taking care to generate the right code in the GP regs case. Thus for the testcase we generate: bsl1n_gp: eon x0, x0, x1 and x0, x0, x2 eor x0, x0, x1 ret bsl1n_d: bsl1n z0.d, z0.d, z1.d, z2.d

Re: Add template keyword to for Clang

On Mon, 7 Jul 2025 at 07:53, Tomasz Kaminski wrote: > > Thanks. > I am not sure if template is necessary here, as I believe this is type-only > context, but I never understood the rules around this. Same here. I remain unconvinced that relaxing the rules in the standard was a good idea. "You alw

[PATCH 7/7] aarch64: Use BSL2N for DImode operands

Hi all, The intent of the patch is similar to previous in the series. Make more use of BSL2N when we have DImode operands in SIMD regs, but still use the GP instructions when that's where the operands are. Compared to the previous patches there are a couple of complications: * The operands are a b

Re: [PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

On 7/7/25 11:45, Tomasz Kaminski wrote: On Mon, Jul 7, 2025 at 11:41 AM Luc Grosheintz wrote: libstdc++-v3/ChangeLog: * include/bits/version.def (mdspan): Set to 202207 and remove no_stdname. * include/bits/version.h: Regenerate. * testsuite/23_container

Re: [PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

On 7/7/25 13:30, Tomasz Kaminski wrote: Ah, I just missed the other e-mail, and just found it. Yes, in that case it makes sense to include it in the patch series. You may also update the last two commits. I'm not quite sure what you mean by "update the last two commits". Do you mean that I s

Re: [PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

On Mon, Jul 7, 2025 at 2:11 PM Luc Grosheintz wrote: > > On 7/7/25 13:30, Tomasz Kaminski wrote: > > Ah, I just missed the other e-mail, and just found it. > > Yes, in that case it makes sense to include it in the patch series. > > You may also update the last two commits. > > I'm not quite sure

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On Mon, Jul 07, 2025 at 07:21:26AM -0400, Siddhesh Poyarekar wrote: > > is .ACCESS_WITH_SIZE documented? I can't find it documented in the > > internals manual, internal-fn.def has > > It's documented in tree-object-size.cc as: > > /* Compute __builtin_object_size for a CALL to .ACCESS_WITH_SIZE

[pushed] c++: -Wno-abbreviated-auto-in-template-arg [PR120917]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- In r14-1659 I added a missing error for a Concepts TS feature that we were failing to diagnose, but this PR requests a way to disable that error for code written thinking it was valid. Which seems reasonable, since it doesn't require any wo

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On Mon, Jul 07, 2025 at 09:07:14AM -0400, Siddhesh Poyarekar wrote: > On 2025-07-07 08:48, Jakub Jelinek wrote: > > > The return value of .ACCESS_WITH_SIZE clobbering PTR (that subsequently > > > gets > > > passed to __builtin_dynamic_object_size) should be sufficient to fully > > > prevent the re

RE: [PATCH] tree-optimization/120817 - bogus DSE of .MASK_STORE

On Mon, 7 Jul 2025, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Monday, July 7, 2025 12:30 PM > > To: gcc-patches@gcc.gnu.org > > Cc: Tamar Christina > > Subject: [PATCH] tree-optimization/120817 - bogus DSE of .MASK_STORE > > > > DSE used ao_ref_ini

Re: [PATCH v3 1/5] libstdc++: Check prerequisites of layout_*::operator().

On 7/4/25 10:29, Luc Grosheintz wrote: Previously, the prerequisite that the arguments passed to operator() are a multi-dimensional index (of extents()) was not checked. Both mapping::operator() and mdspan::operator[] have the same prerequisite. Since, mdspan must check the prerequisite for us

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On 2025-07-07 08:48, Jakub Jelinek wrote: The return value of .ACCESS_WITH_SIZE clobbering PTR (that subsequently gets passed to __builtin_dynamic_object_size) should be sufficient to fully prevent the reordering, it shouldn't have to clobber &PTR, I think. The original use of .ACCESS_WITH_SIZE

Re: [PATCH] [testsuite] [arm] adjust fp16-aapcs for gcc-14

Hi Christophe, Alexandre, Andrew and Richard, Sorry for the very late reply. I've been occupied with other tasks than GCC for the past 3 months. On 2025-05-20 09:56, Christophe Lyon wrote: On Tue, 20 May 2025 at 06:30, Alexandre Oliva wrote: (The backport I've only just posted is not enou

[PATCH v3] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

From: XU Kailiang C++ formatting locale could have a custom time_put that performs differently from the C locale, so do not use __timepunct directly, instead all of above specifiers use _M_locale_fmt. For %a/%A/%b/%h/%B, the code handling the exception is now moved to the _M_check_ok function, t

Re: [PATCH v3 5/5] libstdc++: Implement mdspan and tests [PR107761].

I used TEST_MDSPAN_LAYOUT_LIKE_H as header guard. On Mon, Jul 7, 2025 at 10:58 AM Tomasz Kaminski wrote: > > > On Fri, Jul 4, 2025 at 10:37 AM Luc Grosheintz > wrote: > >> Implements the class mdspan as described in N4950, i.e. without P3029. >> It also adds tests for mdspan. This commit comple

Re: [PATCH] Handle non default git configurations with mklog

On Tue, 1 Jul 2025, Pierre-Emmanuel Patry wrote: > Mklog parses the diff content from prepare-commit-msg hook but fails > when git has been configured with some options (eg. mnemonicPrefix). > Forcing the default values for the prefixes and the algorithm would > set a distinct diff configuration

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On 2025-07-07 09:14, Jakub Jelinek wrote: So that ought to be &a->fam[0] right, and not &a->fam? It means the same for a FAM, so why not specify it as &a->fam[0] (or simply a->fam)? That will be consistent with when fam is a pointer. The only difference between &a->fam[0] and &a->fam is not th

Re: [PATCH] testsuite: Restore dg-do run on pr116906 and pr78185 tests

On 2025-07-03 15:02, Christophe Lyon wrote: ping^2 ? Looks fine to me, but as you know, my approval does not count. Kind regards, Torbjörn On Wed, 18 Jun 2025 at 12:11, Christophe Lyon wrote: ping? On Mon, 26 May 2025 at 17:26, Christophe Lyon wrote: On Mon, 26 May 2025 at 17:14,

Re: [PATCH v3] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

On Mon, 7 Jul 2025 at 14:21, Tomasz Kamiński wrote: > > From: XU Kailiang > > C++ formatting locale could have a custom time_put that performs > differently from the C locale, so do not use __timepunct directly, > instead all of above specifiers use _M_locale_fmt. > > For %a/%A/%b/%h/%B, the code

Re: [PATCH v2] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

On Mon, 7 Jul 2025 at 10:21, Tomasz Kamiński wrote: > > From: XU Kailiang > > C++ formatting locale could have a custom time_put that performs > differently from the C locale, so do not use __timepunct directly, > instead all of above specifiers use _M_locale_fmt. > > For %a/%A/%b/%h/%B, the code

Re: [PATCH v2] libstdc++: Format __float128 as _Float128 only when long double is not 128 IEEE [PR120976]

OK thanks On Mon, 7 Jul 2025 at 10:35, Tomasz Kamiński wrote: > > For powerpc64 and sparc architectures that both have __float128 and 128bit > long double, > the __float128 is same type as long double/__ieee128 and already formattable. > > The remaining specialization makes __float128 formattabl

[PATCH] aarch64: Improve popcountti2 with SVE

Hi all, The TImode popcount sequence can be slightly improved with SVE. If we generate: ldr q31, [x0] ptrue p7.b, vl16 cnt z31.d, p7/m, z31.d addp d31, v31.2d fmov x0, d31 ret instead of: h128: ldr q31, [x0] cnt v31.16b, v31.16b addv b31, v31.16b fmov w0, s31 ret we use the ADDP instruction for

[PATCH v2] libstdc++: Format __float128 as _Float128 only when long double is not 128 IEEE [PR120976]

For powerpc64 and sparc architectures that both have __float128 and 128bit long double, the __float128 is same type as long double/__ieee128 and already formattable. The remaining specialization makes __float128 formattable on x86_64 via _Float128, however __float128 is now not formattable on x8

[PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

libstdc++-v3/ChangeLog: * include/bits/version.def (mdspan): Set to 202207 and remove no_stdname. * include/bits/version.h: Regenerate. * testsuite/23_containers/mdspan/mdspan_ftm.cc: Test presence of FTM. Signed-off-by: Luc Grosheintz --- libstdc++-v3/in

Re: [PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

On Mon, Jul 7, 2025 at 11:41 AM Luc Grosheintz wrote: > libstdc++-v3/ChangeLog: > > * include/bits/version.def (mdspan): Set to 202207 and remove > no_stdname. > * include/bits/version.h: Regenerate. > * testsuite/23_containers/mdspan/mdspan_ftm.cc: Test presence >

Re: [PATCH v3 0/5] Implement mdspan.

On Fri, 4 Jul 2025 at 09:32, Luc Grosheintz wrote: > > This patch series replaces: > https://gcc.gnu.org/pipermail/libstdc++/2025-June/062207.html > > Addresses the review comments and improves commit messages. Most notably > the unnecessary patch to "strength" exception guarantees has been > remo

[PATCH v1 2/3] RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15

From: Pan Li Add asm dump check and run test for vec_duplicate + vssub.vv combine to vssub.vx, with the GR2VR cost is 0, 2 and 15. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.

Re: [PATCH v3 1/5] libstdc++: Check prerequisites of layout_*::operator().

On Fri, 4 Jul 2025 at 09:32, Luc Grosheintz wrote: > > Previously, the prerequisite that the arguments passed to operator() are > a multi-dimensional index (of extents()) was not checked. > > Both mapping::operator() and mdspan::operator[] have the same > prerequisite. Since, mdspan must check the

Re: [PATCH v3 2/5] libstdc++: Check prerequisite of extents::extents.

On Mon, 7 Jul 2025 at 10:13, Tomasz Kaminski wrote: > > > > On Mon, Jul 7, 2025 at 11:09 AM Jonathan Wakely wrote: >> >> On Fri, 4 Jul 2025 at 09:30, Luc Grosheintz wrote: >> > >> > Previously the prerequisite of the extents ctors that >> > >> > static_extent(i) == dynamic_extent || extent(i

Re: [PATCH v2] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

On Mon, 7 Jul 2025 at 10:49, Tomasz Kaminski wrote: > > > > On Mon, Jul 7, 2025 at 11:44 AM Jonathan Wakely wrote: >> >> On Mon, 7 Jul 2025 at 10:21, Tomasz Kamiński wrote: >> > >> > From: XU Kailiang >> > >> > C++ formatting locale could have a custom time_put that performs >> > differently fr

Re: [PATCH v3 4/5] libstdc++: Implement __mdspan::__size.

On Fri, 4 Jul 2025 at 09:34, Luc Grosheintz wrote: > > The current code uses __mdspan::__fwd_prod(__exts, __rank) to express > computing the size of an extent. This commit adds an function __mdspan:: > __size(__exts) to express the idea more directly. > > libstdc++-v3/ChangeLog: > > * incl

Re: [PATCH v3 5/5] libstdc++: Implement mdspan and tests [PR107761].

On Fri, 4 Jul 2025 at 09:37, Luc Grosheintz wrote: > > Implements the class mdspan as described in N4950, i.e. without P3029. > It also adds tests for mdspan. This commit completes the implementation > of P0009, i.e. the C++23 part . > > PR libstdc++/107761 > > libstdc++-v3/ChangeLog: > >

Re: [PATCH v3 3/5] libstdc++: Restructure mdspan tests to reuse IntLike.

On Mon, 7 Jul 2025 at 09:59, Tomasz Kaminski wrote: > > > On Fri, Jul 4, 2025 at 10:37 AM Luc Grosheintz > wrote: >> >> The class IntLike is used for testing extents with user-defined classes >> that convert to int. This commit places the class into a separate header >> file. This allows it to b

Re: [PATCH v2] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

On Mon, Jul 7, 2025 at 11:44 AM Jonathan Wakely wrote: > On Mon, 7 Jul 2025 at 10:21, Tomasz Kamiński wrote: > > > > From: XU Kailiang > > > > C++ formatting locale could have a custom time_put that performs > > differently from the C locale, so do not use __timepunct directly, > > instead all

[PATCH][commited]: Update maintainers file

Update MAINTAINERS file to include myself in AArch64 port. committed to master. Thanks, Tamar ChangeLog: * MAINTAINERS: Add myself to AArch64 pot. --- diff --git a/MAINTAINERS b/MAINTAINERS index f2ad65007b6d4b2ce68fa07d580ad93286739529..2cd2ec650b6f7c4b7a6aa42f295a728079d7e183 10064

Re: [PATCH v3 1/5] libstdc++: Check prerequisites of layout_*::operator().

On Mon, Jul 7, 2025 at 3:29 PM Luc Grosheintz wrote: > > On 7/4/25 10:29, Luc Grosheintz wrote: > > Previously, the prerequisite that the arguments passed to operator() are > > a multi-dimensional index (of extents()) was not checked. > > > > Both mapping::operator() and mdspan::operator[] have t

[PATCH] tree-optimization/120358 - bogus PTA with structure access

When we compute the constraint for something like MEM[(const struct QStringView &)&tok2 + 32] we go and compute what (const struct QStringView &)&tok2 + 32 points to and then add subvariables to its dereference that possibly fall in the range of the access according to the original refs size. In d

Re: [PATCH] aarch64: Improve popcountti2 with SVE

> On 7 Jul 2025, at 13:27, Richard Sandiford wrote: > > Tamar Christina writes: >>> -Original Message- >>> From: Kyrylo Tkachov >>> Sent: Monday, July 7, 2025 10:38 AM >>> To: GCC Patches >>> Cc: Richard Sandiford ; Richard Earnshaw >>> ; Alex Coplan ; Andrew >>> Pinski >>> Subject:

[PATCH v1 0/3] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost

From: Pan Li This patch would like to introduce the combine of vec_dup + vssub.vv into vssub.vx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VR is zero, or reject the combine if non-zero like 1, 2, 15 in test. There will be two cases for the combine: Case 0:

[PATCH v1 1/3] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost

From: Pan Li This patch would like to combine the vec_duplicate + vssub.vv to the vssub.vx. From example as below code. The related pattern will depend on the cost of vec_duplicate from GR2VR. Then the late-combine will take action if the cost of GR2VR is zero, and reject the combination if th

[PATCH v1 3/3] RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2

From: Pan Li Add asm dump check test for vec_duplicate + vssub.vv combine to vssub.vx, with the GR2VR cost is 0, 1 and 2. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check. * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto. * gc

Re: [PATCH v3] x86: Improve vector_loop/unrolled_loop for memset/memcpy

On Tue, Jun 24, 2025 at 2:11 PM H.J. Lu wrote: > > On Mon, Jun 23, 2025 at 2:24 PM H.J. Lu wrote: > > > > On Wed, Jun 18, 2025 at 3:17 PM H.J. Lu wrote: > > > > > > 1. Don't generate the loop if the loop count is 1. > > > 2. For memset with vector on small size, use vector if small size supports

Re: [PATCH v3 2/5] libstdc++: Check prerequisite of extents::extents.

On Mon, Jul 7, 2025 at 11:09 AM Jonathan Wakely wrote: > On Fri, 4 Jul 2025 at 09:30, Luc Grosheintz > wrote: > > > > Previously the prerequisite of the extents ctors that > > > > static_extent(i) == dynamic_extent || extent(i) == other.extent(i). > > > > was not checked. This commit adds th

Re: [PATCH v3 2/5] libstdc++: Check prerequisite of extents::extents.

On 7/7/25 11:13, Tomasz Kaminski wrote: On Mon, Jul 7, 2025 at 11:09 AM Jonathan Wakely wrote: On Fri, 4 Jul 2025 at 09:30, Luc Grosheintz wrote: Previously the prerequisite of the extents ctors that static_extent(i) == dynamic_extent || extent(i) == other.extent(i). was not check

Re: [PATCH v3 5/5] libstdc++: Implement mdspan and tests [PR107761].

On Fri, Jul 4, 2025 at 10:37 AM Luc Grosheintz wrote: > Implements the class mdspan as described in N4950, i.e. without P3029. > It also adds tests for mdspan. This commit completes the implementation > of P0009, i.e. the C++23 part . > > PR libstdc++/107761 > > libstdc++-v3/ChangeLog: >

[Ada] Reapply tweaks to delay statements in ACATS 3&4 testsuites

They had originally been applied to the ACATS 2 testsuite and I forgot to reapply them to the ACATS 4 testsuite altogether. Tested on x86-64/Linux, applied on the mainline. 2025-07-07 Eric Botcazou * ada/acats-3/tests/c9/c94001c.ada: Tweak delay statements. * ada/acats-4/tes

Re: [PATCH 2/2] add masked-epilogue tuning

On Fri, Jul 4, 2025 at 5:45 PM Richard Biener wrote: > > The following adds a x86 tuning to enable the use of AVX512 masked > epilogues in cases we heuristically determine it to be not detrimental > by high chance. Basically problematic cases are when there are > data streams that are both stored

Re: [PATCH v3 2/5] libstdc++: Check prerequisite of extents::extents.

On Fri, Jul 4, 2025 at 10:30 AM Luc Grosheintz wrote: > Previously the prerequisite of the extents ctors that > > static_extent(i) == dynamic_extent || extent(i) == other.extent(i). > > was not checked. This commit adds the __glibcxx_assert and test them. > > libstdc++-v3/ChangeLog: > >

[PATCH] tree-optimization/120817 - bogus DSE of .MASK_STORE

DSE used ao_ref_init_from_ptr_and_size for .MASK_STORE but alias-analysis will use the specified size to disambiguate against smaller objects. For .MASK_STORE we instead have to make the access size unspecified but we can still constrain the access extent based on the maximum size possible. Boots

Re: [PATCH v1] libstdc++: Set FMT for complete C++23 mdspan.

Ah, I just missed the other e-mail, and just found it. Yes, in that case it makes sense to include it in the patch series. You may also update the last two commits. On Mon, Jul 7, 2025 at 1:27 PM Luc Grosheintz wrote: > > > On 7/7/25 13:24, Tomasz Kaminski wrote: > > On Mon, Jul 7, 2025 at 12:34

Re: [PATCH 3/7] aarch64: Handle DImode BCAX operations

Kyrylo Tkachov writes: > Hi all, > > To handle DImode BCAX operations we want to do them on the SIMD side only if > the incoming arguments don't require a cross-bank move. > This means we need to split back the combination to separate GP BIC+EOR > instructions if the operands are expected to be in

RE: [PATCH] tree-optimization/120817 - bogus DSE of .MASK_STORE

> -Original Message- > From: Richard Biener > Sent: Monday, July 7, 2025 12:30 PM > To: gcc-patches@gcc.gnu.org > Cc: Tamar Christina > Subject: [PATCH] tree-optimization/120817 - bogus DSE of .MASK_STORE > > DSE used ao_ref_init_from_ptr_and_size for .MASK_STORE but > alias-analysis wil

Re: [PATCH 3/7] aarch64: Handle DImode BCAX operations

Richard Sandiford writes: > Kyrylo Tkachov writes: >> Hi all, >> >> To handle DImode BCAX operations we want to do them on the SIMD side only if >> the incoming arguments don't require a cross-bank move. >> This means we need to split back the combination to separate GP BIC+EOR >> instructions if

[PATCH] libstdc++: Format %a/%A/%b/%h/%B/%p without using locale::classic [PR110739]

With changes r16-2063-g8ad5968a8dcb47 the _M_a_A, _M_b_B and _M_p functions are called only if the locale is equal to the locale::classic(), for which the behavior is know. This patch changes they implementation, so instead of reffering to __timepunct facet members, they use hardcoded list of Engli

[PATCH v2] Handle non default git prefix configurations

Mklog parses the diff content from prepare-commit-msg hook but fails when git has been configured with mnemonicPrefix. Forcing the default values for the prefixes would set a distinct diff configuration supported by mklog and prevent most failures. contrib/ChangeLog: * prepare-commit-msg:

Re: [PATCH] c-family: Check backend for argument alignment on stack

On 7/1/25 5:36 PM, H.J. Lu wrote: On Tue, Jul 1, 2025 at 9:37 PM Jason Merrill wrote: On 6/30/25 7:03 PM, H.J. Lu wrote: On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote: On 6/28/25 7:00 AM, H.J. Lu wrote: Since a backend may ignore user type alignment for arguments passed on stack, c

Re: [PATCH] Handle non default git configurations with mklog

On 7/7/25 3:41 PM, Alexander Monakov wrote: Is switching the algorithm actually necessary for solving the problem at hand? I think it is possible for the default algorithm to produce diffs that lead to poorly generated changelog entries, so forcing it here seems undesirable. I was not aware of

Re: [PATCH] libstdc++: Format %a/%A/%b/%h/%B/%p without using locale::classic [PR110739]

On Mon, Jul 7, 2025 at 5:06 PM Tomasz Kamiński wrote: > With changes r16-2063-g8ad5968a8dcb47 the _M_a_A, _M_b_B and _M_p functions > are called only if the locale is equal to the locale::classic(), for which > the behavior is know. This patch changes they implementation, so instead of > refferin

Re: [PATCH 4/7] aarch64: Use EOR3 for DImode values

On 7/7/25 06:18, Kyrylo Tkachov wrote: > External email: Use caution opening links or attachments > > > Hi all, > > Similar to BCAX, we can use EOR3 for DImode, but we have to be careful > not to force GP<->SIMD moves unnecessarily, so add a splitter for that case. > > So for input: > uint64_t eor3

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On 2025-07-07 09:33, Siddhesh Poyarekar wrote: The only difference between &a->fam[0] and &a->fam is not the value (that is the same), just the type in one case say int *, in the other int [0:] *. At least in GIMPLE pointer conversions are useless, so what exact type of the argument is doesn't m

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On 2025-07-07 13:07, Qing Zhao wrote: If the current bug is urgent to be fixed. and you are not comfortable with the simple Patch Sid provided, then I am okay to back it out now and then push it back with the fix to this current bug at a later time after everyone is comfortable with the curren

Fix profile scaling in tree-inline.cc:initialize_cfun

Hi, initialize_cfun calls profile_count::adjust_for_ipa_scaling (&num, &den); but then the result is never used. This patch fixes it. Overall scalling of entry/exit block is bit sloppy in tree-inline. I see if I can clean it up. Bootstrapped/regtested x86_64-linux, comitted. * tree-in

Re: [PATCH, v2] Fortran: fix minor issues with coarrays (extended)

On Mon, Jul 07, 2025 at 08:53:16PM +0200, Harald Anlauf wrote: > Andre, > > I still don't get it, and the present version made it worse for me... > > So let's see what I was thinking. There are the following types of > functions: > > (0) impure, non-elemental functions, which likely have side-e

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On 2025-07-07 17:47, Jakub Jelinek wrote: Even 6 arguments is IMHO too much. /* Expand the IFN_ACCESS_WITH_SIZE function: ACCESS_WITH_SIZE (REF_TO_OBJ, REF_TO_SIZE, CLASS_OF_SIZE, TYPE_OF_SIZE, ACCESS_MODE) which returns the REF_TO_OBJ same as the 1st argument;

[FYI] [vxworks] add aarch64 to vxworks-dummy.h set

It's not strictly necessary, because nothing defined therein is referenced by anything in gcc/config/aarch64, but it was an oversight to not have it there. Tested with aarch64-vx7r2. I'm checking it in. for gcc/ChangeLog * config.gcc (vxworks-dummy.h): Add to aarch64-*-* as well. --

Re: [AutoFDO] Fix get_original_name to strip only names that are generated after auto-profile

Hi, there are two bugs in get_original_name. First the for loop walking list of known suffixes uses sizeos (suffixes). It evnetually walks to an empty suffix. Second problem is that strcmp may accept suffixes that are longer. I.e. mix up .isra with .israabc. This is probably not a big deal bu

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

Hi, Sorry for the late reply. And thanks a lot for all the help so far. For the documantion of the .ACCESS_WITH_SIZE for pointers, please see the following in c/c-typeck.cc : /* Given a COMPONENT_REF REF with the location LOC, the corresponding COUNTED_BY_REF, and the

Re: [PATCH] tree-optimization/120929: Limit MEM_REF handling to .ACCESS_WITH_SIZE

On Mon, Jul 07, 2025 at 09:18:53PM +, Qing Zhao wrote: > From OLD: > > _2 = &a->c; > _3 = &a->count; > _1 = .ACCESS_WITH_SIZE (_2, _3, 1, 0, -1, 0B); > _4 = *_1; > D.2964 = __builtin_dynamic_object_size (_4, 1); > > To NEW: > > _2 = a->c; > _3 = &a->count; > _1 = .ACCESS_WITH_SIZE (_

[PATCH] cobol: Implement CXXFLAGS_FOR_COBOL.

I have elsewhere described my frustration in trying, during development, to set more stringent error-finding and warning-generating compilation options. But they seem to require the use of CXXFLAGS, which in at least the case of trying to set -std=c++14, causes libcody's compilation to fail, since

Re: [PATCH] cobol: Implement CXXFLAGS_FOR_COBOL.

Hi Robert, > I have elsewhere described my frustration in trying, during development, > to set more stringent error-finding and warning-generating compilation > options. But they seem to require the use of CXXFLAGS, which in at least > the case of trying to set -std=c++14, causes libcody's compil

Re: [PATCH] libstdc++: Make VERIFY a variadic macro

On Wed, Jul 2, 2025 at 12:31 PM Jonathan Wakely wrote: > This defines the testsuite assertion macro VERIFY so that it allows > un-parenthesized expressions containing commas. This matches how assert > is defined in C++26, following the approval of P2264R7. > > The primary motivation is to allow e

Re: [PATCH][RFC] phiopt: Optimize A < 0 ? ARG1 OP 2^n-1 : ARG1

On Mon, Jun 30, 2025 at 11:29 AM Jeff Law wrote: > So I think the overall direction is: > > 1. Try to do the translation in match.pd > 2. Target the conditional move form > 3. Adjust expanders and/or target bits as necessary to avoid regressions That works for me too, I'll start working on it.

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