From: Piotr Trojanek
Legality checks in extended return statements were (almost) literally
implementing the RM rules, but the when analyzing the return object declaration
we replace the nominal subtype of that object with its constrained subtype.
(It is a bit odd to have such an expansion activit
From: Denis Mazzucato
When dispatching in a Default_Initial_Condition, copying the condition
node crashes if there is a, possibly nested, parameterless function as
actual parameter; there were two issues:
1. Subp_Entity in Check_Dispatching_call was uninitialized, a GNAT SAS
finding.
2. The co
From: Piotr Trojanek
A nested aggregate with a single "others => <>" clause is equivalent to a box
itself. Code cleanup; semantics is unaffected.
gcc/ada/ChangeLog:
* errid.ads (Diagnostic_Entries): Remove nested aggregate.
* errsw.adb (Switches): Likewise.
Tested on x86_64-pc-
From: Piotr Trojanek
When extended return statement declares object using an explicit subtype
indication, then it is better to recover the original unconstrained type using
the explicit subtype indication. This appears to be necessary for subtypes with
predicates.
gcc/ada/ChangeLog:
* s
Karl Meakin writes:
> Commit the test file `mask_load_2.c` before the vectorisation analysis
> is changed, so that the changes in codegen are more obvious in the next
> commit.
>
> gcc/testsuite/ChangeLog:
> * gcc.target/aarch64/sve/mask_load_2.c: New test.
OK, thanks.
Richard
> ---
> ..
From: Eric Botcazou
Declarations of return objects are not (yet) distributed into the dependent
expressions of conditional expressions.
gcc/ada/ChangeLog:
* exp_ch6.adb (Expand_Ctrl_Function_Call): Do not bail out for the
declarations of return objects.
Tested on x86_64-pc-linu
From: Ronan Desplanques
gcc/ada/ChangeLog:
* exp_ch6.adb (Expand_Ctrl_Function_Call): Precisify comment.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_ch6.adb | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/gcc/ada/exp_ch6.adb b/gcc/a
From: Daniel King
This unit performed integer to address conversions to calculate stack addresses
which, on a CHERI target, result in an invalid capability that triggers a
capability tag fault when dereferenced during stack filling. This patch updates
the unit to preserve addresses (capabilities)
A typo in r15-4473-g3abe751ea86e34 made it ill-formed to use
std::uninitialized_fill with iterators that aren't pointers (or pointers
wrapped in our __normal_iterator) if the value type is a narrow
character type.
libstdc++-v3/ChangeLog:
PR libstdc++/120931
* include/bits/stl_unin
Hi Jerry,
thanks for the review and the ok. Committed as gcc-16-1967-g15413e05eb9.
And special thanks for the kind words in the private mail you send me. It's
very much appreciated that you even applied a translator to translate it to
German. Thank you very much.
I have set myself a reminder to
When profiling is enabled with shrink wrapping, the mcount call may not
be placed at the function entry after
pushq %rbp
movq %rsp,%rbp
As the result, the profile data may be skewed which makes PGO less
effective.
Add --enable-x86-64-mfentry to enable -mfentry by default to use
__fentry__, added
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
In this testcase there is nothing in the lambda except a static_assert which
mentions a variable from the enclosing scope but does not odr-use it, so we
want prune_lambda_captures to remove its capture. Since the lambda is so
empty, there's
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
This testcase was crashing from infinite recursion in the diagnostic
machinery, trying to print the lambda signature, which referred to the
__this capture field in the lambda, which wanted to print the lambda again.
But we don't want the si
Spotted this by chance as I saw a similar fixup in comments.
>From comments, I think this is needed, but I've not hit any issues due
to this.
gcc/ChangeLog:
* config/riscv/predicates.md (prefetch_operand): mack 5 bits.
Signed-off-by: Vineet Gupta
---
gcc/config/riscv/predicates.md | 4
On Thu, 3 Jul 2025 at 23:14, Nathan Myers wrote:
>
> This is a snapshot of work on P2714 "Bind front and back to NTTP
> callables", posted for reference. Not tested.
>
> libstdc++-v3/ChangeLog:
> PR libstdc++/119744
> * include/bits/version.def: Redefine __cpp_lib_bind_front etc.
>
On Thu, Jul 3, 2025 at 11:02 PM Richard Sandiford
wrote:
>
> "H.J. Lu" writes:
> > Since a backend may ignore user type alignment for arguments passed on
> > stack, update alignment for arguments passed on stack when copying MEM's
> > memory attributes.
> >
> > gcc/
> >
> > PR target/120839
> > *
This is a snapshot of work on P2714 "Bind front and back to NTTP
callables", posted for reference. Not tested.
libstdc++-v3/ChangeLog:
PR libstdc++/119744
* include/bits/version.def: Redefine __cpp_lib_bind_front etc.
* include/bits/version.h: Ditto.
* include/std/f
In GCC 16 the compiler is smarter and it optimizes away the unneeded
zero-extension during the expand pass. Thus we can no longer match
and_alsl_reversed.
Drop the scan-rtl-dump for and_alsl_reversed and add scan-assembler-not
against bstrpick.d to detect the unneeded zero-extension in case it
re
From: Pan Li
Add asm dump check and run test for vec_duplicate + vsadd.vv
combine to vsadd.vx, with the GR2VR cost is 0, 2 and 15.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
From: Pan Li
This patch would like to combine the vec_duplicate + vsadd.vv to the
vsadd.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR. Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if th
From: Pan Li
This patch would like to introduce the combine of vec_dup + vsadd.vv
into vsadd.vx on the cost value of GR2VR. The late-combine will take
place if the cost of GR2VR is zero, or reject the combine if non-zero
like 1, 2, 15 in test. There will be two cases for the combine:
Case 0:
From: Pan Li
Add asm dump check test for vec_duplicate + vsadd.vv combine to
vsadd.vx, with the GR2VR cost is 0, 1 and 2.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
* gc
On 7/3/25 5:19 PM, Vineet Gupta wrote:
Spotted this by chance as I saw a similar fixup in comments.
From comments, I think this is needed, but I've not hit any issues due
to this.
gcc/ChangeLog:
* config/riscv/predicates.md (prefetch_operand): mack 5 bits.
Signed-off-by: Vineet Gup
On Thu, 3 Jul 2025 at 23:14, Nathan Myers wrote:
>
> This is a snapshot of work on P2714 "Bind front and back to NTTP
> callables", posted for reference. Not tested.
>
> libstdc++-v3/ChangeLog:
> PR libstdc++/119744
> * include/bits/version.def: Redefine __cpp_lib_bind_front etc.
>
在 2025/7/4 上午11:25, Xi Ruoyao 写道:
On Fri, 2025-07-04 at 11:14 +0800, Xi Ruoyao wrote:
On Fri, 2025-07-04 at 09:47 +0800, Lulu Cheng wrote:
在 2025/7/2 下午3:31, Xi Ruoyao 写道:
The register_operand predicate can match subreg, then we'd have a
subreg
of subreg and it's invalid. Use lowpart_subreg
在 2025/7/4 上午11:14, Xi Ruoyao 写道:
On Fri, 2025-07-04 at 09:47 +0800, Lulu Cheng wrote:
在 2025/7/2 下午3:31, Xi Ruoyao 写道:
The register_operand predicate can match subreg, then we'd have a subreg
of subreg and it's invalid. Use lowpart_subreg to avoid the nested
subreg.
gcc/ChangeLog:
This is a snapshot of work on P2714 "Bind front and back to NTTP
callables", posted for reference. Not tested.
libstdc++-v3/ChangeLog:
PR libstdc++/119744
* include/bits/version.def: Redefine __cpp_lib_bind_front etc.
* include/bits/version.h: Ditto.
* include/std/f
On Thu, 3 Jul 2025, Pietro Monteiro wrote:
> Use TImode instead of the default DImode. Fixes ICE when building libstc++.
I'll have to look into this. There might be a delay.
Thanks for the patch though!
brgds, H-P
>
> Additionally, this change fixes:
>
> c-c++-common/pr111309-1.c -Wc++-com
Provide a fallback alternaive register contraint for LRA in the light of
the tightened "Q" constraint. Cures the following ICE ...
| gcc/testsuite/gcc.target/riscv/pr118241-b.cc:31:19: error: unable to generate
reloads for:
| 31 | void m() { a.l(); }
| | ^
|(insn 26 25 27
在 2025/7/2 下午3:31, Xi Ruoyao 写道:
The register_operand predicate can match subreg, then we'd have a subreg
of subreg and it's invalid. Use lowpart_subreg to avoid the nested
subreg.
gcc/ChangeLog:
* config/loongarch/loongarch.md (crc_combine): Avoid nested
subreg.
gcc/tests
On Fri, 2025-07-04 at 09:47 +0800, Lulu Cheng wrote:
>
> 在 2025/7/2 下午3:31, Xi Ruoyao 写道:
> > The register_operand predicate can match subreg, then we'd have a subreg
> > of subreg and it's invalid. Use lowpart_subreg to avoid the nested
> > subreg.
> >
> > gcc/ChangeLog:
> >
> > * config
On Fri, 2025-07-04 at 11:14 +0800, Xi Ruoyao wrote:
> On Fri, 2025-07-04 at 09:47 +0800, Lulu Cheng wrote:
> >
> > 在 2025/7/2 下午3:31, Xi Ruoyao 写道:
> > > The register_operand predicate can match subreg, then we'd have a
> > > subreg
> > > of subreg and it's invalid. Use lowpart_subreg to avoid th
Konstantinos Eleftheriou writes:
> On Wed, May 7, 2025 at 11:29 AM Richard Sandiford
> wrote:
>> But I thought the code was allowing multiple stores to be forwarded to
>> a single (wider) load. E.g. 4 individual byte stores at address X, X+1,
>> X+2 and X+3 could be forwarded to a 4-byte load at
"H.J. Lu" writes:
> On Thu, Jul 3, 2025 at 11:02 PM Richard Sandiford
> wrote:
>>
>> "H.J. Lu" writes:
>> > Since a backend may ignore user type alignment for arguments passed on
>> > stack, update alignment for arguments passed on stack when copying MEM's
>> > memory attributes.
>> >
>> > gcc/
On Thu, Jul 3, 2025 at 9:08 PM Andrew Pinski wrote:
>
> This is an obvious fix for this small regression. Basically after
> r15-328-g5726de79e2154a,
> there is a call to tree_expr_nonnegative_warnv_p where the type of the
> expression is now
> error_mark_node. Though there was only a check if th
Use TImode instead of the default DImode. Fixes ICE when building libstc++.
Additionally, this change fixes:
c-c++-common/pr111309-1.c -Wc++-compat (test for excess errors)
c-c++-common/pr111309-1.c -Wc++-compat execution test
gcc.dg/pr105094.c (test for excess errors)
gcc.dg/torture/pr11648
On Thu, Jul 3, 2025 at 9:34 PM Andrew Pinski wrote:
>
> These 2 testcases were originally designed for the default -march= of
> x86_64 so if you pass -march=native (on a target with AVX512 enabled),
> they will fail. It fix this, we add `-mno-sse3 -mprefer-vector-width=512`
Did you mean to use -m
This is an obvious fix for this small regression. Basically after
r15-328-g5726de79e2154a,
there is a call to tree_expr_nonnegative_warnv_p where the type of the
expression is now
error_mark_node. Though there was only a check if the expression was
error_mark_node.
Bootstrapped and tested on x8
On 02/07/25 21:44, Jose E. Marchesi wrote:
One can also pass a precompiled BPF object with the desired
optimization options to the script to check it with the verifier.
Yes, but AFAIK building objects that can be actually loaded in the
kernel and verified requires in practice including kernel h
The following fixes bad alignment computaton for epilog vectorization
when as in this case for 510.parest_r and masked epilog vectorization
with AVX512 we end up choosing AVX to vectorize the main loop and
masked AVX512 (sic!) to vectorize the epilog. In that case alignment
analysis for the epilog
On 7/3/25 4:24 PM, Juergen Christ wrote:
On 6/27/25 8:09 PM, Juergen Christ wrote:
s390 missed constant vector permutation cases based on the vector pack
instruction or changing the size of the vector elements during vector
merge. This enables some more patterns that do not need to load a
con
Tested on x86_64-pc-linux-gnu, does this look OK for trunk/15?
-- >8 --
In r15-4555-gf191c830154565 we proactively implemented the initial
proposed resolution for LWG 4166 which was later revealed to be
insufficient, since we must also require equality_comparable of the
underlying iterators befor
On Thu, 3 Jul 2025 at 15:19, Patrick Palka wrote:
>
> Tested on x86_64-pc-linux-gnu, does this look OK for trunk/15?
yes for both, thanks.
>
> -- >8 --
>
> In r15-4555-gf191c830154565 we proactively implemented the initial
> proposed resolution for LWG 4166 which was later revealed to be
> insuf
This is a snapshot of work on P2714 "Bind front and back to NTTP
callables", posted for reference.
Questions:
1. Jonathan asks if __type_forward_like_t does the same job as __like_t
in bits/move.h.
2. Could the "if constexpr" statements be better expressed as requires
clauses via the A=>B == !A||B
On 7/3/25 5:19 PM, Vineet Gupta wrote:
Provide a fallback alternaive register contraint for LRA in the light of
the tightened "Q" constraint. Cures the following ICE ...
| gcc/testsuite/gcc.target/riscv/pr118241-b.cc:31:19: error: unable to generate
reloads for:
| 31 | void m() { a.l(); }
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