Re: [RFC] RISC-V: Implment H modifier for printing the next register name

2025-04-26 Thread Jin Ma
On Sat, 26 Apr 2025 09:59:45 +0300, Dimitar Dimitrov wrote: > On Fri, Apr 25, 2025 at 01:25:50PM +0800, Jin Ma wrote: > > For RV32 inline assembly, when handling 64-bit integer data, it is > > often necessary to process the lower and upper 32 bits separately. > > Unfortunately, we can only output t

[PATCH v2] gcc: do not apply store motion on loop with no exits.

2025-04-26 Thread Xin Wang
The temporary variable will not be wrote back to memory as there is no exit of inifinite loop, so we prohibit applying store motion on loops with no exits. Signed-off-by: Xin Wang --- gcc/tree-ssa-loop-im.cc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/tree-ssa-loop-im.cc b/gcc/tr

Re: [PATCH v2] gcc: do not apply store motion on loop with no exits.

2025-04-26 Thread ywgrit
I encountered one problem with loop-im pass. I compiled the program dhry2reg which belongs to unixbench( https://github.com/kdlucas/byte-unixbench). The gcc used gcc (GCC) 12.3.0 The commands executed as following make ./Run -c -i 1 dhry2reg The results are shown below. Dhrystone 2 using registe

[PATCH] gcc: do not apply store motion on loop with no exits. The temporary variable will not be wrote back to memory as there is no exit of inifinite loop, so we prohibit applying store motion on loo

2025-04-26 Thread Xin Wang
Signed-off-by: Xin Wang --- gcc/tree-ssa-loop-im.cc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/tree-ssa-loop-im.cc b/gcc/tree-ssa-loop-im.cc index 225964c6215..de0450f5192 100644 --- a/gcc/tree-ssa-loop-im.cc +++ b/gcc/tree-ssa-loop-im.cc @@ -3355,6 +3355,9 @@ loop_suitable_for_s

[PATCH] i386: Add ix86_expand_unsigned_small_int_cst_argument

2025-04-26 Thread H.J. Lu
When passing 0xff as an unsigned char function argument with the C frontend promotion, expand_normal used to get constant 255> and returned the rtx value using the sign-extended representation: (const_int 255 [0xff]) But after commit a670ebde3995481225ec62b29686ec07a21e5c10 Author: H.J. Lu D

RE: [PATCH] aarch64: Optimize SVE extract last to Neon lane extract for 128-bit VLS.

2025-04-26 Thread Tamar Christina
> -Original Message- > From: Richard Sandiford > Sent: Friday, April 25, 2025 4:45 PM > To: Jennifer Schmitz > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] aarch64: Optimize SVE extract last to Neon lane extract > for > 128-bit VLS. > > Jennifer Schmitz writes: > > For the test c

[pushed] wwwdocs: gcc-15: Fix markup

2025-04-26 Thread Gerald Pfeifer
--- htdocs/gcc-15/changes.html | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html index 1b7d0e1b..6659574f 100644 --- a/htdocs/gcc-15/changes.html +++ b/htdocs/gcc-15/changes.html @@ -388,7 +388,7 @@ asm (".text; %cc0:

[PATCH] c: Suppress -Wdeprecated-non-prototype warnings for builtins

2025-04-26 Thread Florian Weimer
Builtins defined with BT_FN_INT_VAR etc. show as functions without a prototype and trigger the warning. gcc/c/ PR c/119950 * c-typeck.cc (convert_arguments): Check for built-in function declaration before warning. gcc/testsuite/ * gcc.dg/Wdeprecated-non-prototype

Re: [wwwdocs] gcc-15: Add changes for Rust frontend

2025-04-26 Thread Arthur Cohen
Patch has been committed and pushed upstream. Best, Arthur On 4/25/25 4:30 PM, arthur.co...@embecosm.com wrote: From: Arthur Cohen Content was validated using the Nu HTML checker per the contributing doc. --- htdocs/gcc-15/changes.html | 57 ++ 1 file

[PATCH 1/2] gimplefe: Simplify handling of identifier based binary operations

2025-04-26 Thread Andrew Pinski
While looking into adding __ROTATE_LEFT and __ROTATE_RIGHT, I noticed this code is just a bunch of if statments repeated. Instead we could just use a simple lookup array to do the same thinga and it would be easier to add to the array instead of duplicating the if sequence again. Bootstrapped and

[PATCH 2/2] gimplefe: Round trip of rotates [PR119432]

2025-04-26 Thread Andrew Pinski
This adds support for rotate left/right to the GIMPLE front-end via __ROTATE_LEFT/__ROTATE_RIGHT oeprators. PR c/119432 gcc/c/ChangeLog: * gimple-parser.cc (gimple_binary_identifier_code): Add __ROTATE_LEFT and __ROTATE_RIGHT. gcc/ChangeLog: * tree-pretty-print.c

[PATCH] cfgexpand: Change __builtin_unreachable to __builtin_trap if only thing in function [PR109267]

2025-04-26 Thread Andrew Pinski
When we have an empty function, things can go wrong with cfi_startproc/cfi_endproc and a few other things like exceptions. So if the only thing the function does is a call to __builtin_unreachable, let's expand that to a __builtin_trap instead. For most targets that is one instruction wide so it

Re: [RFC] RISC-V: Implment H modifier for printing the next register name

2025-04-26 Thread Jeff Law
On 4/26/25 2:46 AM, Jin Ma wrote: On Sat, 26 Apr 2025 09:59:45 +0300, Dimitar Dimitrov wrote: On Fri, Apr 25, 2025 at 01:25:50PM +0800, Jin Ma wrote: For RV32 inline assembly, when handling 64-bit integer data, it is often necessary to process the lower and upper 32 bits separately. Unfortun

New Croatian PO file for 'gcc' (version 15.1.0)

2025-04-26 Thread Translation Project Robot
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Croatian team of translators. The file is available at: https://translationproject.org/latest/gcc/hr.po (This file, 'gcc-15.1.0.hr.po', has j

Re: [RFC] RISC-V: Implment H modifier for printing the next register name

2025-04-26 Thread Dimitar Dimitrov
On Fri, Apr 25, 2025 at 01:25:50PM +0800, Jin Ma wrote: > For RV32 inline assembly, when handling 64-bit integer data, it is > often necessary to process the lower and upper 32 bits separately. > Unfortunately, we can only output the current register name > (lower 32 bits) but not the next register