Re: [PATCH] c++: Fix OpenMP support with C++20 modules [PR119864]

2025-04-22 Thread Jason Merrill
On 4/22/25 1:21 PM, Tobias Burnus wrote: Jason Merrill wrote: On 4/22/25 11:04 AM, Tobias Burnus wrote: The question is why does this code trigger at all, given that there is OpenMP but no offload code at all? And how to fix it in case there is offload code and modules are used. This seems to

Re: Improve vectorizer costs of min, max, abs, absu and const_expr on x86

2025-04-22 Thread Jan Hubicka
> > But vectorizer computes costs of vector load of off array, 4x moving vector > > to > > scalar and 4x stores. I wonder if generic code can match this better and > > avoid > > the vector load of addresses when open-coding gather/scatter? > > The vectorizer does not explicitly consider the low

Re: Mark const parameters passed by invisible reference as readonly in the function body

2025-04-22 Thread Jason Merrill
On Mon, Apr 14, 2025 at 5:21 PM Jason Merrill wrote: > > On 3/30/25 6:12 PM, Jan Hubicka wrote: > > Hi, > > I noticed that this patch got forgotten and I think it may be useful to > > solve this next stage 1. > > > >> cp_apply_type_quals_to_decl drops 'const' if the type has mutable members. > >>

Help: Re: Questions on replacing a structure pointer reference to a call to .ACCESS_WITH_SIZE in C FE

2025-04-22 Thread Qing Zhao
Hi, I have met the following issue when I tried to implement the following into tree-object-size.cc: (And this took me quite some time, still don’t know what’s the best solution) > On Apr 16, 2025, at 10:46, Qing Zhao wrote: > > 3. When generating the reference to the field member in tree-obje

Re: [RFA, GCC 15] aarch64: Define __ARM_FEATURE_FAMINMAX

2025-04-22 Thread Jakub Jelinek
On Tue, Apr 22, 2025 at 05:22:47PM +0100, Richard Sandiford wrote: > We implemented FAMINMAX ACLE support but failed to define the > associated feature macro. > > Tested on aarch64-linux-gnu & pushed to trunk. OK for GCC 15 too? > > Sorry for the late patch. I only noticed this macro was missin

[committed] Revert "libstdc++: Optimize std::projected" [PR119888]

2025-04-22 Thread Patrick Palka
Tested on x86_64-pc-linux-gnu, pushed to trunk and the 15 release branch with pre-approval from Jonathan and Jakub. -- >8 -- This non-standard optimization breaks real-world code that expects the result of std::projected to always (be a class type and) have a value_type member, which isn't true f

Re: [PATCH] c++: Fix OpenMP support with C++20 modules [PR119864]

2025-04-22 Thread Jason Merrill
On 4/22/25 11:04 AM, Tobias Burnus wrote: Jason Merrill wrote: This is OK with a FIXME; presumably if we want to support running static constructors on the offload target we will eventually want to support that in modules as well. Well, the code that added support for static constructors on

Re: [Fortran, Patch, PR119200, v1] Use correct locus while check()ing coarray functions.

2025-04-22 Thread Harald Anlauf
Hi Andre, Am 22.04.25 um 15:07 schrieb Andre Vehreschild: Hi all, attached patch fixes an illegal use of gfc_current_locus during the check()-phase of several coarray functions. Instead gfc_current_intrinsic_where needs to be used. this is bordering on the obvious and thus OK, except for: @@

Re: [GCC16,RFC,V2 02/14] aarch64: add new define_insn for subg

2025-04-22 Thread Indu Bhagat
On 4/22/25 11:00 AM, Indu Bhagat wrote: On 4/15/25 8:35 AM, Richard Sandiford wrote: Hi, Indu Bhagat writes: subg (Subtract with Tag) is an Armv8.5-A memory tagging (MTE) instruction.  It can be used to subtract an immediate value scaled by the tag granule from the address in the source regis

Re: [PATCH] rs6000: Ignore OPTION_MASK_SAVE_TOC_INDIRECT differences in inlining decisions [PR119327]

2025-04-22 Thread Segher Boessenkool
On Wed, Mar 26, 2025 at 09:01:43AM +0100, Jakub Jelinek wrote: > The following testcase FAILs because the always_inline function can't > be inlined. > The rs6000 backend has similarly to other targets a hook which rejects > inlining which would bring in new ISAs which aren't there in the caller. >

[PATCH v1 4/4] RISC-V: Extract vector stepped for expand_const_vector [NFC]

2025-04-22 Thread pan2 . li
From: Pan Li Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vector stepped will be extracted into expand_const_vector_stepped. The below test suites are passed for this

[PATCH v1 3/4] RISC-V: Extract vector duplicate for expand_const_vector [NFC]

2025-04-22 Thread pan2 . li
From: Pan Li Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vector duplicate will be extracted into expand_const_vector_duplicate, and then expand_const_vector_duplicate

[PATCH v1 1/4] RISC-V: Extract vec_duplicate for expand_const_vector [NFC]

2025-04-22 Thread pan2 . li
From: Pan Li Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vec_duplicate will be extracted into expand_const_vec_duplicate. The below test suites are passed for this p

[PATCH v1 2/4] RISC-V: Extract vec_series for expand_const_vector [NFC]

2025-04-22 Thread pan2 . li
From: Pan Li Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vec_series will be extracted into expand_const_vec_series. The below test suites are passed for this patch.

[PATCH v1 0/4] Refactor long function expand_const_vector

2025-04-22 Thread pan2 . li
From: Pan Li Per discussion from PR118931 thread, the expand_const_vector is quit long with more than 500 lines, which is unfriendly for debugging and maintaince. Thus, we extract some sub functions to make it clear and delicate the concrete const vector expanding into sub functions. Aka: expan

RE: [PATCH v2 1/3] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost

2025-04-22 Thread Li, Pan2
> The only thing I think we want for the patch (as Pan also raised last time) > is > the param to set those .vx costs to zero in order to ensure the tests test > the > right thing (--param=vx_preferred/gr2vr_cost or something). I see, shall we start a new series for this? AFAIK, we may need so

Re: [PATCH] Accept allones or 0 operand for vcond_mask op1.

2025-04-22 Thread Hongtao Liu
On Mon, Apr 21, 2025 at 2:52 PM liuhongt wrote: > > Since ix86_expand_sse_movcc will simplify them into a simple vmov, vpand > or vpandn. > Current register_operand/vector_operand could lose some optimization > opportunity. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for tru

Re: [PATCH 04/61] Enable LSAN and TSAN for mips with the 64-bit abi

2025-04-22 Thread Aleksandar Rakic
HTEC Public Hi, > This is probably OK, but it's unclear to me if it's dependent upon any > of the earlier changes. If it's independent of other changes, then it > could go in now with a suitable ChangeLog entry. > Jeff I would like to inform you that the version 2 of this patch is available at

Re: [PATCH 01/61] Multilib changes

2025-04-22 Thread Aleksandar Rakic
HTEC Public Hi, > So I'm not at all concerned about the mips specific bits of this patch. > After all, they only affect mips ports and the changes seem sensible. > They would need a ChangeLog entry to go forward through. > What is concerning is the config.ml change which has no comments about >

[PATCH] Document AArch64 changes for GCC 15

2025-04-22 Thread Evgeny Karpov
Tuesday, April 22, 2025 "Richard Sandiford" wrote: > +  Support has been added for the AArch64 MinGW target > +    (aarch64-w64-mingw32).  At present, this target only > +    supports C, but further work is planned. > +  Thank you for the release summary for AArch64 and for mentioning the new

Re: [PATCH] Document AArch64 changes for GCC 15

2025-04-22 Thread Andrew Pinski
On Tue, Apr 22, 2025 at 5:32 AM Richard Sandiford wrote: > > The list is structured as: > > - new configurations > - command-line changes > - ACLE changes > - everything else > > As usual, the list of new architectures, CPUs, and features is from a > purely mechanical trawl of the associated .def

[PATCH] target: [PR103750] Also handle avx512 kmask & immediate 15 or 3 when VF is 4/2.

2025-04-22 Thread liuhongt
cat test.c void foo () { __mmask8 mask1 = _mm_cmpeq_epu32_mask (pi128[0], pi128[1]); a = mask1 & 15; } with -O2 -march=x86-64-v4, gcc generates foo(): movqpi128(%rip), %rax vmovdqa (%rax), %xmm0 vpcmpeqd16(%rax), %xmm0, %k0 kmovb %k0, %eax

Re: [PATCH v1 0/4] Refactor long function expand_const_vector

2025-04-22 Thread 钟居哲
These patches LGTM from myside. But please wait for other folks to comment. juzhe.zh...@rivai.ai From: pan2.li Date: 2025-04-23 09:28 To: gcc-patches CC: juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; ken.chen; hongtao.liu; Pan Li Subject: [PATCH v1 0/4] Refactor long function expand_const_

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