> On Tue, Apr 8, 2025 at 3:52 AM H.J. Lu wrote:
> >
> > Simplify memcpy and memset inline strategies to avoid branches for
> > -mtune=generic:
> >
> > 1. With MOVE_RATIO and CLEAR_RATIO == 17, GCC will use integer/vector
> >load and store for up to 16 * 16 (256) bytes when the data size is
> >
> -Original Message-
> From: Jakub Jelinek
> Sent: Friday, April 18, 2025 14:10
> To: Rainer Orth
> Cc: Richard Biener ; Andreas Schwab
> ; gcc-patches@gcc.gnu.org; Robert Dubner
> ; James K. Lowden
> Subject: Re: [PATCH] cobol: Allow for undefined NAME_MAX [PR119217]
>
> On Fri, Apr 18
On Linux/x86_64,
f6859fb621179ec9bf5631eb8902619ab8d4467b is the first bad commit
commit f6859fb621179ec9bf5631eb8902619ab8d4467b
Author: Jan Hubicka
Date: Sat Apr 19 18:51:27 2025 +0200
Add tables for SSE fp conversion costs
caused
FAIL: gcc.target/i386/avx512fp16-trunc-extendvnhf.c sca
This bootstraps with some test failures but works well enough to build
11..15.
libphobos/ChangeLog:
* configure.tgt: Add sparc64-unknown-linux-gnu as a supported target.
---
As discussed on IRC. OK? I'd like to backport it to branches in due course
once they're all open and some time on t
Robert Dubner writes:
>> -Original Message-
>> From: Jakub Jelinek
>> Sent: Friday, April 18, 2025 14:10
>> To: Rainer Orth
>> Cc: Richard Biener ; Andreas Schwab
>> ; gcc-patches@gcc.gnu.org; Robert Dubner
>> ; James K. Lowden
>> Subject: Re: [PATCH] cobol: Allow for undefined NAME_MA
On Sat, Apr 19, 2025 at 7:22 AM H.J. Lu wrote:
>
> On Mon, Dec 2, 2024 at 6:27 AM H.J. Lu wrote:
> >
> > Add pcmpeq splitters to split
> >
> > (insn 5 3 7 2 (set (reg:V4SI 100)
> > (eq:V4SI (reg:V4SI 98)
> > (reg:V4SI 98))) 7910 {*sse2_eqv4si3}
> > (expr_list:REG_DEAD (re
On 1/1/25 10:02 AM, Jiaxun Yang wrote:
Implement fenv rouding and exceptions for soft-fp, as per SuperH
arch specification.
No new tests required, as it's already covered by many torture tests
with fenv_exceptions.
PR target/118257
libgcc/ChangeLog:
* config/sh/sfp-machine.
On 1/1/25 2:08 PM, Keith Packard wrote:
From: Richard Sandiford
Date: Mon, 30 Dec 2024 12:18:40 +
...that could be handled by adding:
&& GET_MODE_INNER (from) != GET_MODE_INNER (to)
I'll let those of you who understand this code far better than I do
figure out whether that's the r
On 1/20/25 9:38 PM, Andrew Pinski wrote:
In a similar way find_split_point handles `a+b*C`, this adds
the split point for `~a & b`. This allows for better instruction
selection when the target has this instruction (aarch64, arm and x86_64
are examples which have this).
Built and tested for a
On 1/1/25 6:54 AM, Jiaxun Yang wrote:
As per architecture, SuperH has a reversed NaN signalling bit
vs IEEE754-2008, it also has a NaN propgation rule similar to
MIPS style.
Use mips style float format and mode for all float types, and
correct sfp-machine header accordingly.
PR targe
On Sat, Apr 19, 2025 at 8:32 PM Andrew Pinski wrote:
>
> r15-6943-g9c4397cafc5ded added support to undo IPA-VRP return value
> optimization for tail calls,
> using the same code ERF_RETURNS_ARG can be supported for functions which
> return one of their arguments.
> This allows for tail calling o
r15-6943-g9c4397cafc5ded added support to undo IPA-VRP return value
optimization for tail calls,
using the same code ERF_RETURNS_ARG can be supported for functions which return
one of their arguments.
This allows for tail calling of memset/memcpy in some cases which were not
handled before.
Boo
From: Pan Li
This patch would like to combine the vec_duplicate + vadd.vv to the
vadd.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR, it will:
* The pattern matching will be inactive if GR2VR cost is zero.
* The cost of GR2VR will be add
From: Pan Li
After we support the vec_duplicate + vadd.vv combine to vadd.vx, the
existing testcases need some adjust for asm dump check times.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/
From: Pan Li
This patch series would like to introudce the vec_dup + vadd.vv combine
to vadd.vx, based on the cost of the GR2VR. For example as below.
v1 = vec_dup(x2)
v2 = vec_add_vv(v3, v1)
will be optimized to below in late-combine
v2 = vec_add_vx(v3, x3)
If and only if the cost of (vec_d
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
I think it was around PR118574 that I noticed a few cases where we were
unnecessarily wrapping a statement tree in a further EXPR_STMT. Let's avoid
that and also use finish_expr_stmt in a few places in the coroutines code
that were building
On 4/18/25 4:37 PM, Sam James wrote:
Philipp Tomsich writes:
Applied to trunk (16.0.0), thank you!
Should this be backported to the GCC-15 release branch as well?
BTW, what's the plan for enabling this on trunk now by default? (I don't recall
if
some other issues were left.)
There's alr
On 4/14/25 5:50 AM, Maciej W. Rozycki wrote:
On Tue, 25 Feb 2025, Maciej W. Rozycki wrote:
Address this issue by recursing into COMPONENT_REF tree nodes until the
outermost one has been reached, which is supposed to be a MEM_REF one,
accumulating the offset as we go, fixing a commit e0dae4da
On Apr 19 2025, Jeff Law wrote:
> Well, I *think* Andreas's comment was suggesting that the patch was caused
> a build failure in libstdc++, so that needs to be addressed as before this
> could go forward.
Yes, it breaks the -mlra build.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerpr
Kaiweng's patch to stop freeing riscv_arch_string was correct, but
incomplete as there's another path that was freeing that node, which is
just plain wrong for a node allocated by the GC system.
This patch removes that call to free() which fixes the test. I've spun
it in my tester and will ob
On Sun, Apr 20, 2025 at 4:19 AM Jan Hubicka wrote:
>
> > On Tue, Apr 8, 2025 at 3:52 AM H.J. Lu wrote:
> > >
> > > Simplify memcpy and memset inline strategies to avoid branches for
> > > -mtune=generic:
> > >
> > > 1. With MOVE_RATIO and CLEAR_RATIO == 17, GCC will use integer/vector
> > >lo
Disallow adding new symbols to GLIBCXX_3.4.34 and CXXABI_1.3.16 versions.
* testsuite/util/testsuite_abi.cc (check_version): Update latestp
to use GLIBCXX_3.4.35 and CXXABI_1.3.17.
---
libstdc++-v3/testsuite/util/testsuite_abi.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
From: Pan Li
Add asm dump check and run test for vec_duplicate + vadd.vv combine
to vadd.vx. Introduce new folder to hold all related testcases.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.ex
This was noticed when turning memset (with constant size) into a store of an
empty constructor
but can be reproduced without that.
In this case we have the following IR:
```
p_3 = __builtin_malloc (4096);
*p_3 = {};
```
Which we can treat the store as a memset.
So this patch adds the similar
On Sat, 19 Apr 2025, Jeff Law wrote:
> > > Address this issue by recursing into COMPONENT_REF tree nodes until the
> > > outermost one has been reached, which is supposed to be a MEM_REF one,
> > > accumulating the offset as we go, fixing a commit e0dae4da4c45 ("Alpha:
> > > Also use tree informat
On 4/18/25 7:47 PM, Luc Grosheintz wrote:
On 4/18/25 2:00 PM, Tomasz Kaminski wrote:
On Fri, Apr 18, 2025 at 1:43 PM Luc Grosheintz
mailto:luc.groshei...@gmail.com>> wrote:
This implements std::extents from according to N4950 and
contains partial progress towards PR107761.
I'm posting this on behalf of Shreya Munnangi who is working as an
intern with me. I've got her digging into prerequisites for removing
mvconst_internal and would prefer she focus on that rather than our
patch process at this time.
--
We can use the orn, xnor, andn instructions on RISC-V t
On 1/31/25 10:13 AM, Aleksandar Rakic wrote:
From: Robert Suchanek
Remove single-float and short-double axes from multilib spec.
The single-float/short-double combination is not immediately supportable
from GCC 6 as the -fshort-double option has been removed and we do not
have backend logic
On Sat, 2025-04-19 at 08:13 -0600, Jeff Law wrote:
>
> On 1/1/25 10:02 AM, Jiaxun Yang wrote:
> > Implement fenv rouding and exceptions for soft-fp, as per SuperH
> > arch specification.
> >
> > No new tests required, as it's already covered by many torture tests
> > with fenv_exceptions.
> >
>
On 1/31/25 10:13 AM, Aleksandar Rakic wrote:
From: Chao-ying Fu
Cherry-picked b9fd138826394dd188936c8031dec676e2d16b47
from https://github.com/MIPS/gcc
Signed-off-by: Chao-ying Fu
Signed-off-by: Aleksandar Rakic
---
libsanitizer/configure.tgt | 5 +
1 file changed, 5 insertions(+)
On Sat, 2025-04-19 at 08:29 -0600, Jeff Law wrote:
>
> On 1/1/25 6:54 AM, Jiaxun Yang wrote:
> > As per architecture, SuperH has a reversed NaN signalling bit
> > vs IEEE754-2008, it also has a NaN propgation rule similar to
> > MIPS style.
> >
> > Use mips style float format and mode for all
On 1/31/25 10:13 AM, Aleksandar Rakic wrote:
From: abennett
Cherry-picked 4420f953c31daf1991011d306a56ab74c39b44ee
and 83c13cb19cb1e87a25326024943b95930a17e86b
from https://github.com/MIPS/gcc
Signed-off-by: Andrew Bennett
Signed-off-by: Matthew Fortune
Signed-off-by: Faraz Shahbazker
Si
On 1/31/25 10:13 AM, Aleksandar Rakic wrote:
From: Andrew Bennett
GCC can modify a rtx which was created using stack_pointer_rtx.
This means that just doing a straight address comparision of a rtx
against stack_pointer_rtx to see whether it is the stack pointer
register will not be correct i
So while debugging PR 118320, I found it was useful to have
an assert inside array_slice::begin/end that the array slice isvalid
rather than getting an segfault. This adds an assert that is only
enabled for checking.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* vec.h
On 2/3/25 2:40 AM, Richard Biener wrote:
On Fri, Jan 31, 2025 at 7:10 PM Aleksandar Rakic
wrote:
From: Mihailo Stojanovic
This looks like a target specific hack, this should be addressed generally
instead of opening up gcse internals to a target hook.
This should also at least come with
The problem here is on targets where a 32byte memcpy will use an integral
(vector) type
to do the copy and the code will be optimized a different way than expected.
This changes
the testcase instead to use a size of 1025 to make sure there is no target that
will use an
integral (vector) type for
..., using the standard idiom. This '*.exp' file doesn't adhere to the
parallel testing protocol as defined in 'gcc/testsuite/lib/gcc-defs.exp'.
This also restores proper behavior for '*.exp' files executing after (!) this
one, which erroneously caused hundreds or even thousands of individual tes
Bugfix for PR118591
This bug occurs only with '-Os' option.
The function 'inherit_reload_reg ()' have a wrong condition:
static bool
inherit_reload_reg (bool def_p, int original_regno,
enum reg_
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