Re: [PATCH] AIX Build failure with default -std=gnu23.

On Fri, Dec 6, 2024 at 12:25 PM Rainer Orth wrote: > Hi David, > > > No objection from me, but Ian is the maintainer of libiberty, so I'll > defer > > to him, especially about style and overall software engineering. > > > > The C23 change presumably will break on Alpha OSF/1 as well. Does GCC >

Re: [PATCH] AIX Build failure with default -std=gnu23.

Hi David, > No objection from me, but Ian is the maintainer of libiberty, so I'll defer > to him, especially about style and overall software engineering. > > The C23 change presumably will break on Alpha OSF/1 as well. Does GCC > still support OSF/1? It might be preferred to delete the block en

[committed] i386: Fix unwanted fwprop to 3dNOW! insn [PR117926]

The compiler is able to forward propagate a partial vector V4SF instruction using XMM registers to a 3dNOW! V2SF instruction using MM registers. Prevent unwanted transformation by tagging 3dNOW! V2SF instructions using generic RTXes with "(unspec [(const_int 0)] UNSPEC_3DNOW)" tag. PR target/

Re: [PATCH 3/3] c++: use diagnostic nesting [PR116253]

On 11/12/24 9:02 AM, David Malcolm wrote: [from 0/3] The most natural way to present textual output is to use indentation, so patch 1 does this. However, our existing textual format uses the source location as a prefix, e.g. PATH/foo.cc: error: message goes here and unfortunately this makes th

Re: [PATCH] AArch64: Cleanup alignment macros

Hi Richard, > So just to be sure I understand: we still want to align (say) an array > of 4 chars to 32 bits so that the LDR & STR are aligned, and an array of > 3 chars to 32 bits so that the LDRH & STRH for the leading two bytes are > aligned?  Is that right?  We don't seem to take advantage of

Re: [PATCH] c++: Allow overloaded builtins to be used in SFINAE context

On 12/6/24 12:01 PM, Matthew Malcomson wrote: On 12/4/24 19:09, Jason Merrill wrote: External email: Use caution opening links or attachments @@ -7752,7 +7859,7 @@ get_atomic_generic_size (location_t loc, tree function,    it by using TREE_INT_CST_LOW instead of tree_to_*hwi. Those h

Re: [RFC 0/4] Hard Register Constraints

Is there a PR for this feature? (Just to make sure that I don't miss progress on this I could CC to the PR). Johann Am 10.09.24 um 16:20 schrieb Stefan Schulze Frielinghaus: This series introduces hard register constraints. The first patch enables hard register constraints for asm statements

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