Re: [PATCH 3/8] ipa: Skip type conversions in jump function constructions

On Tue, Dec 3, 2024 at 12:09 PM Martin Jambor wrote: > > Hi, > > sorry for re-posting this but my mail client broke threading when > saving the email as Draft somehow and I really hope to still get this > testcase working for GCC 15: > > On Fri, Nov 15 2024, Richard Biener wrote: > > On Fri, Nov 1

[PATCH 2/2] libstdc++: Implement for C++26 (P3370R1)

This is the second part of the P3370R1 proposal just approved by the committee in Wrocław. This adds C++ equivalents of the functions added to C23 by WG14 N2683. These functions are in the global namespace, but to avoid collisions with the same functions defined by other standard library implement

[PATCH 1/2] libstdc++: Implement for C++26 (P3370R1)

This is the first part of the P3370R1 proposal just approved by the committee in Wrocław. This adds C++ equivalents of the functions added to C23 by WG14 N3022. These functions are in the global namespace, but to avoid collisions with the same functions defined by other standard library implementa

Re: [PATCH v3 1/7] middle-end: Handle resized PHI nodes in loop_version()

On Mon, Dec 2, 2024 at 1:55 AM Lewis Hyatt wrote: > > This patch is my new way to handle what was previously done in v2 patch > 04/14, discussed at: > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669527.html > > The only places I have found running into trouble with reallocated PHI node

Re: [PATCH v3 2/7] final: Fix call to INSN_LOCATION on a NOTE rtl

On Mon, Dec 2, 2024 at 1:51 AM Lewis Hyatt wrote: > > This patch was previously discussed at: > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/670354.html > > I have attempted to fix it per the feedback in the above thread. Note that > this version is a change in behavior. In my v2 patch,

Re: [PATCH v3 6/7] Support for 64-bit location_t: gimple parts

On Mon, Dec 2, 2024 at 2:01 AM Lewis Hyatt wrote: > > This patch was previously discussed here: > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669437.html > > This version addresses that feedback, and I have also moved it in the patch > ordering to be after the change to 64-bit location

Re: [PATCH] gcc: download_prerequisites: add --verbose and --no-verbose

On Tue, Dec 3, 2024 at 7:09 AM Tiezhu Yang wrote: > > When executing the script download_prerequisites, the download speed may > be extremely slow and there is no any output, the users do not know what > happened. > > Given the command wget and curl have options --verbose and --no-verbose, > add t

[patch,avr] Improve location of late diagnostics

Some diagnostics are issues late, e.g. in avr_print_operand(). This patch uses the insn's location as a proxy for the operand location. Without the patch, the location is usually input_location, which points to the closing } of the function body. Ok for trunk? Johan -- AVR: Improve location o

[PATCH] gcc: download_prerequisites: add --verbose and --no-verbose

When executing the script download_prerequisites, the download speed may be extremely slow and there is no any output, the users do not know what happened. Given the command wget and curl have options --verbose and --no-verbose, add them for download_prerequisites to give a chance to see the detai

Re: [PATCH v3 5/7] Support for 64-bit location_t: Activate 64-bit location_t

On Mon, Dec 2, 2024 at 1:50 AM Lewis Hyatt wrote: > > With the codebase having already been prepared to handle it, change > location_t to be a 64-bit integer instead of a 32-bit integer. OK if there's no comments from others within 48h. Thanks, Richard. > libcpp/ChangeLog: > > * include

[PATCH] aarch64: Update cpuinfo strings for some arch features

Hi all, The entries for some recently-added arch features were missing the cpuinfo string used in -march=native detection. Presumably the Linux kernel had not specified such a string at the time the GCC support was added. But I see that current versions of Linux do have strings for these features

Re: [PATCH v3 1/7] middle-end: Handle resized PHI nodes in loop_version()

On Tue, Dec 03, 2024 at 01:28:28PM +0100, Richard Biener wrote: > On Mon, Dec 2, 2024 at 1:55 AM Lewis Hyatt wrote: > > > > This patch is my new way to handle what was previously done in v2 patch > > 04/14, discussed at: > > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669527.html > > >

Re: [PATCH v3 1/7] middle-end: Handle resized PHI nodes in loop_version()

On Tue, Dec 3, 2024 at 2:07 PM Lewis Hyatt wrote: > > On Tue, Dec 03, 2024 at 01:28:28PM +0100, Richard Biener wrote: > > On Mon, Dec 2, 2024 at 1:55 AM Lewis Hyatt wrote: > > > > > > This patch is my new way to handle what was previously done in v2 patch > > > 04/14, discussed at: > > > https://

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

Am Dienstag, dem 03.12.2024 um 14:31 + schrieb Qing Zhao: > > > On Dec 3, 2024, at 01:33, Martin Uecker wrote: > > > > Am Montag, dem 02.12.2024 um 22:58 + schrieb Qing Zhao: > > > > > > > On Dec 2, 2024, at 16:13, Martin Uecker wrote: > > > > > > > > Am Montag, dem 02.12.2024 um 20:1

[PATCH v2] c++/contracts: ICE with contract assert on non-empty statement [PR 117579]

>This question implies to me that the sender has commit access, which I >don't think you do yet since you aren't in MAINTAINERS. But I can't >think of a similar standard question for contributors without commit >access; I guess just leave it out. ack >For git-am this line should contain scisso

[patch, avr, applied] ad PR117726: Also split logic shifts of bitsize - 1

Applied the patch below which also splits logic shifts with an offset of bitsize - 1 into byte operations. Johann -- AVR: ad target/117726 - Also split logic shifts of bitsize - 1. When -msplit-bit-shift is on, also split logic shifts of bitsize(mode) - 1. gcc/ PR target/117726

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

> On Dec 3, 2024, at 10:07, Martin Uecker wrote: > > Am Dienstag, dem 03.12.2024 um 14:31 + schrieb Qing Zhao: >> >>> On Dec 3, 2024, at 01:33, Martin Uecker wrote: >>> >>> Am Montag, dem 02.12.2024 um 22:58 + schrieb Qing Zhao: > On Dec 2, 2024, at 16:13, Martin Uecker wr

Re: [PATCH v2] RISC-V: Add --with-cmodel configure option

Let you know I am working on that and will send the v3 patch soon, also I have tested that on aarch64 from cfram. On Mon, Aug 26, 2024 at 12:40 AM Jeff Law wrote: > > > > On 8/4/24 8:24 PM, Hau Hsu wrote: > > Oh the Palmer's patch is here > > [PATCH] RISC-V: Add --with-cmodel configure-time argum

Re: [patch,avr] Improve location of late diagnostics

вт, 3 дек. 2024 г. в 17:32, Georg-Johann Lay : > > Some diagnostics are issues late, e.g. in avr_print_operand(). > This patch uses the insn's location as a proxy for the operand > location. Without the patch, the location is usually input_location, > which points to the closing } of the function

Re: [PATCH v2] libstdc++: constrain std::atomic's default constructor

Hello, Following the outcome of the previous discussion, the attached revised patch implements the proposed resolution to LWG 4169, moved to WP in Wrocław. https://cplusplus.github.io/LWG/issue4169 Thanks, -- Giuseppe D'Angelo From 3dc64d830c61a16c2c4c0722a3983054aad1b04e Mon Sep 17 00:00:0

Re: [PATCH 2/2] RISC-V: Support RISC-V Profiles RVA/B23.

On Tue, 03 Dec 2024 03:02:47 PST (-0800), jia...@iscas.ac.cn wrote: This patch introduces support for RISC-V Profiles RV23A and RV23B [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-v0.7-ratificat

Re: [PATCH v1] RISC-V: Fix incorrect optimization options passing to reduc and ternop

lgtm On Tue, Dec 3, 2024 at 2:13 PM wrote: > > From: Pan Li > > Like the strided load/store, the testcases of vector reduce and ternop > are designed to pick up different sorts of optimization options but > actually these option are ignored according to the Execution log of > the gcc.log. > > Th

[PATCH] testsuite: Fix CRC testcases

Thank you for pointing it out. I guess the RV32 issue may still exist. Bohan -- From:Xi Ruoyao Send Time:2024 Dec. 3 (Tue.) 15:56 To:Bohan Lei; "gcc-patches" Cc:jeffreyalaw; mariamarutunian Subject:Re: [PATCH] testsuite: Fix CRC te

RE: [PATCH 2/8]AArch64: Add Neoverse V3 core definition and cost model

> -Original Message- > From: Kyrylo Tkachov > Sent: Tuesday, December 3, 2024 10:19 AM > To: Tamar Christina > Cc: GCC Patches ; nd ; Richard > Earnshaw ; Marcus Shawcroft > ; ktkac...@gcc.gnu.org; Richard Sandiford > > Subject: Re: [PATCH 2/8]AArch64: Add Neoverse V3 core definition and

[committed] libstdc++: Make std::vector constructor noexcept (LWG 3778)

LWG 3778 was approved in November 2022. We already implement all the changes except for one, which this commit does. The new test verifies all the changes from LWG 3778, not just the one implemented here. libstdc++-v3/ChangeLog: * include/bits/stl_bvector.h (vector(const allocator_type&)

Re: [PATCH v1 1/1] aarch64: fix fp8 cpuinfo feature names

On 12/3/2024 10:24 AM, Kyrylo Tkachov wrote: Hi Claudio, On 2 Dec 2024, at 19:14, Claudio Bantaloukas wrote: The previous version of the patch was based on the mistaken assumption that features in /proc/cpuinfo had matching names to the feature names that gcc and gas accept. This patch e

[PATCH v3] match.pd: Add pattern to simplify `(a - 1) & -a` to `0`

Thank you for the feedback. I have made the minor changes that were requested. Additionally, I extracted the repetitive code into a reusable helper function, match_plus_neg_pattern, making the code much more readable. Furthermore, the logic, code, and tests remain the same as in version 2 of the pa

Re: [PATCH] SVE intrinsics: Fold svmul and svdiv by -1 to svneg for unsigned types

Ping. Thanks, Jennifer > On 26 Nov 2024, at 09:18, Jennifer Schmitz wrote: > > > >> On 20 Nov 2024, at 13:43, Richard Sandiford >> wrote: >> >> External email: Use caution opening links or attachments >> >> >> Jennifer Schmitz writes: On 13 Nov 2024, at 12:54, Richard Sandiford >>

[PATCH] MAINTAINERS: Add myself to write after approval

ChangeLog: * MAINTAINERS: Add myself. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7d65ed64bdda..a81ba5d70fec 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -639,6 +639,7 @@ H.J. Lu hjl Xiong Hu L

Re: PING: [PATCH v4 1/7] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

On Mon, Dec 2, 2024 at 7:55 PM Jeff Law wrote: > > > > On 12/2/24 1:55 AM, Richard Biener wrote: > > On Sun, Dec 1, 2024 at 11:15 PM Jeff Law wrote: > >> > >> > >> > >> On 11/27/24 3:34 PM, H.J. Lu wrote: > >>> On Thu, Nov 21, 2024, 2:02 PM H.J. Lu >>> > wrote: > >>>

Re: [PATCH] phiopt: don't handle the case cond edge dest is itself [PR117243]

On Mon, Dec 2, 2024 at 10:52 PM Andrew Pinski wrote: > > After r12-5300-gf98f373dd822b3, phiopt could get the following bb structure: > | > middle-bb -| > || > | || | > phi<1, 2> | | > cond | | > || | > |---

[PATCH] bitintlower: Fix up ?ROTATE_EXPR lowering [PR117847]

Hi! In the ?ROTATE_EXPR lowering I forgot to handle rotation by 0 correctly. INTEGER_CST 0 is very unlikely, it would be probably folded away, but a non-constant count can't use just p - n because then the shift count is out of bounds for zero. In the FE I use n == 0 ? x : (x << n) | (x >> (p - n

RE: [PATCH 1/2]middle-end: refactor type to be explicit in operand_equal_p [PR114932]

On Mon, 2 Dec 2024, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Friday, November 29, 2024 8:57 AM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; rguent...@suse.de; > > j...@ventanamicro.com > > Subject: Re: [PATCH 1/2]middle-end: refact

Re: [Patch] OpenMP: 'allocate' directive - fixes for 'alignof' and [[omp::decl]]

On Tue, Dec 03, 2024 at 10:34:34AM +0100, Tobias Burnus wrote: > --- a/gcc/testsuite/c-c++-common/gomp/allocate-18.c > +++ b/gcc/testsuite/c-c++-common/gomp/allocate-18.c > @@ -17,14 +17,14 @@ typedef enum omp_allocator_handle_t > > void test0 () > { > - int A1[5]; > + int A1[5], B1[1]; I'd

Re: [PATCH] tree-ssanames, match.pd: get_nonzero_bits/with_*_nonzero_bits* cleanups and improvements [PR117420]

On Tue, 26 Nov 2024, Jakub Jelinek wrote: > Hi! > > The following patch implements the with_*_nonzero_bits* cleanups and > improvements I was talking about. > > get_nonzero_bits is extended to also handle BIT_AND_EXPR (as a tree or > as SSA_NAME with BIT_AND_EXPR def_stmt), new function is added

Ping: [PATCH v3 1/1] CPP: Add flag to generate resolver at default version implementation.

Hi all, Ping for this as it no longer needs the C patch and is independent. Kind regards, Alfie On 26/11/2024 14:35, alfie.richa...@arm.com wrote: This patch adds the TARGET_CREATE_FMV_DISPATCHER_AT_DEFAULT_IMPL flag which changes FMV behavior for target_version functions to match the Arm C La

Re: [Patch] OpenMP: 'allocate' directive - fixes for 'alignof' and [[omp::decl]]

Hi Tobias, ok for the Fortran part. - Andre On Tue, 3 Dec 2024 10:34:34 +0100 Tobias Burnus wrote: > In C, [[omp::decl]] wasn't supported and when discussing 'alignof' with Jakub, > he pointed out that there are corner cases (see commit log for one), which > imply that it is better that 'omp a

Re: Re [PATCH v5] replace atoi with strtol in varasm.cc (decode_reg_name_and_count) [PR114540]

On Thu, Nov 28, 2024 at 08:15:08PM +0100, Heiko Eißfeldt wrote: > > There are three important parts missing. > > > > I don't see you in MAINTAINERS file, so you need to decide if you assign > > copyright to FSF or submit this under DCO. > I wonder if it is ok to add myself to MAINTAINERS file? No

Re: [PATCH] bitintlower: Fix up ?ROTATE_EXPR lowering [PR117847]

On Tue, 3 Dec 2024, Jakub Jelinek wrote: > Hi! > > In the ?ROTATE_EXPR lowering I forgot to handle rotation by 0 correctly. > INTEGER_CST 0 is very unlikely, it would be probably folded away, but > a non-constant count can't use just p - n because then the shift count > is out of bounds for zero.

Re: [PATCH 2/8]AArch64: Add Neoverse V3 core definition and cost model

Hi Tamar, Something I noticed when looking at the various tuning files…. > On 26 Jul 2024, at 11:20, Tamar Christina wrote: > > External email: Use caution opening links or attachments > > > Hi All, > > This adds a cost model and core definition for Neoverse V3. > > It also makes Cortex-X4

[committed] libstdc++: Fix constraints on std::optional converting constructors [PR117889]

The converting constructors had the same bug as the converting assignments, so need the same fix as r15-5833-gc2c7d71eeeab7c. libstdc++-v3/ChangeLog: PR libstdc++/117889 PR libstdc++/117858 * include/std/optional (optional(const optional&)): Fix copy and paste erro

Re: [PATCH v1 1/1] aarch64: fix fp8 cpuinfo feature names

Hi Claudio, > On 2 Dec 2024, at 19:14, Claudio Bantaloukas > wrote: > > > The previous version of the patch was based on the mistaken assumption that > features in /proc/cpuinfo had matching names to the feature names that gcc and > gas accept. > This patch enables the fp8 feature when the f8c

[Patch] plugin/plugin-gcn.c: Fix error handling of GOMP_OFFLOAD_openacc_async_construct (was: [Patch] libgomp/plugin/plugin-gcn.c: async-queue init - fix function-return type and fail fatally)

Thomas Schwinge wrote: That's a bug in 'libgomp/plugin/plugin-gcn.c:maybe_init_omp_async' (or its users); the real user of 'GOMP_OFFLOAD_openacc_async_exec' does handle the error condition: Well, it does not really handle it: It also just calls 'fatal', admittedly after unlocking but if the pro

Re: [PATCH] RISC-V: Introduce vector lowering of VEC_PERM_EXPR for large vector types

On Sun, Dec 1, 2024 at 4:51 PM Dusan Stojkovic wrote: > > This patch introduces partial vectorization support for VEC_PERM_EXPR > when vector types specified are not supported on some architectures > because of their size. > > Take, for instance, this vector type: > typedef int32_t vnx32si __attri

Re: [PATCH v2] fold fold_truth_andor field merging into ifcombine

On Fri, Nov 22, 2024 at 10:22 PM Alexandre Oliva wrote: > > > This patch introduces various improvements to the logic that merges > field compares, while moving it into ifcombine. > > Before the patch, we could merge: > > (a.x1 EQNE b.x1) ANDOR (a.y1 EQNE b.y1) > > into something like: > > (

Re: [PATCH v1 1/1] aarch64: fix fp8 cpuinfo feature names

> On 3 Dec 2024, at 11:41, Claudio Bantaloukas > wrote: > > > > On 12/3/2024 10:24 AM, Kyrylo Tkachov wrote: >> Hi Claudio, >>> On 2 Dec 2024, at 19:14, Claudio Bantaloukas >>> wrote: >>> >>> >>> The previous version of the patch was based on the mistaken assumption that >>> features in

[PATCH 2/2] tree-optimization/117874 - optimize SLP discovery budget use

The following tries to avoid eating into the SLP discovery limit when we can do cheaper checks first. Together with the previous patch this allows to use two-lane SLP discovery for mult_su3_an in 433.milc. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/

[PATCH 1/2] Use the number of relevant stmts to limit SLP build

The following removes scalar stmt counting from loop vectorization and using that as base to limit both the SLP tree final size and discovery. Instead use the number of relevant stmts for that which is conveniently the number of stmt_vec_infos we create which in turn includes things like pattern s

Re: [PATCH] c++: Allow overloaded builtins to be used in SFINAE context

Attempting to resend my response differently since my last email seems to have had problems with email permissions. Apologies for the duplication. On 12/2/24 16:48, Jason Merrill wrote: External email: Use caution opening links or attachments On 10/21/24 6:43 AM, Matthew Malcomson wrote: Pin

[PATCH] AArch64: Cleanup alignment macros

Change the AARCH64_EXPAND_ALIGNMENT macro into proper function calls to make future changes easier. Use the existing alignment settings, however avoid overaligning small array's or structs to 64 bits when there is no benefit. This gives a small reduction in data and stack size. Passes regress & b

RE: [PATCH 2/2] libstdc++: Implement for C++26 (P3370R1)

Hi, two issues: 1) #include is missing in std.compat.cc.in 2) does the updated std.compat module actually work? When I experimented with implementing the std module in gcc, I couldn't #include standard headers, after they were imported via std module (since GMF merging isn't implemented yet), i.

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

> On Dec 3, 2024, at 01:33, Martin Uecker wrote: > > Am Montag, dem 02.12.2024 um 22:58 + schrieb Qing Zhao: >> >>> On Dec 2, 2024, at 16:13, Martin Uecker wrote: >>> >>> Am Montag, dem 02.12.2024 um 20:15 + schrieb Qing Zhao: > On Nov 30, 2024, at 07:22, Martin Uecker wro

Re: [PATCH 1/1] aarch64: remove extra XTN in vector concatenation

Hi Kyrill, thanks for the very quick response! On 02/12/2024 15:09, Kyrylo Tkachov wrote: Thanks for the patch. As this is sent after the end of stage1 and is not finishing support for an architecture feature perhaps we should stage this for GCC 16. But if it fixes a performance problem in a r

Re: [patch,avr] Skip some tests that don't work on avr

On 12/3/24 3:57 AM, Georg-Johann Lay wrote: This patch skips some tests that don't work on avr. Ok for trunk? Johann -- AVR: Skip some test cases that don't work for it. gcc/testsuite/ * gcc.c-torture/execute/ieee/cdivchkd.x: New file. * gcc.c-torture/execute/ieee/cdivchkf.x: Ne

Re: Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

> On Dec 3, 2024, at 01:25, Martin Uecker wrote: > > Am Montag, dem 02.12.2024 um 22:33 + schrieb Qing Zhao: > > > diff --git a/gcc/testsuite/gcc.dg/pr114014.c b/gcc/testsuite/gcc.dg/pr114014.c new file mode 100644 index 000..ab783f4f85d --- /d

Re: Why is 3x2^96 defined as 59421121885698253195157962752 instead of 237684487542793012780631851008?

On Tue, Dec 3, 2024 at 8:24 AM 蒋力夫 Lifu JIANG wrote: > > In the following two files: > gcc/libquadmath/math/expq.c > glibc/blob/master/sysdeps/ieee754/ldbl-128/e_expl.c It looks like a bug to me. I suggest filing one on the glibc side. Uses: /* Calculate t/32768. */ t = x + THREEp

[PATCH] c++: Fix up erroneous template error recovery ICE [PR117826]

Hi! The testcase in the PR (which can't be easily reduced and is way too large and has way too many errors) results in an ICE, because the erroneous_templates hash_map holds trees of erroneous templates across ggc_collect and some of the templates in there could be removed, so the later lookup can

[Patch] OpenMP: 'allocate' directive - fixes for 'alignof' and [[omp::decl]]

In C, [[omp::decl]] wasn't supported and when discussing 'alignof' with Jakub, he pointed out that there are corner cases (see commit log for one), which imply that it is better that 'omp allocate align(…) doesn't affect 'alignof'. The patch now removes the alignment handling from the FE (C and Fo

Re: [PATCH v1] Match: Refactor the unsigned SAT_SUB match patterns [NFC]

On Fri, Nov 29, 2024 at 1:35 PM wrote: > > From: Pan Li > > This patch would like to refactor the all unsigned SAT_SUB patterns, aka: > * Extract type check outside. > * Re-arrange the related match pattern forms together. > > The below test suites are passed for this patch. > * The rv64gcv fully

[patch,avr] Skip some tests that don't work on avr

This patch skips some tests that don't work on avr. Ok for trunk? Johann -- AVR: Skip some test cases that don't work for it. gcc/testsuite/ * gcc.c-torture/execute/ieee/cdivchkd.x: New file. * gcc.c-torture/execute/ieee/cdivchkf.x: New file. * gcc.dg/flex-array-counte

[PATCH 0/2] RISC-V: Support RISC-V Profiles.

This patch series introduces support for RISC-V Profiles RV20, RV22[1], and RV23[2][3].The updates enhance compatibility and streamline the process of leveraging RISC-V Profiles through the -march option. These additions are in line with the RISC-V standard and facilitate the adoption of these prof

[PATCH 1/2] RISC-V: Support RISC-V Profiles RV20/22.

This patch introduces support for RISC-V Profiles RV20 and RV22 [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0 gcc/ChangeLog: * common/config/riscv/riscv-common.cc (struct riscv_profiles): New s

[PATCH 2/2] RISC-V: Support RISC-V Profiles RVA/B23.

This patch introduces support for RISC-V Profiles RV23A and RV23B [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-v0.7-ratification-vote gcc/ChangeLog: * common/config/riscv/riscv-common.c

[patch,testsuite] Rectify some tests

This patch fixes some unrelated tests that were failing. In most cases, bad tests are slipping in because they are preprocessed like: size_t -> long unsigned int -> breaks when size_t is smaller etc. Other reason is that they assume int is > 16 bits. Unfortunately, in many cases it's not known

Re: [PATCH 3/8] ipa: Skip type conversions in jump function constructions

Hi, sorry for re-posting this but my mail client broke threading when saving the email as Draft somehow and I really hope to still get this testcase working for GCC 15: On Fri, Nov 15 2024, Richard Biener wrote: > On Fri, Nov 15, 2024 at 1:45 PM Jan Hubicka wrote: >> > >> > The patch only ever s

Re: [patch,avr] Skip some tests that don't work on avr

Am 03.12.24 um 15:36 schrieb Jeff Law: On 12/3/24 3:57 AM, Georg-Johann Lay wrote: This patch skips some tests that don't work on avr. Ok for trunk? Johann -- AVR: Skip some test cases that don't work for it. gcc/testsuite/  * gcc.c-torture/execute/ieee/cdivchkd.x: New file.  * gcc

Re: [PATCH 1/2] c++: Implement a coroutine language debug dump

On 9/18/24 4:36 PM, Arsen Arsenović wrote: This provides to people working on coroutines, as well as writing tests for coroutines, a way to have insight into the results and inputs of the coroutine transformation passes, which is quite essential to understanding what happens in the coroutine tran

libstdc++: use is_virtual_base_of in std::weak_ptr operations

Hello, The attached patch changes std::weak_ptr "converting move constructor/assignment" -- that is, from a rvalue weak_ptr to a weak_ptr. In the general case, such conversion requires lock()ing the weak_ptr because the pointed-to object might have already been destroyed, and a Derived->Bas

[PATCH] libstdc++: add initializer_list constructor to std::span (P2447)

Hello, The attached patch adds the span(initializer_list) constructor, added by P2447R6 for C++26. It seems that GCC is somewhat aggressive with its -Winit-list-lifetime warning, which actively interferes with this feature. The idea of the new constructor is to allow calls like: void f(s

Re: [Patch, fortran] PR102689 revisited - Segfault with RESHAPE of CLASS as actual argument

Hi Harald, > > Reviewing it properly is beyond me, but if nobody else volunteers, > I am not so sure that is right but your review is mightily helpful. I worry that the logic in the handling of the gfc_ss's is not clear enough. Some time, when feeling bored, I might try to refactor it. > I'll j

[PATCH] arm: Fix LDRD register overlap [PR117675]

The register indexed variants of LDRD have complex register overlap constraints which makes them hard to use without using output_move_double (which can't be used for atomics as it doesn't guarantee to emit atomic LDRD/STRD when required). Add a new predicate and constraint for plain LDRD/STRD wi

Re: libstdc++: use is_virtual_base_of in std::weak_ptr operations

On Tue, 3 Dec 2024 at 16:19, Giuseppe D'Angelo wrote: > > Hello, > > The attached patch changes std::weak_ptr "converting move > constructor/assignment" -- that is, from a rvalue weak_ptr to a > weak_ptr. > > In the general case, such conversion requires lock()ing the weak_ptr > because the pointe

[wwwdocs] cxx-status.html: Update C++26 proposals to new revisions

I noticed that https://gcc.gnu.org/projects/cxx-status.html did not list newer revisions of three proposals. (I have on idea whether still newer exists or others should be updated as well, but at least that's a start.) OK? Tobias cxx-status.html: Update C++26 proposals to new revisions Bum

Re: libstdc++: use is_virtual_base_of in std::weak_ptr operations

On Tue, 3 Dec 2024 at 16:56, Jonathan Wakely wrote: > > On Tue, 3 Dec 2024 at 16:19, Giuseppe D'Angelo > wrote: > > > > Hello, > > > > The attached patch changes std::weak_ptr "converting move > > constructor/assignment" -- that is, from a rvalue weak_ptr to a > > weak_ptr. > > > > In the general

[PATCH 1/2] middle-end/116083 - vectorizer slowness

Turns out SLP discovery can end up doing a lot of vector type builds from scalar types. Those are all ultimatively cached but end up built and layouted first. The latter is particularly expensive because it does tree node arithmetic to compute TYPE_SIZE and TYPE_SIZE_UNIT. The following replaces

[PATCH 2/2] tree-optimization/116083 - SLP discovery slowness

One large constant factor of SLP discovery is figuring the vector type for each individual lane of each node. That should be redundant since the structual comparison of stmts should ensure they end up the same so the following computes them only once per node rather than for each lane. This cuts

[PATCH 2/2] maintainer-scripts: build the libgdiagnostics docs for the website [PR117883]

Tested locally. OK for trunk? maintainer-scripts/ChangeLog: PR web/117883 * update_web_docs_git: Introduce SPHINX_VENV to make it easier to test the script. Add the libgdiagnostics docs and testsuite to the files to be preserved. Use sphinx to build the l

[PATCH] c++: Don't reject pointer to virtual method during constant evaluation [PR117615]

We currently reject the following valid code: === cut here === struct Base { virtual void doit (int v) const {} }; struct Derived : Base { void doit (int v) const {} }; using fn_t = void (Base::*)(int) const; struct Helper { fn_t mFn; constexpr Helper (auto && fn) : mFn(static_cast

[pushed] libgdiagnostics: fix docs metadata

Pushed to trunk as r15-5898-g2b93d71b068b2f. gcc/ChangeLog: * doc/libgdiagnostics/conf.py: Remove "author". Change "copyright" field to the FSF. Signed-off-by: David Malcolm --- gcc/doc/libgdiagnostics/conf.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

[PATCH 1/2] maintainer-scripts: fix jit docs on website

I noticed whilst working on the libgdiagnostics docs that some errors like this were occurring in the jit docs: /tmp/gcc-doc-update.3782849/gcc/gcc/jit/docs/cp/topics/asm.rst:63: WARNING: Include file '/tmp/gcc-doc-update.3782849/gcc/gcc/testsuite/jit.dg/test-asm.cc' not found or reading it fail

Re: [PATCH v2] c++: P2865R5, Remove Deprecated Array Comparisons from C++26 [PR117788]

On 12/3/24 2:46 PM, Marek Polacek wrote: On Thu, Nov 28, 2024 at 12:04:56PM -0500, Jason Merrill wrote: On 11/27/24 9:06 PM, Marek Polacek wrote: Not a bugfix, but this should only affect C++26. Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? -- >8-- This patch implements P2865R5

Re: [PATCH] c++: Allow overloaded builtins to be used in SFINAE context

On 12/3/24 8:46 AM, Matthew Malcomson wrote: Attempting to resend my response differently since my last email seems to have had problems with email permissions. Apologies for the duplication. On 12/2/24 16:48, Jason Merrill wrote: External email: Use caution opening links or attachments On 1

Re: [PATCH 2/3] libstdc++: Stop using _Self typedefs in std::list iterators

Pushed On Fri, 15 Nov 2024 at 15:28, Jonathan Wakely wrote: > > We can just use the injected-class-name instead of defining a new name. > That seems simpler. > > libstdc++-v3/ChangeLog: > > * include/bits/stl_list.h (_List_iterator): Remove _Self typedef > and just use injected-cl

Re: [PATCH 1/3] libstdc++: Refactor std::list::size() for cxx11 ABI

Pushed On Fri, 15 Nov 2024 at 15:26, Jonathan Wakely wrote: > > Remove some preprocessor conditionals by moving the _M_size member for > the cxx11 ABI into a new base class, which is empty for the gcc4-compat > ABI. > > Move some unused members that are only retained for ABI compatibility to > th

[committed] libstdc++: Fix parallel std::exclusive_scan [PR108236]

The standard says that std::exclusive_scan can be used to work in place, i.e. where the output range is the same as the input range. This means that the first sum cannot be written to the output until after reading the first input value, otherwise we'll already have overwritten the first input valu

Re: [PATCH 3/3 v2] libstdc++: Add fancy pointer support to std::list [PR57272]

Pushed On Sat, 16 Nov 2024 at 23:34, Jonathan Wakely wrote: > > Currently std::list uses raw pointers to connect its nodes, which is > non-conforming. We should use the allocator's pointer type everywhere > that a "pointer" is needed. > > Because the existing types like _List_node are part of the

RE: [PATCH 2/2]middle-end: use two's complement equality when comparing IVs during candidate selection [PR114932]

> > This patch implements a new OEP flag called OEP_STRUCTURAL_EQ. This flag > > will > > check if the operands would produce the same bit values after the > > computations > > even if the final sign is different. > > I think the name is badly chosen - we already have OEP_LEXICOGRAPHIC and > OE

Re: [PATCH v3 1/1] CPP: Add flag to generate resolver at default version implementation.

On 11/26/24 9:35 AM, alfie.richa...@arm.com wrote: This patch adds the TARGET_CREATE_FMV_DISPATCHER_AT_DEFAULT_IMPL flag which changes FMV behavior for target_version functions to match the Arm C Language Extension. The functional differences consist of: 1. Generating the resolver for the dispa

Re: [PATCH] c++: Fix up erroneous template error recovery ICE [PR117826]

On 12/3/24 3:42 AM, Jakub Jelinek wrote: Hi! The testcase in the PR (which can't be easily reduced and is way too large and has way too many errors) results in an ICE, because the erroneous_templates hash_map holds trees of erroneous templates across ggc_collect and some of the templates in ther

Re: [PATCH 2/2] c++/coroutines: handle (new-)extended alignment [PR104177]

On 12/3/24 2:31 PM, Iain Sandoe wrote: On 3 Dec 2024, at 18:28, Jason Merrill wrote: On 9/18/24 4:36 PM, Arsen Arsenović wrote: This patch implements support for frames and promises with new-extended alignment. There are two kinds of alignment to worry about here: - Promise alignment, which

Re: [PATCH 2/2] c++/coroutines: handle (new-)extended alignment [PR104177]

> On 3 Dec 2024, at 18:28, Jason Merrill wrote: > > On 9/18/24 4:36 PM, Arsen Arsenović wrote: >> This patch implements support for frames and promises with new-extended >> alignment. >> There are two kinds of alignment to worry about here: >> - Promise alignment, which causes "internal" paddi

Re: [PATCH] testsuite: Mark gcc.c-torture/execute/memcpy-a?.c tests expensive

On Dec 2, 2024, at 4:27 AM, Maciej W. Rozycki wrote: > > These tests can take several seconds per compilation to complete, taking > total elapsed time measured in minutes. Mark them as expensive so as to > let people skip them where they want to save on testing time. > > gcc/testsuite/

[committed] libstdc++: Simplify allocator propagation helpers using 'if constexpr'

Use diagnostic pragmas to allow using `if constexpr` in C++11 mode, so that we don't need to use tag dispatching. These helpers could be removed entirely by just using `if constexpr` directly in the container member functions, but that's a slightly larger change that can happen later. It also loo

[committed v2] libstdc++: Add fancy pointer support to std::forward_list [PR57272]

This takes a very similar approach to the changes for std::list. libstdc++-v3/ChangeLog: PR libstdc++/57272 * include/bits/forward_list.h (_GLIBCXX_USE_ALLOC_PTR_FOR_LIST): Define. (_Fwd_list_node_base::_M_base_ptr): New member functions. (_Fwd_list_node::_

Re: [patch,testsuite] Rectify some tests

On Dec 3, 2024, at 3:08 AM, Georg-Johann Lay wrote: > > This patch fixes some unrelated tests that were failing. > In most cases, bad tests are slipping in because they > are preprocessed like: > > size_t -> long unsigned int -> breaks when size_t is smaller etc. > > Other reason is that they a

[PATCH] Support Intel AVX10.2 minmax, vector copy and compare instructions

From: "Mo, Zewei" Hi all, As satcvt patch is about to commit, we will move on the final patch of AVX10.2. This patch will focus on AVX10.2 minmax, vector copy and compare instructions, which is mainly Chapter 8, 11 and 14 of AVX10.2 SPEC. Reference: Intel Advanced Vector Extensions 10.2 Archit

Ping: [PATCH V4 0/2] Separate PowerPC ISA bits from architecture bits set by -mcpu=

Ping patches 1-2 to separate PowerPC ISA bits from architecture bits set by -mcpu=. Message-ID Explanation of the patch set: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669108.html Patch #1, add rs6000 architecture masks: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/66910

[PATCH] testsuite: Fix CRC testcases

The RISC-V part has been fixed by another committed patch in https://gcc.gnu.org/pipermail/gcc-patches/2024-December/670722.html. -- From:Xi Ruoyao Send Time:2024 Dec. 4 (Wed.) 15:12 To:Bohan Lei Cc:"gcc-patches" Subject:Re: [PATCH]

Ping: [PATCH V4] Do not allow -mvsx to boost the cpu to power7

Ping patch to not allow -mvsx to boost the cpu to power7 Message-ID https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669106.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com

Re: [PATCH] gcc: download_prerequisites: add --verbose and --no-verbose

On 12/03/2024 09:12 PM, Eric Gallager wrote: On Tue, Dec 3, 2024 at 7:09 AM Tiezhu Yang wrote: When executing the script download_prerequisites, the download speed may be extremely slow and there is no any output, the users do not know what happened. Given the command wget and curl have optio

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