Re: [PATCH 0/2] RISC-V: Add intrinsics support and testcases for SiFive Xsfvfnrclipxfqf extension.

LGTM, committed to trunk :) On Mon, Dec 2, 2024 at 9:33 AM wrote: > > From: yulong > > This patch implements the Sifvie vendor extension Xsfvfnrclipxfqf[1] > support to gcc. Providing support for FP32-to-int8 Ranged Clip > instrctions. > > [1] https://www.sifive.com/document-file/fp32-to-int8-

[committed] testsuite: Adjust rs6000-ldouble-2.c for switch to -std=gnu23 by default [PR117663]

Hi! -std=gnu23/-std=c23 changes LDBL_EPSILON for IBM long double, see r13-3029 and https://gcc.gnu.org/pipermail/gcc-patches/2022-October/602738.html for details. That change even had a note: "and when we move to a C2x default, gcc.target/powerpc/rs6000-ldouble-2.c will need an appropriate option

RE: [PATCH 1/2]middle-end: refactor type to be explicit in operand_equal_p [PR114932]

> -Original Message- > From: Richard Biener > Sent: Friday, November 29, 2024 8:57 AM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; rguent...@suse.de; > j...@ventanamicro.com > Subject: Re: [PATCH 1/2]middle-end: refactor type to be explicit in > operand_equal_p [PR114932] >

Re: [PATCH] aarch64: Extend SVE2 bit-select instructions for Neon modes.

> On 29 Nov 2024, at 14:16, Richard Sandiford wrote: > > Kyrylo Tkachov writes: >>> On 27 Nov 2024, at 09:34, Richard Sandiford >>> wrote: >>> >>> Soumya AR writes: NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain operands inverted. These can be extend

[PATCH] tree-optimization/116352 - SLP scheduling and stmt order

The PR uncovers unchecked constraints on the ability to code-generate with SLP but also latent issues with regard to stmt order checking since loop (early-break) and BB (for quite some time) vectorization are no longer constraint to single-BBs. In particular get_later_stmt simply compares UIDs of

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On Sun, Dec 01, 2024 at 08:56:39AM -0700, Jeff Law wrote: > diff --git a/gcc/testsuite/gcc.dg/crc-side-instr-1.c > b/gcc/testsuite/gcc.dg/crc-side-instr-1.c > new file mode 100644 > index 000..69738d5c866 > --- /dev/null > +++ b/gcc/testsuite/gcc.dg/crc-side-instr-1.c > @@ -0,0 +1,27 @@ >

Re: PING: [PATCH v4 1/7] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

On 12/2/24 1:55 AM, Richard Biener wrote: On Sun, Dec 1, 2024 at 11:15 PM Jeff Law wrote: On 11/27/24 3:34 PM, H.J. Lu wrote: On Thu, Nov 21, 2024, 2:02 PM H.J. Lu mailto:hjl.to...@gmail.com>> wrote: Promote integer arguments smaller than int if TARGET_PROMOTE_PROTOTYPES retur

Re: [PATCH 1/1] aarch64: remove extra XTN in vector concatenation

Hi Akram, > On 2 Dec 2024, at 15:54, Akram Ahmad wrote: > > GIMPLE code which performs a narrowing truncation on the result of a > vector concatenation currently results in an unnecessary XTN being > emitted following a UZP1 to concate the operands. In cases such as this, > UZP1 should instead u

[PATCH v1] MAINTAINERS: add myself to write after approval

ChangeLog: * MAINTAINERS: Add myself to write after approval. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6851affb6cb..7d65ed64bdd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -345,6 +345,7 @@ Simon Baldwin simonb

[PATCH 1/1] aarch64: remove extra XTN in vector concatenation

GIMPLE code which performs a narrowing truncation on the result of a vector concatenation currently results in an unnecessary XTN being emitted following a UZP1 to concate the operands. In cases such as this, UZP1 should instead use a smaller arrangement specifier to replace the XTN instruction. Th

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On 12/2/24 7:02 AM, Jakub Jelinek wrote: On Sun, Dec 01, 2024 at 08:56:39AM -0700, Jeff Law wrote: diff --git a/gcc/testsuite/gcc.dg/crc-side-instr-1.c b/gcc/testsuite/gcc.dg/crc-side-instr-1.c new file mode 100644 index 000..69738d5c866 --- /dev/null +++ b/gcc/testsuite/gcc.dg/crc-s

Re: [patch,avr,testsuite,applied] gcc.c-torture/execute/memcpy-a*.c

On Sun, 1 Dec 2024, Georg-Johann Lay wrote: > > > > As a matter of interest, is the timeout/memory exhaustion observed with > > > > host compilation or target execution? > > > It happens during link, when the linker observes that the memory regions > > > won't fit: > > > > > > .../avr/bin/ld: mem

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

Hi Jeff, On Sun, 2024-12-01 at 08:56 -0700, Jeff Law wrote: > commit 148e20466c2c246df9472efed0f2ae94cb65a0f8 > Author: Matevos Mehrabyan > Date:   Mon Nov 11 13:00:10 2024 -0700 > >     [PATCH v6 09/12] Add symbolic execution support. >     >     Gives an opportunity to execute the code on bit

Re: [PATCH] arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

On Mon, 2 Dec 2024 at 12:44, Richard Earnshaw (lists) wrote: > > On 02/12/2024 11:21, Christophe Lyon wrote: > > If the target does not support floating-point, we register FP vector > > types as 'void' (see register_vector_type). > > > > The leads to warnings about 'pure attribute on function retu

[PATCH] tree-optimization/117874 - missed vectorization that's formerly hybrid

With SLP forced we fail to consider using single-lane SLP for a case that we still end up discovering as hybrid (in the PR in question this is because we run into the SLP discovery limit due to excessive association). Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. This solves a bi

Re: [PATCH] Add new hardreg PRE pass

On 10/31/24 12:29 PM, Andrew Carlotti wrote: This pass is used to optimise assignments to the FPMR register in aarch64. I chose to implement this as a middle-end pass because it mostly reuses the existing RTL PRE code within gcse.cc. Compared to RTL PRE, the key difference in this new pass i

[PATCH v1] RISC-V: Fix incorrect optimization options passing to cond and builtin

From: Pan Li Like the strided load/store, the testcases of vector cond and builtin are designed to pick up different sorts of optimization options but actually these option are ignored according to the Execution log of gcc.log. This patch would like to make it correct almost the same as what we f

Re: PING: [PATCH v4 1/7] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

On Tue, Dec 3, 2024 at 2:55 AM Jeff Law wrote: > > > > On 12/2/24 1:55 AM, Richard Biener wrote: > > On Sun, Dec 1, 2024 at 11:15 PM Jeff Law wrote: > >> > >> > >> > >> On 11/27/24 3:34 PM, H.J. Lu wrote: > >>> On Thu, Nov 21, 2024, 2:02 PM H.J. Lu >>> > wrote: > >>>

[PATCH 0/1] aarch64: remove extra XTN in vector concatenation

Hi all, This patch adds a new insn which optimises vector concatenations on SIMD/FP registers when a narrowing truncation is performed on the resulting vector. This usually results in codegen such as... uzp1v0.2d, v0.2d, v1.2d xtn v0.2s, v0.2d ret ... whereas the

Re: [PATCH] c++/contracts: ICE with contract assert on non empty statement [PR 117579]

On 12/2/24 10:59 AM, Nina Ranns wrote: Tested on x86_64-pc-linux-gnu. First time using git send-email, let me know if anything needs to be done differently. Thanks, just a few tweaks. OK for trunk? This question implies to me that the sender has commit access, which I don't think you do y

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

> On Nov 30, 2024, at 07:22, Martin Uecker wrote: > > Am Dienstag, dem 26.11.2024 um 20:59 + schrieb Qing Zhao: >> Think this over these days, I have another thought that need some feedback: >> >> The major issue right now is: >> >> 1. For the following structure in which the “counted_by”

[PING^3][PATCH v3] rs6000: Fix issue in specifying PTImode as an attribute [PR106895]

Ping! please review. Thanks & Regards Jeevitha On 14/10/24 5:16 pm, jeevitha wrote: > Hi All, > > The following patch has been bootstrapped and regtested on powerpc64le-linux. > > PTImode assists in generating even/odd register pairs on 128 bits. When the > user > specifies PTImode as an attr

[PING^3][PATCH] testsuite: Simplify target test and dg-options for AMO tests

Ping! please review. Thanks & Regards Jeevitha On 15/10/24 12:49 pm, jeevitha wrote: > Hi All, > > Removed powerpc*-*-* from the target test as it is always true. Simplified > options by removing -mpower9-misc and -mvsx, which are enabled by default with > -mdejagnu-cpu=power9. The has_arch_pwr

Re: [PATCH] arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

On 02/12/2024 11:21, Christophe Lyon wrote: > If the target does not support floating-point, we register FP vector > types as 'void' (see register_vector_type). > > The leads to warnings about 'pure attribute on function returning > void' when we declare the various load intrinsics because their >

Re: PING: [PATCH v4 1/7] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

On Sun, Dec 1, 2024 at 11:15 PM Jeff Law wrote: > > > > On 11/27/24 3:34 PM, H.J. Lu wrote: > > On Thu, Nov 21, 2024, 2:02 PM H.J. Lu > > wrote: > > > > Promote integer arguments smaller than int if TARGET_PROMOTE_PROTOTYPES > > returns true. > > > >

RE: [PATCH v3] MATCH: Simplify `(trunc)copysign ((extend)x, CST)` to `copysign (x, -1.0/1.0)` [PR112472]

> On Thu, Nov 14, 2024 at 11:59 AM Eikansh Gupta > wrote: > > > > This patch simplify `(trunc)copysign ((extend)x, CST)` to `copysign > > (x, -1.0/1.0)` depending on the sign of CST. Previously, it was simplified > > to > `copysign (x, CST)`. > > It can be optimized as the sign of the CST matters

Re: [PATCH] aarch64: Add flags field to aarch64-simd-pragma-builtins.def

On Mon, Dec 2, 2024 at 2:00 AM Richard Sandiford wrote: > > This patch adds a flags field to aarch64-simd-pragma-builtins.def > and uses it to add attributes to the function declaration. > > Bootstrapped & regression-tested on aarch64-linux-gnu. I'll commit > tomorrow if there are no comments bef

Re: [PATCH] riscv: Avoid narrowing warning

LGTM, thanks :) On Mon, Dec 2, 2024 at 6:00 PM Andreas Schwab wrote: > > * config/riscv/riscv.cc (fli_value_hf, fli_value_sf) > (fli_value_df): Use integer constants. Constify. > (riscv_float_const_rtx_index_for_fli): Add const. > --- > gcc/config/riscv/riscv.cc | 64 +++

[PATCH] arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

If the target does not support floating-point, we register FP vector types as 'void' (see register_vector_type). The leads to warnings about 'pure attribute on function returning void' when we declare the various load intrinsics because their call_properties say CP_READ_MEMORY (thus giving them th

[patch, avr] ad PR117726: Improve logic 8-bit shifts with an offset of 6

Logic 8-bit shifts with an offset of 6 can be improved by supporting them as 3-operand operations. Ok for trunk? Johann -- AVR: Tweak uin8_t << 6 and uint8_t >> 6 shifts. Logic 8-bit shifts with an offset of 6 can be improved by supporting them as 3-operand operations. PR target/1177

Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On 11/30/24 3:30 AM, Christophe Lyon wrote: Hi! On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU vectors and have the same semantics with operations that are defined on GNU vectors. gcc/ChangeLog

Re: Ping: [PATCH] c++: Allow overloaded builtins to be used in SFINAE context

Ping 4 Also adding those that I've Cc'd in the patchset for FP atomics since this patch is enabling that one. From: Matthew Malcomson Sent: 26 November 2024 10:26 AM To: gcc-patches@gcc.gnu.org Cc: Jason Merrill ; Nathan Sidwell Subject: Re: Ping: [PATCH] c++:

Ping^6 [PATCH 0/2] Prime path coverage to gcc/gcov

Ping. On 11/21/24 20:14, Jørgen Kvalsvik wrote: Ping. On 11/12/24 09:56, Jørgen Kvalsvik wrote: Ping. On 10/30/24 13:55, Jørgen Kvalsvik wrote: Ping. On 10/21/24 15:21, Jørgen Kvalsvik wrote: Ping. On 10/10/24 10:08, Jørgen Kvalsvik wrote: Ping. On 10/3/24 12:46, Jørgen Kvalsvik wrote:

[PATCH] testsuite: Mark gcc.c-torture/execute/memcpy-a?.c tests expensive

These tests can take several seconds per compilation to complete, taking total elapsed time measured in minutes. Mark them as expensive so as to let people skip them where they want to save on testing time. gcc/testsuite/ * gcc.c-torture/execute/memcpy-a1.c: Mark as expensive.

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

Am Montag, dem 02.12.2024 um 20:15 + schrieb Qing Zhao: > > > On Nov 30, 2024, at 07:22, Martin Uecker wrote: > > > > Am Dienstag, dem 26.11.2024 um 20:59 + schrieb Qing Zhao: > > > Think this over these days, I have another thought that need some > > > feedback: > > > > > > The major

Re: [PATCH] libstdc++: Use hidden friends for __normal_iterator operators

On Mon, 2 Dec 2024, Patrick Palka wrote: > On Thu, 28 Nov 2024, Jonathan Wakely wrote: > > > As suggested by Jason, this makes all __normal_iterator operators into > > friends so they can be found by ADL and don't need to be separately > > exported in module std. > > Might as well remove the __g

Re: m68k: don't allow o/o in movdi, movdf, movxf

On 12/2/24 8:52 AM, Andreas Schwab wrote: The movdi, movdf and movxf patterns allow both operands to be offsettable memory, but output_move_double cannot handle overlapping objects. This is visible in the failure of gcc.c-torture/execute/pr97073.c when compiled with LTO (where cprop optimizes

Re: Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

> On Nov 30, 2024, at 07:10, Martin Uecker wrote: > > Am Dienstag, dem 26.11.2024 um 15:15 + schrieb Qing Zhao: >> >>> On Nov 25, 2024, at 16:46, Martin Uecker wrote: >>> >>> >>> Hi Qing, >>> >>> Am Montag, dem 25.11.2024 um 17:40 + schrieb Qing Zhao: Hi, Martin, I

Re: [PATCH] c++: Allow overloaded builtins to be used in SFINAE context

On 10/21/24 6:43 AM, Matthew Malcomson wrote: Ping (re-sending ping because previous message body too large for list -- apologies for duplication to those on Cc). Attaching update on testsuite to fix testism on Arm that Linaro CI caught. From: Matthew Malcomson This commit newly introduces th

[committed] arm, mve: Adding missing Runtime Library Exception to header files

Add missing Runtime Library Exception to mve header files to bring them into line with other similar headers. Not adding it in the first place was an oversight. gcc/ChangeLog: * config/arm/arm_mve.h: Add Runtime Library Exception. * config/arm/arm_mve_types.h: Likewise.diff --g

gccrs: Remove unused files 'gcc/rust/typecheck/rust-hir-type-check-toplevel.{cc,h}' (was: [PATCH] gccrs: Remove unused files)

Hi! On 2024-12-01T21:17:39-0500, Owen Avery wrote: > These files only exist upstream, and were presumably either never > removed upstream or accidentally upstreamed despite being removed > downstream. > > gcc/rust/ChangeLog: > > * typecheck/rust-hir-type-check-toplevel.cc: Removed. >

m68k: don't allow o/o in movdi, movdf, movxf

The movdi, movdf and movxf patterns allow both operands to be offsettable memory, but output_move_double cannot handle overlapping objects. This is visible in the failure of gcc.c-torture/execute/pr97073.c when compiled with LTO (where cprop optimizes out the AND operation; the failure also occurs

Re: [patch,avr] ad PR117726: Improve logic 8-bit shifts with an offset of 6

пн, 2 дек. 2024 г. в 15:29, Georg-Johann Lay : > > Logic 8-bit shifts with an offset of 6 can be improved by > supporting them as 3-operand operations. > > Ok for trunk? > Ok. Please apply. Denis.

[PATCH] phiopt: don't handle the case cond edge dest is itself [PR117243]

After r12-5300-gf98f373dd822b3, phiopt could get the following bb structure: | middle-bb -| || | || | phi<1, 2> | | cond | | || | |+---| Which was considered 2 loops. The inner loop had esimtate of upper

Re: [PATCH] libstdc++: Use hidden friends for __normal_iterator operators

On Mon, 2 Dec 2024 at 17:42, Patrick Palka wrote: > > On Mon, 2 Dec 2024, Patrick Palka wrote: > > > On Thu, 28 Nov 2024, Jonathan Wakely wrote: > > > > > As suggested by Jason, this makes all __normal_iterator operators into > > > friends so they can be found by ADL and don't need to be separatel

[PATCH] c++/contracts: ICE with contract assert on non empty statement [PR 117579]

Tested on x86_64-pc-linux-gnu. First time using git send-email, let me know if anything needs to be done differently. OK for trunk? Thanks, Nina Contract assert is an attribute on a non empty statement. Currently we assert that the statement is empty before emitting the assertion. This has

Re: Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

Am Montag, dem 02.12.2024 um 16:31 + schrieb Qing Zhao: > > > On Nov 30, 2024, at 07:10, Martin Uecker wrote: > > > > Am Dienstag, dem 26.11.2024 um 15:15 + schrieb Qing Zhao: > > > > > > > On Nov 25, 2024, at 16:46, Martin Uecker wrote: > > > > > > > > > > > > Hi Qing, > > > > > >

Re: [Patch, fortran] PR102689 revisited - Segfault with RESHAPE of CLASS as actual argument

Hi Paul, thanks for that tremendous patch! Reviewing it properly is beyond me, but if nobody else volunteers, I'll just provide a few minor comments derived from playing with it, and let you decide to push or polish. In testcase class_transformational_2.f90 I recommend to "harden" the select ty

[PATCH v2] arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814]

If the target does not support floating-point, we register FP vector types as 'void' (see register_vector_type). The leads to warnings about 'pure attribute on function returning void' when we declare the various load intrinsics because their call_properties say CP_READ_MEMORY (thus giving them th

RE: [RFC] PR81358: Enable automatic linking of libatomic

On Mon, 2 Dec 2024, Prathamesh Kulkarni wrote: > Thanks for the suggestions! Unfortunately, it seems to me that AC_PROG_CC > also does run tests that > need modified CFLAGS. I tried the following assertion before invoking > AC_PROG_CC (for stage-1 build): > > if test -z "${CFLAGS}"; then > AC

Re: [PATCH] phiopt: don't handle the case cond edge dest is itself [PR117243]

On Mon, Dec 02, 2024 at 01:51:39PM -0800, Andrew Pinski wrote: > gcc/testsuite/ChangeLog: > > * gcc.dg/torture/pr117243-1.c: New test. > * gcc.dg/torture/pr117243-2.c: New test. Just commenting on the testcases. I don't like 2 tests times 7 different command line options each spend so

[PATCH v2] rs6000: Inefficient vector splat of small V2DI constants [PR107757]

I have incorporated review comments in this patch. Regards, Surya rs6000: Inefficient vector splat of small V2DI constants [PR107757] On P8, for vector splat of double word constants, specifically -1 and 1, gcc generates inefficient code. For -1, gcc generates two instructions (vspltisw and vup

Re: [PATCH v2 1/2] aarch64: Refactor AdvSIMD intrinsics

writes: > Refactor AdvSIMD intrinsics defined using the new pragma-based approach > so that it is more extensible. > > Introduce a new struct, simd_type, which defines types using a mode and > qualifiers, and use objects of this struct in the declaration of intrinsics > in the aarch64-simd-pragma-

Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On Mon, 2 Dec 2024 at 10:45, Tejas Belagod wrote: > > On 11/30/24 3:30 AM, Christophe Lyon wrote: > > Hi! > > > > On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: > >> > >> This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types > >> to be > >> treated as GNU vectors and have

Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On 12/2/24 3:20 PM, Andrew Pinski wrote: On Mon, Dec 2, 2024 at 1:47 AM Tejas Belagod wrote: On 11/30/24 3:30 AM, Christophe Lyon wrote: Hi! On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types to be treated as GNU ve

Re: [PATCH v2 2/2] aarch64: Add support for AdvSIMD lut

writes: > The AArch64 FEAT_LUT extension is optional from Armv9.2-a and mandatory > from Armv9.5-a. It introduces instructions for lookup table reads with > bit indices. > > This patch adds support for AdvSIMD lut intrinsics. The intrinsics for > this extension are implemented as the following bui

[PATCH] aarch64: Add flags field to aarch64-simd-pragma-builtins.def

This patch adds a flags field to aarch64-simd-pragma-builtins.def and uses it to add attributes to the function declaration. Bootstrapped & regression-tested on aarch64-linux-gnu. I'll commit tomorrow if there are no comments before then. Richard gcc/ * config/aarch64/aarch64-simd-prag

[PATCH] riscv: Avoid narrowing warning

* config/riscv/riscv.cc (fli_value_hf, fli_value_sf) (fli_value_df): Use integer constants. Constify. (riscv_float_const_rtx_index_for_fli): Add const. --- gcc/config/riscv/riscv.cc | 64 --- 1 file changed, 39 insertions(+), 25 deletion

[PATCH] aarch64: Move some diagnostic functions to aarch64.cc

Some of the diagnostics reported for SVE builtins would also be useful for Advanced SIMD builtins, so this patch moves them from aarch64-sve-builtins.cc to aarch64.cc. I put them in a new aarch64 namespace for now -- perhaps in future they should be generic. Bootstrapped & regression-tested on aa

[PATCH] aarch64: Split out aarch64_v64_mode

We had a function called aarch64_vq_mode, where "vq" stood for "vector quadword". It was used by aarch64_simd_container_mode (from which it originated) and in preparation for various SVE ...Q instructions. It's useful for follow-on patches if we also split out the handling of 64-bit modes from aa

[PATCH] aarch64: Put iterators into the right section

Saurabh picked up Vladimir's work to add the FEAT_LUT extension. which was originally posted during stage 1. In the interests of parallelising the remaining work, and after checking with Saurabh off-line, I'm doing the review in the form of a patch rather than as English text. This patch is split

Re: School Districts Contacts 2024

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Re: [PATCH v3 2/8] aarch64: Make C/C++ operations possible on SVE ACLE types.

On Mon, Dec 2, 2024 at 1:47 AM Tejas Belagod wrote: > > On 11/30/24 3:30 AM, Christophe Lyon wrote: > > Hi! > > > > On Fri, 29 Nov 2024 at 05:00, Tejas Belagod wrote: > >> > >> This patch changes the TYPE_INDIVISBLE flag to 0 to enable SVE ACLE types > >> to be > >> treated as GNU vectors and ha

[PATCH] wwwdocs: Clarify DCO name/identity and (anonymous) pseudonym policy

Adjust the DCO text to match the broader community usage and clarifications around the use of real names, known identities and (anonymous) pseudonyms. These changes clarify what was meant by "real name" and that it is not required to be a "legal name" or any other stronger requirement than a known

[PATCH v1 1/1] aarch64: fix fp8 cpuinfo feature names

The previous version of the patch was based on the mistaken assumption that features in /proc/cpuinfo had matching names to the feature names that gcc and gas accept. This patch enables the fp8 feature when the f8cvt feature is enabled, under the assumption that fpmr is always enabled when f8cvt i

[PATCH v1 0/1] aarch64: fix fp8 cpuinfo feature names

The previous version of the patch was based on the mistaken assumption that features in /proc/cpuinfo had matching names to the feature names that gcc and gas accept. This patch enables the fp8 feature when the f8cvt feature is enabled, under the assumption that fpmr is always enabled when f8cvt

[committed] Add sym-exec subdirectory to configure.in rather than generated configure

As Marc pointed out one patch in the CRC series changed a generated file rather than the canonical source. This corrects the canonical source. Committing as obvious. The generated configure is already up-to-date. Jeff commit 4df8e6fc0cbc8358f88e81bb64b790af2a848a35 Author: Jeff Law Date:

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On 12/2/24 6:07 AM, Mark Wielaard wrote: Hi Jeff, On Sun, 2024-12-01 at 08:56 -0700, Jeff Law wrote: commit 148e20466c2c246df9472efed0f2ae94cb65a0f8 Author: Matevos Mehrabyan Date:   Mon Nov 11 13:00:10 2024 -0700     [PATCH v6 09/12] Add symbolic execution support.     Gives an op

[committed] Add trailing newlines where needed

Hi! Especially in the recent CRC commits, I see \ No newline at end of file in almost every second file. So, I went through the diff between r15-1 and current trunk in gcc/, looking for additions of such problems which don't intentional (e.g. Wtrailing-whitespace* tests had it there intentionally

RE: [RFC] PR81358: Enable automatic linking of libatomic

> -Original Message- > From: Joseph Myers > Sent: 29 November 2024 21:48 > To: Prathamesh Kulkarni > Cc: Xi Ruoyao ; Matthew Malcomson > ; gcc-patches@gcc.gnu.org > Subject: RE: [RFC] PR81358: Enable automatic linking of libatomic > > External email: Use caution opening links or attac

Re: [PATCH] libstdc++: Use hidden friends for __normal_iterator operators

On Thu, 28 Nov 2024, Jonathan Wakely wrote: > As suggested by Jason, this makes all __normal_iterator operators into > friends so they can be found by ADL and don't need to be separately > exported in module std. Might as well remove the __gnu_cxx exports in std.cc.in while we're at it? > > For

Re: [PATCH] AIX Build failure with default -std=gnu23.

Dear Community, Please let me know your comment. Or is it more appropriate to have changes with header guard like this ? --- a/libiberty/getopt.c +++ b/libiberty/getopt.c @@ -25,9 +25,11 @@ ^L /* This tells Alpha OSF/1 not to define a getopt prototype in . Ditto for AIX 3.2 and . */ +#ifnd

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

> On Dec 2, 2024, at 16:13, Martin Uecker wrote: > > Am Montag, dem 02.12.2024 um 20:15 + schrieb Qing Zhao: >> >>> On Nov 30, 2024, at 07:22, Martin Uecker wrote: >>> >>> Am Dienstag, dem 26.11.2024 um 20:59 + schrieb Qing Zhao: Think this over these days, I have another though

Re: Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

> On Dec 2, 2024, at 16:00, Martin Uecker wrote: > > Am Montag, dem 02.12.2024 um 16:31 + schrieb Qing Zhao: >> >>> On Nov 30, 2024, at 07:10, Martin Uecker wrote: >>> >>> Am Dienstag, dem 26.11.2024 um 15:15 + schrieb Qing Zhao: > On Nov 25, 2024, at 16:46, Martin Uecker

Re: [PATCH] libstdc++: Simplify std::_Destroy using 'if constexpr'

On Thu, 28 Nov 2024, Jonathan Wakely wrote: > This is another place where we can use 'if constexpr' to replace > dispatching to a specialized class template, improving compile times and > avoiding a function call. > > libstdc++-v3/ChangeLog: > > * include/bits/stl_construct.h (_Destroy(Fwd

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On 12/2/24 7:02 AM, Jakub Jelinek wrote: On Sun, Dec 01, 2024 at 08:56:39AM -0700, Jeff Law wrote: diff --git a/gcc/testsuite/gcc.dg/crc-side-instr-1.c b/gcc/testsuite/gcc.dg/crc-side-instr-1.c new file mode 100644 index 000..69738d5c866 --- /dev/null +++ b/gcc/testsuite/gcc.dg/crc-s

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On Mon, Dec 02, 2024 at 04:37:22PM -0700, Jeff Law wrote: > > and similarly for all other crc-side-instr*.c > > These tests are clearly written for gcc.dg/torture/, but placed in gcc.dg/, > > where we don't cycle through different options and none of explicit -O0, > > -O1, -Os or -flto will be amon

Re: [PATCH] phiopt: don't handle the case cond edge dest is itself [PR117243]

On Mon, Dec 2, 2024 at 2:05 PM Jakub Jelinek wrote: > > On Mon, Dec 02, 2024 at 01:51:39PM -0800, Andrew Pinski wrote: > > gcc/testsuite/ChangeLog: > > > > * gcc.dg/torture/pr117243-1.c: New test. > > * gcc.dg/torture/pr117243-2.c: New test. > > Just commenting on the testcases. > I do

Re: [PATCH v3 4/7] Support for 64-bit location_t: libgdiagnostics parts

On Mon, Dec 02, 2024 at 07:35:12PM -0500, David Malcolm wrote: > On Sun, 2024-12-01 at 19:44 -0500, Lewis Hyatt wrote: > > This patch is new in v3 and is a small change to libgdiagnostics > > similar to > > other changes required by 64-bit location_t. > > > > -- >8 -- > > > > Tweak libgdiagnostic

[PATCH v1] RISC-V: Fix incorrect optimization options passing to reduc and ternop

From: Pan Li Like the strided load/store, the testcases of vector reduce and ternop are designed to pick up different sorts of optimization options but actually these option are ignored according to the Execution log of the gcc.log. This patch would like to make it correct almost the same as wha

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

Am Montag, dem 02.12.2024 um 22:58 + schrieb Qing Zhao: > > > On Dec 2, 2024, at 16:13, Martin Uecker wrote: > > > > Am Montag, dem 02.12.2024 um 20:15 + schrieb Qing Zhao: > > > > > > > On Nov 30, 2024, at 07:22, Martin Uecker wrote: > > > > > > > > Am Dienstag, dem 26.11.2024 um 20:

Re: [PATCH] RSIC-V: Fix ICE for unrecognizable insn `UNSPEC_VSETVL` for XTheadVector

HI, Jeff I am very sorry that I took so long to reply because I was ill and hospitalized. > > + > > + /* Since the parameter vl of XTheadVector does not support > > + immediate numbers, we need to put it in the register > > + in advance. */ > > + if (TARGET_XTHEADVECTOR > > + && C

[PATCH v2] RISC-V: Fix ICE for unrecognizable insn `UNSPEC_VSETVL` for XTheadVector

Since XTheadvector does not support vsetivli, vl needs to be put into registers during the expand phase. PR 116593 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_expander::add_input_operand): Put const to GPR for vl. * config/riscv/thead-vector.

[committed] libstdc++: Disable deprecated warnings for std::rel_ops in std.cc

This avoids some warnings when building the std module. libstdc++-v3/ChangeLog: * src/c++23/std.cc.in: Disable deprecated warnings when exporting std::rel_ops members. --- Pushed to trunk. libstdc++-v3/src/c++23/std.cc.in | 3 +++ 1 file changed, 3 insertions(+) diff --git a/l

Re: [patch, libgfortran] PR117820

Hi Jerry, That's fine for trunk and, after a decent interval, I would suggest that you backport to 14-branch. Please add the name of the contributor to the testcase unless you have been asked not to. Thanks Paul On Tue, 3 Dec 2024 at 04:13, Jerry D wrote: > Hi all, > > Attached patch adds a

Re: Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

Am Montag, dem 02.12.2024 um 22:33 + schrieb Qing Zhao: > > > > > > diff --git a/gcc/testsuite/gcc.dg/pr114014.c > > > b/gcc/testsuite/gcc.dg/pr114014.c > > > new file mode 100644 > > > index 000..ab783f4f85d > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.dg/pr114014.c > > >

Re: [PATCH v1] RISC-V: Fix incorrect optimization options passing to cond and builtin

LGTM 於 2024年12月2日 週一 22:25 寫道： > From: Pan Li > > Like the strided load/store, the testcases of vector cond and builtin are > designed to pick up different sorts of optimization options but actually > these option are ignored according to the Execution log of gcc.log. > This patch would like to

Re: [PATCH v3 4/7] Support for 64-bit location_t: libgdiagnostics parts

On Sun, 2024-12-01 at 19:44 -0500, Lewis Hyatt wrote: > This patch is new in v3 and is a small change to libgdiagnostics > similar to > other changes required by 64-bit location_t. > > -- >8 -- > > Tweak libgdiagnostics.cc, which is necessarily sensitive to line-map > internals, to support 64-bit

New Chinese (simplified) PO file for 'gcc' (version 14.2.0)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Chinese (simplified) team of translators. The file is available at: https://translationproject.org/latest/gcc/zh_CN.po (This file, 'gcc-14.2.

Re: [PATCH] AIX Build failure with default -std=gnu23.

On Mon, Dec 2, 2024 at 1:01 PM swamy sangamesh wrote: > > Dear Community, > > Please let me know your comment. > Or is it more appropriate to have changes with header guard like this ? > I personally think it's better to just remove the define, but if you're going to leave it in and guard it with

[PATCH] MAINTAINERS: Add myself to write after approval

ChangeLog: * MAINTAINERS: Add myself to write after approval. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 26455d1cabf..6851affb6cb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -573,6 +573,7 @@ Filip Kastl pheeck

Why is 3x2^96 defined as 59421121885698253195157962752 instead of 237684487542793012780631851008?

In the following two files: gcc/libquadmath/math/expq.c glibc/blob/master/sysdeps/ieee754/ldbl-128/e_expl.c static const __float128 C[] = { /* Smallest integer x for which e^x overflows. */ #define himark C[0] 11356.52340629414

[PATCH] testsuite: Fix CRC testcases

Hi all, The latest CRC optimization patches include some testcases that do not work well. Some testcases in gcc/testsuite/gcc.dg lead to UNRESOLVED results when testing without an explicit -O flag. Other testcases in gcc/testsuite/gcc.target/riscv do not work when testing with RV32 -march/-mabi

Re: [PATCH] libstdc++: Use hidden friends for __normal_iterator operators

On Mon, 2 Dec 2024, Jonathan Wakely wrote: > On Mon, 2 Dec 2024 at 17:42, Patrick Palka wrote: > > > > On Mon, 2 Dec 2024, Patrick Palka wrote: > > > > > On Thu, 28 Nov 2024, Jonathan Wakely wrote: > > > > > > > As suggested by Jason, this makes all __normal_iterator operators into > > > > friend

Re: [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work

On 12/2/24 4:41 PM, Jakub Jelinek wrote: On Mon, Dec 02, 2024 at 04:37:22PM -0700, Jeff Law wrote: and similarly for all other crc-side-instr*.c These tests are clearly written for gcc.dg/torture/, but placed in gcc.dg/, where we don't cycle through different options and none of explicit -O0,

[patch, libgfortran] PR117820

Hi all, Attached patch adds a test for zero that is needed for write_boz to work correctly. Almost obvious. Regression tested on x86_64. Ok for trunk? Jerry Author: Jerry DeLisle Date: Mon Dec 2 19:45:26 2024 -0800 Fortran: Fix B64.0 formatted write output. PR fortran/1

Re: [PATCH] testsuite: Fix CRC testcases

On Tue, 2024-12-03 at 15:23 +0800, Bohan Lei wrote: > > diff --git a/gcc/testsuite/gcc.dg/crc-linux-1.c > b/gcc/testsuite/gcc.dg/crc-linux-1.c > index 918b423a583..3261ba48b8b 100644 > --- a/gcc/testsuite/gcc.dg/crc-linux-1.c > +++ b/gcc/testsuite/gcc.dg/crc-linux-1.c > @@ -1,5 +1,5 @@ >  /* { dg-