Friendly ping :)
On Thu, Aug 22, 2024 at 7:09 PM Fangrui Song wrote:
>
> On Mon, May 13, 2024 at 2:21 PM Fangrui Song wrote:
> >
> > On Mon, Mar 4, 2024 at 12:13 AM Fangrui Song wrote:
> > >
> > > From: Fangrui Song
> > >
> > > -fno-pic -mfdpic generated code is like regular -fno-pic, not suit
This reverts the part of 2024-09-12 r15-3623 that mixed
ADIW with CPC or SBIC.
https://gcc.gnu.org/r15-3623
Johann
--
AVR: Partially revert r15-3623.
ADIW doesn't mix with CPC / SBIC because it's not only about
propagating the Z flag but also about carry.
gcc/
* config/avr/avr.cc (av
I think it is a typo. When calculating the 'SET_SRC (x)' cost,
outer_code should be set to SET.
gcc/
* config/riscv/riscv.cc (riscv_rtx_costs): Fix the outer_code
when calculating the cost of SET expression.
---
gcc/config/riscv/riscv.cc | 2 +-
1 file changed, 1 insertion(+), 1 d
Currently, the cost of the LO_SUM expression is based on
the cost of calculating the first subexpression. When the
first subexpression is a register, the cost result will
be zero. It seems a bit unreasonable for a SET expression
to have a zero cost when its source is LO_SUM. Moreover,
having a cost
Use %= instead of maintaining a sequence number manually, so that it
doesn't result in a duplicate assembler label when the insn is duplicated.
PR target/116693
* config/riscv/riscv.cc (riscv_legitimize_tls_address): Don't pass
seqno to gen_tlsdesc and remove it.
*
Le 13/09/2024 à 18:56, Steve Kargl a écrit :
OK. Sorry about dropping the balli on a review.
I thought it had already been approved and committed.
No problem, it was not an important one anyway.
Thanks for the review, patch is now really pushed.
> On 12 Sep 2024, at 7:22 PM, Richard Sandiford
> wrote:
>
> External email: Use caution opening links or attachments
>
>
> Richard Biener writes:
>> On Thu, Sep 12, 2024 at 2:35 PM Richard Sandiford
>> wrote:
>>>
>>> Soumya AR writes:
On Neoverse V2, SVE ADD instructions have a thr
Le 14/09/2024 à 20:02, Steve Kargl a écrit :
On Fri, Sep 13, 2024 at 12:27:07PM +0200, Mikael Morin wrote:
gcc/fortran/ChangeLog:
* invoke.texi(finline-intrinsics): Document new flag.
* lang.opt (finline-intrinsics, finline-intrinsics=,
fno-inline-intrinsics): New flags
Ping
On 9/3/2024 4:32 PM, saurabh@arm.com wrote:
From: Saurabh Jha
This series is a revised version of:
https://gcc.gnu.org/pipermail/gcc-patches/2024-August/661860.html.
The first patch of the series is updated to address these comments:
https://gcc.gnu.org/pipermail/gcc-patches/2024-Aug
As mentioned in the Q&A session in Prague, I've been using these files
for years in my local GCC tree to help with formatting libstdc++ files.
I'll come up with similar files for the top-level and elsewhere in the
GCC tree. As Jakub mentioned, we certainly don't want to trim trailing
whitespace fro
LGTM, thanks :)
Andreas Schwab 於 2024年9月16日 週一 10:21 寫道：
> Use %= instead of maintaining a sequence number manually, so that it
> doesn't result in a duplicate assembler label when the insn is duplicated.
>
> PR target/116693
> * config/riscv/riscv.cc (riscv_legitimize_tls_addres
On Mon, 16 Sept 2024 at 10:19, Jonathan Wakely wrote:
>
> As mentioned in the Q&A session in Prague, I've been using these files
> for years in my local GCC tree to help with formatting libstdc++ files.
> I'll come up with similar files for the top-level and elsewhere in the
> GCC tree. As Jakub me
From: Alfie Richards
Hi,
This patch series refactors the MVE vst and vld intrinsics to use the builtins
framework.
This is a prerequisite for a later patch which adds gimple folding which in
turn enables some optimisations that were being missed.
I have crosscompiled on an x64 machine and reg
From: Alfie Richards
This patch extends
function_expander::use_contiguous_load_insn and
function_expander::use_contiguous_store_insn functions to
support predicated versions.
2024-09-11 Alfie Richards
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins.cc
From: Alfie Richards
This patch adds the extending load shape.
It also adds/fixes comments for the load and store shapes.
2024-09-11 Alfie Richards
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc:
(load_ext): New.
* config/arm/arm-mve
From: Alfie Richards
This patch adds the load_extending and store_truncating function bases
for MVE intrinsics.
The constructors have parameters describing the memory element
type/width which is part of the function base name (e.g. "h" in
vldrhq).
2024-09-11 Alfie Richards
gcc/
From: Alfie Richards
The tests for vst* instrinsics use functions which return a void
expression which can generate a warning. This hasn't come up previously
as the inlining presumably prevents the warning.
This change removed the uneccessary and incorrect returns.
2024-09-11 Alfie Richards
From: Alfie Richards
Implement the mve vld and vst intrinsics using the MVE builtins framework.
The main part of the patch is to reimplement to vstr/vldr patterns
such that we now have much fewer of them:
- non-truncating stores
- predicated non-truncating stores
- truncating stores
- predicated
вс, 15 сент. 2024 г. в 19:32, Georg-Johann Lay :
>
> Unsigned comparisons may skip comparing the lower bytes when
> the according bytes of the constant are all zeros. For example,
>
> uint16 >= 0x1200
>
> is true iff
>
> hi8 (uint16) >= hi8 (0x1200)
>
> and similar for uint16 < 0x1200.
Am 16.09.24 um 13:04 schrieb Denis Chertykov:
вс, 15 сент. 2024 г. в 19:32, Georg-Johann Lay :
Unsigned comparisons may skip comparing the lower bytes when
the according bytes of the constant are all zeros. For example,
uint16 >= 0x1200
is true iff
hi8 (uint16) >= hi8 (0x1200)
> On 9 Sep 2024, at 10:58, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>> This patch folds svdiv where one of the operands is all-zeros to a zero
>> vector, if the predicate is ptrue or the predication is _x or _z.
>> T
Hi Jonathan,
Thank you for picking up (the pieces of) my patch.
On 15/09/2024 17:00, Jonathan Wakely wrote:
Oops, that seems wrong, it seems the correct definition in terms
of indirect_value_t should be
remove_cvref_t>>
as mentioned in P2248R8/5.9.1.
That predates the note in p2609r3, bec
Hi Jason,
On 14 Sep 2024, at 18:44, Simon Martin wrote:
> Hi Jason,
>
> On 14 Sep 2024, at 18:11, Jason Merrill wrote:
>
>> On 9/13/24 11:06 AM, Simon Martin wrote:
>>> Hi Jason,
>>>
>>> On 12 Sep 2024, at 16:48, Jason Merrill wrote:
>>>
On 9/12/24 7:23 AM, Simon Martin wrote:
> Hi,
"Pengxuan Zheng (QUIC)" writes:
>> On Thu, Sep 12, 2024 at 2:53 AM Pengxuan Zheng
>> wrote:
>> >
>> > SVE's INDEX instruction can be used to populate vectors by values
>> > starting from "base" and incremented by "step" for each subsequent
>> > value. We can take advantage of it to generate vecto
Hi all,
This is a small patch that sets the L1 cache line size for Neoverse V2.
Unlike the other cache-related constants in there this value is not used just
for SW prefetch generation (which we want to avoid for Neoverse V2 presently).
It's also used to set std::hardware_destructive_interference_
writes:
> @@ -3082,6 +3084,8 @@
> (define_int_iterator SVE_COND_ICVTF [UNSPEC_COND_SCVTF UNSPEC_COND_UCVTF])
>
> (define_int_iterator SVE_COND_FP_BINARY [UNSPEC_COND_FADD
> + (UNSPEC_COND_FAMAX
> "TARGET_SVE_FAMINMAX")
> +
Hi Soumya,
> On 16 Sep 2024, at 10:51, Soumya AR wrote:
>
>
>
>> On 12 Sep 2024, at 7:22 PM, Richard Sandiford
>> wrote:
>>
>> External email: Use caution opening links or attachments
>>
>>
>> Richard Biener writes:
>>> On Thu, Sep 12, 2024 at 2:35 PM Richard Sandiford
>>> wrote:
Bootstrapped and regtested on x86_64-pc-linuxgnu, does this look
OK for trunk? Sadly the prerequisity patch r15-2331-g523836716137d0
probably isn't suitable for backporting, so I reckon this should be
trunk-only.
-- >8 --
Here we're prematurely stripping the decltype(lambda) alias used inside
th
AVR-LibC has been moved to GitHub a while ago. This patch
adjusts web links to the documentation and to the project
page.
Ok for trunk?
Johann
--
AVR: Update weblinks to AVR-LibC.
AVR-LibC has moved to GitHub, adjust web links:
https://github.com/avrdudes/avr-libc (project)
https://avrdudes.
пн, 16 сент. 2024 г. в 19:45, Georg-Johann Lay :
>
> AVR-LibC has been moved to GitHub a while ago. This patch
> adjusts web links to the documentation and to the project
> page.
>
> Ok for trunk?
Please apply.
Denis.
>
> Johann
>
> --
>
> AVR: Update weblinks to AVR-LibC.
>
> AVR-LibC has move
Jennifer Schmitz writes:
> From 287073b46e3eb9e7786f95c1d4bd90208db51f75 Mon Sep 17 00:00:00 2001
> From: Jennifer Schmitz
> Date: Mon, 2 Sep 2024 06:46:57 -0700
> Subject: [PATCH] SVE intrinsics: Fold svdiv with all-zero operands to zero
> vector
>
> This patch folds svdiv where one of the oper
On Tue, Sep 10, 2024 at 10:37:31AM -0400, Jason Merrill wrote:
> On 8/29/24 12:23 PM, Marek Polacek wrote:
> > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/14?
> >
> > -- >8 --
> > Pre r14-4793, we'd call warn_tautological_cmp -> operand_equal_p
> > with operands wrapped in NON_DEPE
On Fri, Sep 13, 2024 at 06:43:06PM +0200, Jason Merrill wrote:
> On 9/12/24 3:12 PM, Marek Polacek wrote:
> > On Wed, Sep 11, 2024 at 10:25:34PM -0400, Jason Merrill wrote:
> > > On 9/11/24 4:08 PM, Marek Polacek wrote:
> > > > @@ -6503,10 +6504,17 @@ check_bases_and_members (tree t)
> > > >
On Sep 16, 2024, at 2:23 AM, Jonathan Wakely wrote:
>
> Arsen mentioned that he has some similar emacs config for formatting
> libstdc++ code which should probably be added to the repo somewhere (I
> don't know enough about emacs to know where that should be, or how to
> make it only apply to the
> "Pengxuan Zheng (QUIC)" writes:
> >> On Thu, Sep 12, 2024 at 2:53 AM Pengxuan Zheng
> >> wrote:
> >> >
> >> > SVE's INDEX instruction can be used to populate vectors by values
> >> > starting from "base" and incremented by "step" for each subsequent
> >> > value. We can take advantage of it to
On Mon, Sep 16, 2024 at 8:12 AM Patrick Palka wrote:
>
> Bootstrapped and regtested on x86_64-pc-linuxgnu, does this look
> OK for trunk? Sadly the prerequisity patch r15-2331-g523836716137d0
> probably isn't suitable for backporting, so I reckon this should be
> trunk-only.
>
> -- >8 --
>
> Here
On Thu, 30 Nov 2023, Patrick Palka wrote:
> On Fri, 3 Nov 2023, Patrick Palka wrote:
>
> > On Tue, 3 May 2022, Jason Merrill wrote:
> >
> > > On 5/2/22 14:50, Patrick Palka wrote:
> > > > Currently when checking the constraints of a class template, we do so in
> > > > the context of the template
On Mon, 16 Sep 2024, Andrew Pinski wrote:
> On Mon, Sep 16, 2024 at 8:12 AM Patrick Palka wrote:
> >
> > Bootstrapped and regtested on x86_64-pc-linuxgnu, does this look
> > OK for trunk? Sadly the prerequisity patch r15-2331-g523836716137d0
> > probably isn't suitable for backporting, so I reck
This adds simple_dce_worklist to both the SLP vectorizer and the loop based
vectorizer.
This is a step into removing the dce after the loop based vectorizer. That DCE
still
does a few things, removing some of the induction variables which has become
unused. That is
something which can be improve
I posted this patch in August, and I never got a reply, so I'm reposting this
now.
This patch fixes PR target/89213 to allow better code to be generated to do
constant shifts of V2DI/V2DF vectors. Previously GCC would do constant shifts
of vectors with 64-bit elements by using:
XXSPLTIB
This is an old patch that I first wrote in 2021, and in the press of other
work, the patch got lost.
We had optimizations for splat of a vector extract for the other vector
types, but we missed having one for V2DI and V2DF. This patch adds a
combiner insn to do this optimization.
In looking at t
> On 16 Sep 2024, at 18:28, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>> From 287073b46e3eb9e7786f95c1d4bd90208db51f75 Mon Sep 17 00:00:00 2001
>> From: Jennifer Schmitz
>> Date: Mon, 2 Sep 2024 06:46:57 -0700
>> Subj
42 matches
Mail list logo
