Changes since v1:
- Fix synthesis-15.c.
-- >8 --
Improve handling of constants where the high half can be constructed by
inverting the lower half.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_build_integer): Detect constants
were the higher half is the lower half inverte
Thanks, Jerry.
Pushed as r15-3494-g1f462b5072a5e8 .
Am 05.09.24 um 21:46 schrieb Jerry D:
On 9/5/24 12:42 PM, Harald Anlauf wrote:
Dear all,
the attached simple patch fixes a corner case related to pr84868,
which was tracked separately. While Paul's patch for pr84868 added
the framework for
> > +(define_predicate "maskload_else_operand"
> > + (and (match_code "const_int,const_vector")
> > + (match_test "op == CONST0_RTX (GET_MODE (op))")))
>
> This forces maskload and mask_gather_load to only accept zero here, but
> in fact the hardware would allow us to accept any value (incl
On 8/28/24 12:44 PM, Joseph Myers wrote:
> On Wed, 28 Aug 2024, Jason Merrill wrote:
>
>> Tested x86_64-pc-linux-gnu. Any objections? Should I change all the other
>> instances of
>>
>> if (CPP_PEDANTIC...
>>cpp_error (...CPP_DL_PEDWARN
>>
>> the same way?
> Yes, I think that's a good change
On 9/4/24 4:00 PM, Iain Sandoe wrote:
On 4 Sep 2024, at 17:21, Jason Merrill wrote:
On 9/1/24 12:17 PM, Iain Sandoe wrote:
This came up in discussion of an earlier patch.
I'm in two minds as to whether it's a good idea or not - the underlying
issue being that libubsan does not yet (AFAICT)
Tested x86_64-pc-linux-gnu, OK for trunk?
-- 8< --
In addition to marking it as flag_enum, we want to avoid warnings about
not having a case for the implementation detail enumerators
_S_ios_openmode_*. And also for _S_noreplace in standard modes before it
was added.
libstdc++-v3/ChangeLog:
On Thu, 5 Sept 2024 at 22:00, Jason Merrill wrote:
>
> Tested x86_64-pc-linux-gnu, OK for trunk?
OK, thanks.
>
> -- 8< --
>
> In addition to marking it as flag_enum, we want to avoid warnings about
> not having a case for the implementation detail enumerators
> _S_ios_openmode_*. And also for _
On 9/5/24 12:52 PM, Palmer Dabbelt wrote:
We have cheap logical ops, so let's just move this back to the default
to take advantage of the standard branch/op hueristics.
gcc/ChangeLog:
PR target/116615
* config/riscv/riscv.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove.
---
There's
On Thu, Sep 5, 2024 at 2:52 PM Jeff Law wrote:
>
>
>
> On 9/5/24 12:52 PM, Palmer Dabbelt wrote:
> > We have cheap logical ops, so let's just move this back to the default
> > to take advantage of the standard branch/op hueristics.
> >
> > gcc/ChangeLog:
> >
> > PR target/116615
> > *
On 9/5/24 12:59 PM, Palmer Dabbelt wrote:
On Thu, 05 Sep 2024 11:52:57 PDT (-0700), Palmer Dabbelt wrote:
We have cheap logical ops, so let's just move this back to the default
to take advantage of the standard branch/op hueristics.
gcc/ChangeLog:
PR target/116615
* config/riscv/ris
On Thu, 5 Sept 2024, 21:10 Robin Dapp, wrote:
> > > +(define_predicate "maskload_else_operand"
> > > + (and (match_code "const_int,const_vector")
> > > + (match_test "op == CONST0_RTX (GET_MODE (op))")))
> >
> > This forces maskload and mask_gather_load to only accept zero here, but
> > in
On Thu, Sep 5, 2024 at 2:57 PM Jeff Law wrote:
>
>
>
> On 9/5/24 12:59 PM, Palmer Dabbelt wrote:
> > On Thu, 05 Sep 2024 11:52:57 PDT (-0700), Palmer Dabbelt wrote:
> >> We have cheap logical ops, so let's just move this back to the default
> >> to take advantage of the standard branch/op hueristi
Hi Qing,
Sorry for my late reply.
On Thu, Aug 29, 2024 at 7:22 AM Qing Zhao wrote:
>
> Hi,
>
> Thanks for the information.
>
> Yes, providing a unary operator similar as __counted_by(PTR) as suggested by
> multiple people previously is a cleaner approach.
>
> Then the programmer will use the fo
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/14?
-- >8 --
We ICE in decay_conversion with this test:
struct S {
S() {}
};
S arr[1][1];
auto [m](arr3);
But not when the last line is:
auto [n] = arr3;
Therefore the difference is between copy- and direct-init. In
par
On Thu, 05 Sep 2024 14:57:06 PDT (-0700), a...@baylibre.com wrote:
On Thu, 5 Sept 2024, 21:10 Robin Dapp, wrote:
> > +(define_predicate "maskload_else_operand"
> > + (and (match_code "const_int,const_vector")
> > + (match_test "op == CONST0_RTX (GET_MODE (op))")))
>
> This forces masklo
On Sun, 11 Aug 2024 14:00:27 PDT (-0700), Robin Dapp wrote:
> I figured it's easier to parse this as a series rather than one big
> patch, in particular since target-specific code is involved.
>
> This adds an else operand to masked-load operations in order to avoid
> implicit dependencies on zeroe
On Thu, Sep 5, 2024 at 12:26 AM Richard Biener
wrote:
>
> On Thu, Sep 5, 2024 at 8:25 AM Andrew Pinski wrote:
> >
> > When optimize_memcpy was added in r7-5443-g7b45d0dfeb5f85,
> > a path was added such that a statement was turned into a non-throwing
> > statement and maybe_clean_or_replace_eh_st
On 9/4/24 11:02 AM, Marek Polacek wrote:
+handle_flag_enum_attribute (tree *node, tree ARG_UNUSED(name), tree args,
+ int ARG_UNUSED (flags), bool *no_add_attrs)
+{
+ if (args)
+warning (OPT_Wattributes, "%qE attribute arguments ignored", name);
You don't need this
On 8/28/24 6:22 AM, Jason Merrill wrote:
On 8/28/24 6:09 AM, Jonathan Wakely wrote:
On Wed, 28 Aug 2024 at 10:58, Jason Merrill wrote:
On 8/28/24 5:55 AM, Jonathan Wakely wrote:
On Wed, 28 Aug 2024 at 10:54, Jason Merrill wrote:
Tested x86_64-pc-linux-gnu, OK for trunk?
Redefining that m
> From: Levy Hsu
> Sent: Thursday, September 5, 2024 4:55 PM
> To: gcc-patches@gcc.gnu.org
>
> Simple testcase fix, ok for trunk?
>
> This patch removes specific register checks to account for possible
> register spills and disables tests in 32-bit mode. This adjustment
> is necessary because V4
On Tue, Sep 3, 2024 at 11:30 PM Kyrylo Tkachov wrote:
>
> Hi Andrew,
>
> > On 3 Sep 2024, at 20:11, Andrew Pinski wrote:
> >
> > External email: Use caution opening links or attachments
> >
> >
> > This moves the check for # of statements to copy in join to
> > be the first check. This check is t
On 9/5/24 1:50 PM, Raphael Moreira Zinsly wrote:
Changes since v1:
- Fix bit31.
- Remove negative shift checks.
- Fix synthesis-7.c expected output.
-- >8 --
Improve handling of large constants in riscv_build_integer, generate
better code for constants where the high
On Fri, Sep 6, 2024 at 10:34 AM Jiang, Haochen wrote:
>
> > From: Levy Hsu
> > Sent: Thursday, September 5, 2024 4:55 PM
> > To: gcc-patches@gcc.gnu.org
> >
> > Simple testcase fix, ok for trunk?
> >
> > This patch removes specific register checks to account for possible
> > register spills and d
ChangeLog
* .gitignore: Add .vscode.
---
.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/.gitignore b/.gitignore
index 93a16b0b950..f044fe16b5f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -38,6 +38,7 @@ cscope.out
.local.vimrc
.lvimrc
+.vscode
.clang-format
.clang-ti
Hi all,
This patch will add those recent aliased CPU names into documentation
for clearness.
Ready to push for trunk and backport to GCC14 and part of the patch to
GCC13 as an obvious fix if no objection.
Thx,
Haochen
gcc/ChangeLog:
PR target/116617
* doc/invoke.texi: Add meteo
On 9/5/24 1:50 PM, Raphael Moreira Zinsly wrote:
Changes since v1:
- Fix synthesis-15.c.
-- >8 --
Improve handling of constants where the high half can be constructed by
inverting the lower half.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_build_integer): Detect constants
This patch aims to add the missing instruction types to the XiangShan-Nanhu
scheduler model.
The current XiangShan -Nanhu model lacks the trap, atomic trap, fcvt_i2f, and
fcvt_f2i instructions.
The trap, atomic, and i2f instructions belong to xs_jmp_rs. [1]
The f2i instruction belongs to xs_fmis
On Linux/x86_64,
a51f2fc0d80869ab079a93cc3858f24a1fd28237 is the first bad commit
commit a51f2fc0d80869ab079a93cc3858f24a1fd28237
Author: liuhongt
Date: Wed Sep 4 15:39:17 2024 +0800
Handle const0_operand for *avx2_pcmp3_1.
caused
FAIL: gcc.target/i386/pr59539-1.c scan-assembler-times vm
Hi,
This version has added a new optab named 'cfmovcc'. The new optab is used
in the middle end to expand to cfcmov. And simplified my patch by trying to
generate the conditional faulting movcc in noce_try_cmove_arith function.
All the changes passed bootstrap & regtest x86-64-pc-linux-gnu.
We al
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_can_cfcmov_p): New func
that test if the cfcmov can be generated.
(ix86_expand_int_cfmovcc): Expand to cfcmov pattern.
* config/i386/i386-opts.h (enum apx_features): New.
*
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