From: Pan Li
Move the run test of pr116278 to c-torture and leave the risc-v the
asm check under risc-v part.
PR target/116278
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr116278-run-1.c: Take compile instead of
run test.
* gcc.target/riscv/pr116278-run-2.c: Di
When I updated one of the links yesterday I noticed we have this obsolete
reference to GCC 4.0.1 and binutils 2.15.90.0.1.1 from 19 (nineteen) years
ago.
I suggest we remove these.
Okay?
Gerald
libstdc++-v3:
* doc/xml/manual/prerequisites.xml: Remove note from the GCC 4.0.1
da
On Sun, 18 Aug 2024, 09:53 Gerald Pfeifer, wrote:
> When I updated one of the links yesterday I noticed we have this obsolete
> reference to GCC 4.0.1 and binutils 2.15.90.0.1.1 from 19 (nineteen) years
> ago.
>
> I suggest we remove these.
>
> Okay?
>
OK
> Gerald
>
>
> libstdc++-v3:
>
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
Or should we even just remove the warning entirely? I'm not sure it
really adds all that much, since it's usual AFAICT for errors to prevent
the intended outputs from being generated.
-- >8 --
It was pointed out to me that the cur
Christopher pointed out these did not appear applicable any longer.
>From what I found I agree, so removed this from the beginner projects
list.
Pushed.
Gerald
---
htdocs/projects/beginner.html | 37 ---
1 file changed, 37 deletions(-)
diff --git a/htdocs/proje
This fixes "relocation truncated to fit" errors from
the linker due to bogus (too small) jump offsets.
Johann
--AVR: target/116407 - Fix linker error "relocation truncated to fit".
Some text peepholes output extra instructions prior to a branch
instruction and that increase the
On 8/18/24 1:13 AM, pan2...@intel.com wrote:
From: Pan Li
Move the run test of pr116278 to c-torture and leave the risc-v the
asm check under risc-v part.
PR target/116278
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr116278-run-1.c: Take compile instead of
run tes
On 8/18/24 12:10 AM, pan2...@intel.com wrote:
From: Pan Li
This patch would like to add test cases for the unsigned scalar quad and
oct .SAT_TRUNC form 2. Aka:
Form 2:
#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##
The 16-bit additions like addhi3 have two forms: One with a scratch:QI
and one without, where the latter is required because reload cannot
deal with a scratch when spill code pops a 16-bit addition.
Passes like combine and fwprop1 may come up with the non-scratch version,
which is sub-optimal in
On 8/12/24 3:50 PM, Jeff Law wrote:
On 8/12/24 1:49 PM, Richard Sandiford wrote:
- regno = subreg_regno (x);
+ /* A paradoxical should always be REGNO (y) + 0. Using
subreg_regno
+ for something like (subreg:DI (reg:SI N) 0) on a
WORDS_BIG_ENDIAN
+ target will
Thanks Sergey,
I have pushed the patch at
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=1cfe4a4d0d4447b364815d5e5c889deb2e533669
FX
On 8/16/24 8:13 PM, Andrew Pinski wrote:
To start working on more with expressions with more than one operand, converting
over to use gimple_match_op is needed.
The added side-effect here is factor_out_conditional_operation can now support
builtins/internal calls that has one operand without a
On 8/18/24 10:40 AM, Jeff Law wrote:
After the discussion from last week, I'm leaning a bit more towards no
than before.
Let's take a simpler case, the meaning of:
(subreg:DI (reg:SI 1) 0)
Actually refers to d0, not d1 on the m68k. If we agree on that, then
(subreg:DI (reg:SI 0) 0)
Lo
As noticed when verifying the dejagnu fix. Tested cris-elf
with a new newlib that arranges to emit the mentioned
warning, with/without the update in dejagnu to handle the
miniscule "in". Ok to commit?
-- >8 --
All testsuite compiler-calls pass default_target_compile in the
dejagnu installation (
On Sun, Aug 18, 2024 at 4:52 AM Gerald Pfeifer wrote:
>
> When I updated one of the links yesterday I noticed we have this obsolete
> reference to GCC 4.0.1 and binutils 2.15.90.0.1.1 from 19 (nineteen) years
> ago.
>
> I suggest we remove these.
>
Instead of just removing it, I wonder if it migh
On Sun, Aug 18, 2024 at 3:39 PM Eric Gallager wrote:
>
> On Sun, Aug 18, 2024 at 4:52 AM Gerald Pfeifer wrote:
> >
> > When I updated one of the links yesterday I noticed we have this obsolete
> > reference to GCC 4.0.1 and binutils 2.15.90.0.1.1 from 19 (nineteen) years
> > ago.
> >
> > I sugges
On Sun, Aug 18, 2024 at 3:42 PM Andrew Pinski wrote:
>
> On Sun, Aug 18, 2024 at 3:39 PM Eric Gallager wrote:
> >
> > On Sun, Aug 18, 2024 at 4:52 AM Gerald Pfeifer wrote:
> > >
> > > When I updated one of the links yesterday I noticed we have this obsolete
> > > reference to GCC 4.0.1 and binut
This fixes two general ubsan issues in ext-dce, both related to use-side
processsing of modes > DImode.
In ext_dce_process_uses we can be presented with something like this as
a use (subreg:SI (reg:TF) 12)
That will result in an out of range shift for a HOST_WIDE_INT object.
Where this happe
On Sun, Aug 18, 2024 at 11:06 AM Jeff Law wrote:
>
>
>
> On 8/16/24 8:13 PM, Andrew Pinski wrote:
> > To start working on more with expressions with more than one operand,
> > converting
> > over to use gimple_match_op is needed.
> > The added side-effect here is factor_out_conditional_operation
Outputs S_DEFRANGE_REGISTER_REL symbols for optimized local variables that are
on the stack, consisting of the stack register, the offset, and the code range
for which this applies.
gcc/
* dwarf2codeview.cc (enum cv_sym_type): Add S_DEFRANGE_REGISTER_REL.
(write_defrange_register_r
Write S_FRAMEPROC symbols, which aren't very useful but seem to be necessary
for Microsoft debuggers to function properly. These symbols come after S_LOCAL
symbols for optimized variables, but before S_REGISTER and S_REGREL32 for
unoptimized variables.
gcc/
* dwarf2codeview.cc (enum cv_sym
Write CodeView S_LDATA32 symbols for static locals in optimized code. We have
to handle these separately, as they come after the S_FRAMEPROC, plus you can't
have S_BLOCK32 symbols like you can in unoptimized code.
gcc/
* dwarf2codeview.cc (write_optimized_static_local_vars): New function.
Enable variable tracking when outputting CodeView debug information, and make
it so that we issue debug symbols for optimized variables in registers. This
consists of S_LOCAL symbols, which give the name and the type of local
variables, followed by S_DEFRANGE_REGISTER symbols for the register and t
Sure, will send v2 for this.
Pan
-Original Message-
From: Jeff Law
Sent: Sunday, August 18, 2024 11:19 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: richard.guent...@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com;
rdapp@gmail.com; s...@gentoo.org
Subject: Re: [PATCH v1] Test
Opps, let me double check what happened to my local tester.
Pan
-Original Message-
From: Jeff Law
Sent: Sunday, August 18, 2024 11:21 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com
Subject: Re: [PATCH v1 1/2] RISC-V: Add tes
On Wed, Aug 14, 2024 at 5:07 PM Haochen Jiang wrote:
>
> Hi all,
>
> The initial patch for AVX10.2 has been merged this week.
>
> For the upcoming patches, we will first upstream ymm rounding control part.
>
> In ymm rounding part, ALL the instructions in AVX512 with 512-bit rounding
> control wil
From: Pan Li
This patch would like to add test cases for the unsigned scalar quad and
oct .SAT_TRUNC form 2. Aka:
Form 2:
#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \
{
From: Pan Li
Move the run test of pr116278 to dg/torture and leave the risc-v the
asm check under risc-v part.
PR target/116278
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr116278-run-1.c: Take compile instead of run.
* gcc.target/riscv/pr116278-run-2.c: Ditto.
Please ignore this patch, should be sent by mistake.
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, August 19, 2024 10:04 AM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com; Li, Pan2
Subject: [PATCH v1 1/2] RI
Hi,
This patch adds const0 move checking for CLEAR_BY_PIECES. The original
vec_duplicate handles duplicates of non-constant inputs. But 0 is a
constant. So even a platform doesn't support vec_duplicate, it could
still do clear by pieces if it supports const0 move by that mode.
Compared to the
No regressions are reported. Committed as r15-3013.
https://gcc.gnu.org/pipermail/gcc-cvs/2024-August/408072.html
Thanks
Gui Haochen
在 2024/8/16 10:31, HAO CHEN GUI 写道:
> Hi,
> I submitted a patch to change the mode checking for
> CLEAR_BY_PIECES.
> https://gcc.gnu.org/pipermail/gcc-patches/202
Turn out that the pre-commit doesn't pick up the newest upstream when testing
this patch.
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, August 19, 2024 9:25 AM
To: Jeff Law ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com
Subject: RE:
From: Pan Li
This patch would like to allow IMM for the operand 0 of ussub pattern.
Aka .SAT_SUB(1023, y) as the below example.
Form 1:
#define DEF_SAT_U_SUB_IMM_FMT_1(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_1 (T y) \
{
This affects only the RISC-V targets, where the compiler options
-gvariable-location-views and consequently also -ginline-points
are disabled by default, which is unexpected and disables some
useful features of the generated debug info.
Due to a bug in the gas assembler the .loc statement
is not u
Ping for the patch to male better use of SREG and some
code clean-ups for trunk, no new regressions.
https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659422.html
Johann
--
AVR: target/115830 - Make better use of SREG.N and SREG.Z.
This patch adds new CC modes CCN and CCZN for operations
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