Without the trailing slash we incur a "301 Moved Permanently".
gcc:
* doc/gm2.texi (Community): Tweak link to gm2 list archive.
---
gcc/doc/gm2.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index bfc8dc71f23..40668f7f8c4 10064
This fixes an ICE due to some typos in avr_out_movsi_mr_r_reg_disp_tiny
that didn't use operands[1] when it was required.
Johann
--
AVR: target/116390 - Fix an avrtiny asm out template.
PR target/116390
gcc/
* config/avr/avr.cc (avr_out_movsi_mr_r_reg_disp_tiny): Fix
ou
From: Pan Li
This patch would like to add test cases for the unsigned scalar
.SAT_TRUNC form 2. Aka:
Form 2:
#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \
{\
WT
From: Pan Li
This patch would like to add test cases for the unsigned scalar
.SAT_TRUNC form 3. Aka:
Form 3:
#define DEF_SAT_U_TRUC_FMT_3(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \
{\
WT
Hi,
If we are good at this point, could someone help with merging it? (I don’t have
commit access, of course.)
Sergey
On Aug 14, 2024 at 21:30 +0800, Sergey Fedorov , wrote:
> Thank you, Iain.
> I have adjusted a longer line and added an intro sentence before changelog
> record.
>
>
>
> > On We
Pushed with a grammar fix (of adding "the").
Gerald
libstdc++v-3:
* doc/xml/manual/prerequisites.xml: Tweak two links to
installation docs. Fix grammar.
* doc/html/manual/setup.html: Regenerate.
---
libstdc++-v3/doc/html/manual/setup.html | 7 ---
libstdc++-v3/
gcc:
* doc/gm2.texi (What is GNU Modula-2): Tweak PIM4 link.
---
gcc/doc/gm2.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index 40668f7f8c4..b2e4aa2e9c0 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -108,7 +108,7 @@
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
-- >8 --
The error in the linked PR is caused because 'DECL_THIS_STATIC' is true
for the static member function, causing the streaming code to assume
that this is an internal linkage GM entity that needs to be explicitly
streamed, w
libstdc++-v3:
* doc/xml/manual/abi.xml: Update reference to
gcc.gnu.org/onlinedocs.
* doc/xml/manual/concurrency_extensions.xml (interface): Ditto.
* doc/xml/manual/extensions.xml: Ditto.
* doc/xml/manual/parallel_mode.xml: Ditto.
* doc/xml/manual/sha
All this patch does (modulo reformatting) is put SEI in a
environment.
However, looking at this I've got a question: How about "imposing a
function name" which is listed as a difference of noblock
versus others? This (the specific name) is not actually documented
anywhere? Is that an omission,
LGTM
於 2024年8月17日 週六 19:37 寫道：
> From: Pan Li
>
> This patch would like to add test cases for the unsigned scalar
> .SAT_TRUNC form 2. Aka:
>
> Form 2:
> #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
> NT __attribute__((noinline)) \
> sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \
>
LGTM
於 2024年8月17日 週六 19:37 寫道：
> From: Pan Li
>
> This patch would like to add test cases for the unsigned scalar
> .SAT_TRUNC form 3. Aka:
>
> Form 3:
> #define DEF_SAT_U_TRUC_FMT_3(NT, WT) \
> NT __attribute__((noinline)) \
> sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \
>
On 8/7/24 10:52 PM, Feng Wang wrote:
This patch add the vector rotate shift pattern for auto-vect.
With this patch, the scalar rotate shift can be automatically
vectorized into vector rotate shift.
gcc/ChangeLog:
* config/riscv/autovec.md (v3):
Add new define_expand pattern f
On 8/10/24 8:31 AM, Robin Dapp wrote:
A bit of bikeshedding:
While it's obviously a bug, I'm not really sure it's useful to truncate before
emitting the widening shift. Do we save an instruction vs. the regular
non-widening shift by doing so?
At least for the test you added, there is no diff
On 8/10/24 6:36 AM, pan2...@intel.com wrote:
This patch would like to fix one ICE when rv64gcv_zvbb for vwsll.
Consider below example.
void vwsll_vv_test (short *restrict dst, char *restrict a,
int *restrict b, int n)
{
for (int i = 0; i < n; i++)
dst[i] = a[i] <<
On 8/12/24 7:25 AM, Jin Ma wrote:
When compiling an interface for rounding of type 'vfloat16*' without using zvfh
or zvfhmin, it is not enough to use FLOAT_MODE_P because the type does not
support
it. Although the subsequent riscv_validate_vector_type checks will still fail
and throw exceptio
Am 17.08.24 um 15:43 schrieb Gerald Pfeifer:
All this patch does (modulo reformatting) is put SEI in a
environment.
However, looking at this I've got a question: How about "imposing a
function name" which is listed as a difference of noblock
versus others? This (the specific name) is not actual
On 8/7/24 9:01 PM, Jin Ma wrote:
When rs1 is the immediate 0, the following ICE occurs:
error: unrecognizable insn:
(insn 8 5 12 2 (set (reg:RVVM1DI 134 [ ])
(if_then_else:RVVM1DI (unspec:RVVMF64BI [
(const_vector:RVVMF64BI repeat [
The recent if-conversion changes tripped a failure on the v850 port.
The core underlying issue is that while the if-conversion code tries to
do the right thing with noce_can_force_operand to determine if it can
force an arbitrary operand into a register, it's not really a sufficient
check.
E
On 8/16/24 9:43 PM, pan2...@intel.com wrote:
From: Pan Li
For QI/HImode of .SAT_ADD, the operands may be sign-extended and the
high bits of Xmode may be all 1 which is not expected. For example as
below code.
signed char b[1];
unsigned short c;
signed char *d = b;
int main() {
b[0] = -
On 7/22/24 11:06 PM, pan2...@intel.com wrote:
From: Pan Li
This patch would like to implement the quad and oct .SAT_TRUNC pattern
in the riscv backend. Aka:
Form 1:
#define DEF_SAT_U_TRUC_FMT_1(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt
On 8/7/24 1:48 PM, Kirspel, Kevin wrote:
The attach patch is specific to the RTEMS RISC-V architecture multilib
which is controlled by the t-rtems file in the gcc/config/riscv/
directory. The patch file was created from the gcc-13.3.0 branch. It
was successfully tested within RTEMS Source
This is analogous to a prior patch to ext-dce which fixes propagation of
sign bits, but this time for the saturating variants. I'd held off
fixing those because I wanted the time to look at that code (since we
don't have a testcase for it as far as I know).
Not surprisingly, putting an abor
On Sat, Aug 17, 2024 at 05:03:14AM +, Li, Pan2 wrote:
> Please feel free to let me know if there is anything I can do to fix this
issue. Thanks a lot.
There is no bug. The operands of .{ADD,SUB,MUL}_OVERFLOW don't have to
have the same type, as described in the
__builtin_{add,sub,mul}_overflo
On Sat, Aug 17, 2024 at 05:03:14AM +, Li, Pan2 wrote:
> Thanks Richard for confirmation. Sorry almost forget this thread.
>
> Please feel free to let me know if there is anything I can do to fix this
> issue. Thanks a lot.
There is no bug. The operands of .{ADD,SUB,MUL}_OVERFLOW don't have
This extends r14-3982-g9ea74d235c7e78 to also include the newly added statements
since some of them might be dead too (due to the way match and simplify works).
This was noticed while working on adding a new match and simplify pattern where
a
new statement that got added was not being used.
Boots
> Thanks. I've pushed this to the trunk.
Thanks a lot, Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, August 17, 2024 11:27 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com
Subject: Re: [PATCH v1] RISC-V: Bugfix
> OK. And I think this shows the basic approach we want to use if there
> are other builtins that accept sub-word modes. ie, get the operands
> into X mode (by extending them as appropriate), then do as much work in
> X mode as possible, then truncate the result if needed.
> Thanks for your p
> OK. Sorry for the delays here. I wanted to make sure we had the issues
> WRT operand extension resolved before diving into this. But in
> retrospect, this probably could have moved forward independently.
That make much sense to me, thanks a lot.
Pan
-Original Message-
From: Jeff L
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
-- >8 --
Currently we implement [temp.deduct.guide] p1 by forcing all deduction
guides to be considered as exported. However this is not sufficient:
for transitive non-exported imports we will still hide the deduction
guide from na
Thanks Jakub for explaining.
Hi Richard,
Does it mean we need to do some promotion similar as this patch to make the
vectorizable_call happy
when there is a constant operand? I am not sure if there is a better approach
for this case.
Pan
-Original Message-
From: Jakub Jelinek
Sent:
From: Pan Li
This patch would like to add test cases for the unsigned scalar quad and
oct .SAT_TRUNC form 2. Aka:
Form 2:
#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \
{
From: Pan Li
This patch would like to add test cases for the unsigned scalar quad and
oct .SAT_TRUNC form 3. Aka:
Form 3:
#define DEF_SAT_U_TRUC_FMT_3(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \
{
> Am 18.08.2024 um 00:57 schrieb Andrew Pinski :
>
> This extends r14-3982-g9ea74d235c7e78 to also include the newly added
> statements
> since some of them might be dead too (due to the way match and simplify
> works).
> This was noticed while working on adding a new match and simplify patt
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