This fixes a testsuite regression seen on m68k after some of the recent
ext-dce changes. Ultimately Richard S and I have concluded the bug was
a latent issue in subreg simplification.
Essentially when simplifying something like
(set (target:M1) (subreg:M1 (subreg:M2 (reg:M1) 0) 0))
Where M
Hi Andre,
On 7/26/24 16:05, Andre Vieira (lists) wrote:
This patch refactors and fixes an issue where
arm_mve_dlstp_check_dec_counter
was making an assumption about the form of what a candidate for a dec_insn.
I think this lacks some verb? (eg what a candidate for a dec_insn
"is" or "
On 7/28/24 9:24 PM, Jiawei wrote:
This patch adds support for RISC-V RVA23 and RVB23 Profiles[1],
which depend on the base RISC-V Profiles support[2].
[1]
https://github.com/riscv/riscv-profiles/releases/tag/rva23-v0.4-rvb23-v0.1-internal-review
[2] https://gcc.gnu.org/pipermail/gcc-patches/
On 7/28/24 4:41 PM, Mark Harmstone wrote:
Empty structs result in empty LF_FIELDLIST types, which are valid, but
we weren't accounting for this and assuming they had to contain
subtypes.
gcc/
* dwarf2codeview.cc (get_type_num_struct): Fix NULL pointer dereference.
OK
jeff
On Tue, Jul 30, 2024 at 4:29 PM Jeff Law wrote:
>...
> You define:
> +#define RISCV_STACK_CLASH_VECTOR_CFA_REGNUM (GP_TEMP_FIRST + 4)
>
> Where:
> #define GP_REG_FIRST 0
> #define GP_TEMP_FIRST (GP_REG_FIRST + 5)
>
> So RISCV_STACK_CLASH_VECTOR_CFA_REGNUM defined as "9" which I think is
> "s1". T
Hello world, hi Jakub,
I would like to PING the following patch.
It's essentially Julian's patch, except:
* It is rediffed (albeit it mostly applied cleanly).
* I replaced the omp_is_initial_device call by an
internal function (IFN_) such that it can be evaluated
at compile time. With -O1, t
On 7/30/24 2:50 PM, Raphael Zinsly wrote:
On Tue, Jul 30, 2024 at 4:29 PM Jeff Law wrote:
...
You define:
+#define RISCV_STACK_CLASH_VECTOR_CFA_REGNUM (GP_TEMP_FIRST + 4)
Where:
#define GP_REG_FIRST 0
#define GP_TEMP_FIRST (GP_REG_FIRST + 5)
So RISCV_STACK_CLASH_VECTOR_CFA_REGNUM defined a
On Mon, Jul 29, 2024 at 06:34:40PM -0400, Jason Merrill wrote:
> On 7/29/24 4:18 PM, Marek Polacek wrote:
> > On Tue, Jul 23, 2024 at 05:18:52PM -0400, Jason Merrill wrote:
> > > On 7/17/24 5:33 PM, Marek Polacek wrote:
> > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
> > >
> >
On 7/23/24 11:26 PM, Jiang, Haochen wrote:
-Original Message-
From: Jakub Jelinek
Sent: Wednesday, July 24, 2024 1:09 PM
To: Jiang, Haochen
Cc: j...@ventanamicro.com; gcc-regress...@gcc.gnu.org; gcc-
patc...@gcc.gnu.org
Subject: Re: [r15-2196 Regression] FAIL: c-c++-common/dfp/con
On 7/19/24 11:37 AM, Richard Sandiford wrote:
In g:9d20529d94b23275885f380d155fe8671ab5353a, I'd extended
insn_propagation to handle simple cases of hard-reg mode punning.
The punned "to" value was created using simplify_subreg rather
than simplify_gen_subreg, on the basis that hard-coded subr
On Tue, Jul 30, 2024 at 03:03:39PM -0600, Jeff Law wrote:
> > > The compilation of convert-bfp-6.c itself is identical between the older
> > > (where
> > > it didn't fail) and newer (where it fails) builds, what has changed is
> > > libgcc.a.
> > > In particular, what matters is libgcc/bid_binary
On Linux/x86_64,
2b3533cd871f62923e7a4f06a826f37bf0f35c5c is the first bad commit
commit 2b3533cd871f62923e7a4f06a826f37bf0f35c5c
Author: Filip Kastl
Date: Tue Jul 30 18:40:29 2024 +0200
gimple ssa: Teach switch conversion to optimize powers of 2 switches
caused
FAIL: gcc.target/i386/swi
Also add a testcase for -mabi=lp64d where 'd' is required.
gcc/ChangeLog:
PR 116111
* config/riscv/riscv.cc (riscv_option_override):
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-41.c: New test.
* gcc.target/riscv/pr116111.c: New test.
Signed-off-by: Patrick
On 7/30/24 4:59 PM, Marek Polacek wrote:
On Mon, Jul 29, 2024 at 06:34:40PM -0400, Jason Merrill wrote:
On 7/29/24 4:18 PM, Marek Polacek wrote:
On Tue, Jul 23, 2024 at 05:18:52PM -0400, Jason Merrill wrote:
On 7/17/24 5:33 PM, Marek Polacek wrote:
Bootstrapped/regtested on x86_64-pc-linux-gn
This patch fixes a bug where the mode iterator for mve_vdup
should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64)
are not supported by MVE.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/mve.md (mve_vdup): Fix mode iterator.
---
gcc/config
Hi,
v4 of patch 2/2 fixes a small mistake in 3 testcases, by relaxing the
expected q0 as result register into q[0-9]+ to account for codegen
differences depending on if the test is compiled with
-mfloat-abi=softfp or -mfloat-abi=hard.
I repost patch 1/2 (already approved) so that Linaro CI can ap
On 30/07/2024 15:27, Jonathan Wakely wrote:
On Tue, 30 Jul 2024 at 14:08, Jonathan Wakely wrote:
On Tue, 30 Jul 2024 at 08:31, Giuseppe D'Angelo
wrote:
Hello!
The attached patch implements adds support for P2591R5 in libstdc++
(concatenation of strings and string_views, approved in Tokyo f
On Tue, Jul 30, 2024 at 05:38:37PM -0400, Jason Merrill wrote:
> On 7/30/24 4:59 PM, Marek Polacek wrote:
> > On Mon, Jul 29, 2024 at 06:34:40PM -0400, Jason Merrill wrote:
> > > On 7/29/24 4:18 PM, Marek Polacek wrote:
> > > > On Tue, Jul 23, 2024 at 05:18:52PM -0400, Jason Merrill wrote:
> > > >
On Tue, 30 Jul 2024 at 22:54, Giuseppe D'Angelo
wrote:
>
> On 30/07/2024 15:27, Jonathan Wakely wrote:
> > On Tue, 30 Jul 2024 at 14:08, Jonathan Wakely wrote:
> >>
> >> On Tue, 30 Jul 2024 at 08:31, Giuseppe D'Angelo
> >> wrote:
> >>>
> >>> Hello!
> >>>
> >>> The attached patch implements adds
On 7/30/24 5:56 PM, Marek Polacek wrote:
On Tue, Jul 30, 2024 at 05:38:37PM -0400, Jason Merrill wrote:
On 7/30/24 4:59 PM, Marek Polacek wrote:
On Mon, Jul 29, 2024 at 06:34:40PM -0400, Jason Merrill wrote:
On 7/29/24 4:18 PM, Marek Polacek wrote:
On Tue, Jul 23, 2024 at 05:18:52PM -0400, Ja
On 29/07/2024 22:53, Giuseppe D'Angelo wrote:
Hi,
The attached patch is a stab at adding the necessary compiler builtin to
support std::is_virtual_base_of (P2985R0, approved for C++26). The name
of the builtin matches the one just merged into clang:
https://github.com/llvm/llvm-project/issues/9
Hello,
On 30/07/2024 15:04, Jonathan Wakely wrote:
On Mon, 29 Jul 2024 at 21:58, Giuseppe D'Angelo wrote:
Hi,
And this is the corresponding change libstdc++.
Thanks for the patch.
Again, thanks for the guidance, should be all fixed.
--
Giuseppe D'Angelo
From 1ab6d37ea41ca6fa05074a3d3b26
On Tue, 30 Jul 2024 at 23:49, Giuseppe D'Angelo
wrote:
>
> Hello,
>
> On 30/07/2024 15:04, Jonathan Wakely wrote:
> > On Mon, 29 Jul 2024 at 21:58, Giuseppe D'Angelo wrote:
> >>
> >> Hi,
> >>
> >> And this is the corresponding change libstdc++.
> >
> > Thanks for the patch.
>
> Again, thanks for t
gcc/ChangeLog:
PR 116152
* config/riscv/riscv.cc (riscv_option_override): Add deprecation
warning.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-9.c: Add check for warning.
Signed-off-by: Patrick O'Neill
---
Tested prior to adding link. Relying on precommit
On Tue, Jul 30, 2024 at 4:04 PM Patrick O'Neill wrote:
>
> gcc/ChangeLog:
>
> PR 116152
> * config/riscv/riscv.cc (riscv_option_override): Add deprecation
> warning.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/predef-9.c: Add check for warning.
>
> Signed-of
On 7/30/24 10:17 AM, Carl Love wrote:
> I tried, I hope I got it right, with -m32t:
>
> /* { dg-do run { target power10_hw } } */
> /* { dg-do compile { target { ! power10_hw } } } */
> /* { dg-require-effective-target int128 } */
>
> This gives:
>
> # of unsupported tests 1
>
> The
On 7/29/24 5:32 PM, Patrick Palka wrote:
On Mon, 29 Jul 2024, Jakub Jelinek wrote:
On Fri, Jul 26, 2024 at 06:00:12PM -0400, Patrick Palka wrote:
On Fri, 26 Jul 2024, Jakub Jelinek wrote:
On Fri, Jul 26, 2024 at 04:42:36PM -0400, Patrick Palka wrote:
// P2963R3 - Ordering of constraints inv
On 7/30/24 3:08 PM, Jakub Jelinek wrote:
On Tue, Jul 30, 2024 at 03:03:39PM -0600, Jeff Law wrote:
The compilation of convert-bfp-6.c itself is identical between the older (where
it didn't fail) and newer (where it fails) builds, what has changed is libgcc.a.
In particular, what matters is li
LGTM, although I thought for a few seconds whether to use sorry or
error, but I think we don't really feel sorry for that case, so just
error is fine :P
On Wed, Jul 31, 2024 at 5:33 AM Patrick O'Neill wrote:
>
> Also add a testcase for -mabi=lp64d where 'd' is required.
>
> gcc/ChangeLog:
>
>
On 7/30/24 16:08, Andrew Pinski wrote:
On Tue, Jul 30, 2024 at 4:04 PM Patrick O'Neill wrote:
gcc/ChangeLog:
PR 116152
* config/riscv/riscv.cc (riscv_option_override): Add deprecation
warning.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-9.c: Add c
gcc/ChangeLog:
PR 116152
* config/riscv/riscv.cc (riscv_option_override): Add deprecation
warning.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-9.c: Add check for warning.
Signed-off-by: Patrick O'Neill
---
v2 ChangeLog:
Shorten message and split into warn
2024-07-31 03:10 Jeff Law wrote:
>
>
>
>On 7/28/24 7:58 PM, Xiao Zeng wrote:
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/riscv/pr105314-rtl.c: Skip zicond.
>> * gcc.target/riscv/pr105314-rtl32.c: Dotto.
>> * gcc.target/riscv/pr105314.c: Dotto.
>Why do you want to ski
Kindly ping.
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, July 23, 2024 1:06 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com; Li, Pan2
Subject: [PATCH v1] RISC-V: Implement the quad and oct .SAT_TRUNC fo
在 2024/7/31 4:48, Jeff Law 写道:
On 7/28/24 9:24 PM, Jiawei wrote:
This patch adds support for RISC-V RVA23 and RVB23 Profiles[1],
which depend on the base RISC-V Profiles support[2].
[1]
https://github.com/riscv/riscv-profiles/releases/tag/rva23-v0.4-rvb23-v0.1-internal-review
[2] https://
Ok for trunk?
---
htdocs/gcc-14/changes.html| 7 +++
htdocs/gcc-14/porting_to.html | 9 +
2 files changed, 16 insertions(+)
diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index ca4cae0f..b023a4b9 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/ch
*add_4 and *adddi_4 are for shorter opcode from cmp to inc/dec or add
$128.
But NDD code is longer than the cmp code, so there is no need to support NDD.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog:
PR target/113744
* con
在 2024/7/29 下午3:59, Xi Ruoyao 写道:
In r15-1207 I was too stupid to realize we just need to relax
ins_zero_bitmask_operand to allow using bstrins for aligning, instead of
adding a new split. And, "> 12" in ins_zero_bitmask_operand also makes
no sense: it rejects bstrins for things like "x & ~4l"
This series introduces initial flags and functionality for the fp8 feature.
Specifically, the following are added:
- functions that enable constructing valid fpm register values.
- support for the '+fp8' -march modifier.
- support for reading and writing the new system register FPMR (Floating Po
This introduces the relevant flags to enable access to the fpmr register and
fp8 intrinsics, which will be added subsequently.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def (fp8): New.
* config/aarch64/aarch64.h (TARGET_FP8): Likewise.
* doc/invoke.texi (
The ACLE declares several helper types and functions to facilitate construction
of `fpm` arguments. These are available when one of the arm_neon.h, arm_sve.h,
or arm_sme.h headers is included. These helpers don't map to specific FP8
instructions and there's no expectation that they will produce a
Unlike most system registers, fpmr can be heavily written to in code that
exercises the fp8 functionality. That is because every fp8 instrinsic call
can potentially change the value of fpmr.
Rather than just use an unspec, we treat the fpmr system register like
all other registers and use a move o
On Wed, Jul 31, 2024 at 2:08 PM Kong, Lingling wrote:
>
> *add_4 and *adddi_4 are for shorter opcode from cmp to inc/dec or add
> $128.
>
> But NDD code is longer than the cmp code, so there is no need to support NDD.
>
>
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
>
> Ok for tr
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