[pushed] diagnostics: introduce diagnostic-global-context.cc

This moves all of the uses of global_dc within diagnostic.cc (including the definition) to a new diagnostic-global-context.cc. My intent is to make clearer those parts of our internal API that implicitly use global_dc, and to perhaps avoid linking global_dc into a future libdiagnostics.so. No fun

[PATCH v1] Internal-fn: Support new IFN SAT_TRUNC for unsigned scalar int

From: Pan Li This patch would like to add the middle-end presentation for the saturation truncation. Aka set the result of truncated value to the max value when overflow. It will take the pattern similar as below. Form 1: #define DEF_SAT_U_TRUC_FMT_1(WT, NT) \ NT __attribute__((noinline))

Re: [PATCH 10/11] Handle bitfields for CodeView

On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates structure members with DW_AT_data_bit_offset set in DWARF into LF_BITFIELD symbols. gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_bitfield to union. (write_lf_bitfield): New funct

Re: [PATCH 11/11] Handle subroutine types in CodeView

On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates DW_TAG_subroutine_type DIEs into LF_PROCEDURE symbols. gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_procedure and lf_arglist to union. (write_lf_procedure, write

[PATCH V3 Committed] [x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31.

Here's the patch committed. Try to optimize x < 0 ? -1 : 0 into (signed) x >> 31 and x < 0 ? 1 : 0 into (unsigned) x >> 31. Move the optimization did in ix86_expand_int_vcond to match.pd gcc/ChangeLog: PR target/114189 * match.pd: Simplify a < 0 ? -1 : 0 to (signed) >> 31 and a

RE: [PATCH v2] Vect: Support truncate after .SAT_SUB pattern in zip

Thanks Tamer, gimple_ranger works well for that case, will send another patch after this one. Pan -Original Message- From: Li, Pan2 Sent: Tuesday, June 25, 2024 2:26 PM To: Tamar Christina ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.c

Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]

On Jun 25, 2024, Richard Sandiford wrote: >> Richard (Sandiford), do you happen to recall why the IRC conversation >> mentioned in the PR trail decided to drop it entirely, even for signed >> types? > In the PR, the original shift was 32768 >> x (x >= 16) on ints, which the > vectoriser was narr

[PATCH] Fix wrong cost of MEM when addr is a lea.

416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0. The commit adjust rtx_cost of mem to reduce cost of (add op0 disp). But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea. It is the case in the PR, the patch uses lower cost to enable more simplication and fix th

Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]

Alexandre Oliva writes: > On Jun 25, 2024, Richard Sandiford wrote: > >>> Richard (Sandiford), do you happen to recall why the IRC conversation >>> mentioned in the PR trail decided to drop it entirely, even for signed >>> types? > >> In the PR, the original shift was 32768 >> x (x >= 16) on ints

Re: [PATCH] Fix wrong cost of MEM when addr is a lea.

On Wed, Jun 26, 2024 at 8:09 AM liuhongt wrote: > > 416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0. > The commit adjust rtx_cost of mem to reduce cost of (add op0 disp). > But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea. > It is the case in the PR, the p

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